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"LPRAM: a novel low-power high-performance RAM design with testability and ..."

Subhasis Bhattacharjee, Dhiraj K. Pradhan (2004)

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DOI: 10.1109/TCAD.2004.826581

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - https://dblp.org/rec/journals/tcad/BhattacharjeeP04
Subhasis Bhattacharjee, Dhiraj K. Pradhan:
LPRAM: a novel low-power high-performance RAM design with testability and scalability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5): 637-651 (2004)

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