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"Hierarchical Temporal Memory Features with Memristor Logic Circuits for ..."

Olga Krestinskaya, Timur Ibrayev, Alex Pappachen James (2018)

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DOI: 10.1109/TCAD.2017.2748024

access: open

type: Journal Article

metadata version: 2022-06-23

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  - journals/tcad/KrestinskayaIJ18
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  - https://dblp.org/rec/journals/tcad/KrestinskayaIJ18
Olga Krestinskaya, Timur Ibrayev, Alex Pappachen James:
Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1143-1156 (2018)

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