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"Post-Layout Simulation Time Reduction for Phase-Locked Loop Frequency ..."

Lechang Liu, Ramesh K. Pokharel (2014)

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DOI: 10.1109/TCAD.2014.2354291

access: closed

type: Journal Article

metadata version: 2020-09-24

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Lechang Liu, Ramesh K. Pokharel:
Post-Layout Simulation Time Reduction for Phase-Locked Loop Frequency Synthesizer Using System Identification Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(11): 1751-1755 (2014)

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