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"Efficient net extraction for restricted orientation designs [VLSI layout]."

Mario Alberto López, Ravi Janardan, Sartaj K. Sahni (1996)

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DOI: 10.1109/43.536721

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/LopezJS96
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  - https://dblp.org/rec/journals/tcad/LopezJS96
Mario Alberto López, Ravi Janardan, Sartaj K. Sahni:
Efficient net extraction for restricted orientation designs [VLSI layout]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9): 1151-1159 (1996)

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