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"Timing-Driven and Placement-Aware Multibit Register Composition."

Ioannis Seitanidis et al. (2019)

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DOI: 10.1109/TCAD.2018.2852740

access: closed

type: Journal Article

metadata version: 2023-05-01

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  - https://dblp.org/rec/journals/tcad/SeitanidisDMMC19
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery:
Timing-Driven and Placement-Aware Multibit Register Composition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1501-1514 (2019)

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