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"Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent ..."
Shourya Gupta et al. (2019)
- Shourya Gupta, Kirti Gupta, Benton H. Calhoun, Neeta Pandey:
Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 978-988 (2019)
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