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"A 90-nm 640 MHz 2 × VDD Output Buffer With 41.5% Slew Rate ..."

Jian-An Wang, Yuan-Yao Zhao, Zhengping Zhang (2020)

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DOI: 10.1109/TCSII.2020.3012150

access: closed

type: Journal Article

metadata version: 2022-05-31

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Jian-An Wang, Yuan-Yao Zhao, Zhengping Zhang:
A 90-nm 640 MHz 2 × VDD Output Buffer With 41.5% Slew Rate Improvement Using PVT Compensation. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1524-1528 (2020)

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