"A 64.7 nA, -65dB@1 kHz, and Dual-Output CMOS Voltage Reference With ..."

Yanhan Zeng et al. (2025)

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DOI: 10.1109/TCSII.2025.3577401

access: closed

type: Journal Article

metadata version: 2025-11-18

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Yanhan Zeng, Cailin Yu, Jingci Yang, Yanshen Luo, Bincheng Lei, Yongfu Li:
A 64.7 nA, -65dB@1 kHz, and Dual-Output CMOS Voltage Reference With Multi-Loop Active Load Without Trimming. IEEE Trans. Circuits Syst. II Express Briefs 72(11): 1520-1524 (2025)

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