"GALDS: a complete framework for designing multiclock ASICs and SoCs."

Atanu Chattopadhyay, Zeljko Zilic (2005)

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DOI: 10.1109/TVLSI.2005.848825

access: closed

type: Journal Article

metadata version: 2020-03-11

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Atanu Chattopadhyay, Zeljko Zilic:
GALDS: a complete framework for designing multiclock ASICs and SoCs. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 641-654 (2005)

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