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"Logic IP for Low-Cost IC Design in Advanced CMOS Nodes."

Mehmet Meric Isgenc et al. (2020)

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DOI: 10.1109/TVLSI.2019.2942825

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/IsgencMZPP20
Mehmet Meric Isgenc, Mayler G. A. Martins, V. Mohammed Zackriya, Samuel N. Pagliarini, Lawrence T. Pileggi:
Logic IP for Low-Cost IC Design in Advanced CMOS Nodes. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 585-595 (2020)

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