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"Scalable Network-on-Chip Architectures for Brain-Machine Interface ..."

Xian Li et al. (2018)

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DOI: 10.1109/TVLSI.2018.2843282

access: closed

type: Journal Article

metadata version: 2020-03-11

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Xian Li, Karthi Duraisamy, Paul Bogdan, Janardhan Rao Doppa, Partha Pratim Pande:
Scalable Network-on-Chip Architectures for Brain-Machine Interface Applications. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 1895-1907 (2018)

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