"Corrections to "Unified Logical Effort - A Method for Delay Evaluation and ..."

Arkadiy Morgenshtein et al. (2010)

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DOI: 10.1109/TVLSI.2010.2052421

access: closed

type: Journal Article

metadata version: 2020-03-11

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Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny:
Corrections to "Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect" [May 10 689-696]. IEEE Trans. Very Large Scale Integr. Syst. 18(8): 1262 (2010)

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