default search action
"Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in ..."
Mohsen Raji, Behnam Ghavami (2017)
- Mohsen Raji, Behnam Ghavami:
Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in the Presence of Process Variations. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 247-260 (2017)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.