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"Design of an FPGA Logic Element for Implementing Asynchronous NULL ..."

Scott C. Smith (2007)

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DOI: 10.1109/TVLSI.2007.898726

access: closed

type: Journal Article

metadata version: 2020-03-11

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Scott C. Smith:
Design of an FPGA Logic Element for Implementing Asynchronous NULL Convention Logic Circuits. IEEE Trans. Very Large Scale Integr. Syst. 15(6): 672-683 (2007)

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