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"A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth ..."

Junyoung Song et al. (2017)

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DOI: 10.1109/TVLSI.2016.2580713

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/SongLHK17
Junyoung Song, Hyun-Woo Lee, Sewook Hwang, Chulwoo Kim:
A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth PLL for Avoiding Noise Interference and CIJ Reduction Technique. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 344-353 (2017)

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