"Block-Level Logic Extraction from CMOS VLSI Layouts."

Inderpreet Bhasin, Joseph G. Tront (1994)

> Home

Details and statistics

DOI: 10.1155/1994/67035

access: open

type: Journal Article

metadata version: 2022-11-10

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/vlsi/BhasinT94
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/vlsi/BhasinT94
Inderpreet Bhasin, Joseph G. Tront:
Block-Level Logic Extraction from CMOS VLSI Layouts. VLSI Design 1(3): 243-259 (1994)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.