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"An efficient tree architecture for modulo 2n+1 ..."
Zhongde Wang, Graham A. Jullien, William C. Miller (1996)
- Zhongde Wang, Graham A. Jullien, William C. Miller:
An efficient tree architecture for modulo 2n+1 multiplication. J. VLSI Signal Process. 14(3): 241-248 (1996)
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