BibTeX record journals/vlsisp/XiD97

download as .bib file

@article{DBLP:journals/vlsisp/XiD97,
  author    = {Joe G. Xi and
               Wayne Wei{-}Ming Dai},
  title     = {Useful-Skew Clock Routing with Gate Sizing for Low Power Design},
  journal   = {J. {VLSI} Signal Process.},
  volume    = {16},
  number    = {2-3},
  pages     = {163--179},
  year      = {1997},
  url       = {https://doi.org/10.1023/A:1007939023899},
  doi       = {10.1023/A:1007939023899},
  timestamp = {Wed, 20 May 2020 21:26:41 +0200},
  biburl    = {https://dblp.org/rec/journals/vlsisp/XiD97.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of Schloss Dagstuhl - Leibniz Center for Informatics