"A tile-based processor architecture model for high-efficiency embedded ..."

Philippe Manet (2010)

> Home

Details and statistics

DOI: —

access: closed

type: Book or Thesis

metadata version: 2022-05-04

- view
  - electronic edition via handle.net
  authority control:
- export record
  dblp key:
  - phd/basesearch/Manet10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/phd/basesearch/Manet10
Philippe Manet:
A tile-based processor architecture model for high-efficiency embedded homogeneous multicore platforms. Catholic University of Louvain, Louvain-la-Neuve, Belgium, 2010

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.