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@inproceedings{DBLP:conf/nanoarch/AlamYT23,
author = {Md. Shahanur Alam and
Chris Yakopcic and
Tarek M. Taha},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {On-Chip Optimization and Deep Reinforcement Learning in Memristor
Based Computing},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {6:1--6:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633242},
doi = {10.1145/3611315.3633242},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AlamYT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AygunNKG23,
author = {Sercan Aygun and
M. Hassan Najafi and
Lida Kouhalvandi and
Ece Olcay G{\"{u}}nes},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Multiplexer Optimization for Adders in Stochastic Computing},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {18:1--18:2},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633256},
doi = {10.1145/3611315.3633256},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AygunNKG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChakrabortyS23,
author = {Soumya Chakraborty and
Arup Samanta},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Single Electron Shuttling between N-Donor and Si/SiO2 Interface at
Room Temperature},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {25:1--25:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633263},
doi = {10.1145/3611315.3633263},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChakrabortyS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChawaTTSBP23,
author = {Mohamad Moner Al Chawa and
Ronald Tetzlaff and
Christos Tjortjis and
Stavros G. Stavrinides and
Carol de Benito and
Rodrigo Picos},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {A Behavioural Compact Model for Programmable Neuromorphic ReRAM},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {2:1--2:3},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633237},
doi = {10.1145/3611315.3633237},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChawaTTSBP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CuiLGW023,
author = {Yijun Cui and
Jiang Li and
Chongyan Gu and
Chenghua Wang and
Weiqiang Liu},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {An RRAM-based {PUF} with Adjustable Programmable Voltage and Multi-Mode
Operation},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {20:1--20:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633258},
doi = {10.1145/3611315.3633258},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CuiLGW023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DrewniokWW23,
author = {Jan Drewniok and
Marcel Walter and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based
on Silicon Dangling Bonds},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {5:1--5:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633241},
doi = {10.1145/3611315.3633241},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DrewniokWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GaterAK23,
author = {Michael Gater and
Ali M. Adawi and
Neil T. Kemp},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Enhanced Switching in Solid Polymer Electrolyte Memristor Devices
via the addition of Interfacial Barriers and Quantum Dots},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {37:1--37:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633275},
doi = {10.1145/3611315.3633275},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GaterAK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Hasan23,
author = {Raqibul Hasan},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Robust Ex-situ Training of Memristor Crossbar-based Neural Network
with Limited Precision Weights},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {8:1--8:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633245},
doi = {10.1145/3611315.3633245},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Hasan23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HofmannWW23,
author = {Simon Toni Hofmann and
Marcel Walter and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Post-Layout Optimization for Field-coupled Nanotechnologies},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {10:1--10:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633247},
doi = {10.1145/3611315.3633247},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HofmannWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JaafarK23,
author = {Ayoub H. Jaafar and
Neil T. Kemp},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Optically Controlled Memristor Using Hybrid ZnO Nanorod/Polymer Material},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {19:1--19:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633257},
doi = {10.1145/3611315.3633257},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JaafarK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KiazadehDCMMCP23,
author = {Asal Kiazadeh and
Jonas Deuermeier and
Emanuel Carlos and
Rodrigo Martins and
S{\'{e}}rgio A. Matos and
Fabio Martinho Cardoso and
Luis Manuel Pessoa},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Concept paper on novel radio frequency resistive switches},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {29:1--29:3},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633267},
doi = {10.1145/3611315.3633267},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KiazadehDCMMCP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiGYYTQW23,
author = {Jiaming Li and
Bin Gao and
Ruihua Yu and
Peng Yao and
Jianshi Tang and
He Qian and
Huaqiang Wu},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic
3D Integration for High-Performance Systems},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {4:1--4:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633240},
doi = {10.1145/3611315.3633240},
timestamp = {Sun, 24 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiGYYTQW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiHGWW23,
author = {Pengbin Li and
Zhengyi Hou and
Hanran Gao and
Bi Wang and
Zhaohao Wang},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {A Reconfigurable and Machine Learning attack resistant strong {PUF}
based on Arbiter Mechanism and {SOT-MRAM}},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {22:1--22:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633260},
doi = {10.1145/3611315.3633260},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiHGWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ManeaSCS23,
author = {Paul{-}Philipp Manea and
Chirag Sudarshan and
Felix C{\"{u}}ppers and
John Paul Strachan},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Non-idealities and Design Solutions for Analog Memristor-Based Content-Addressable
Memories},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {17:1--17:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633254},
doi = {10.1145/3611315.3633254},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ManeaSCS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MoflicP23,
author = {Ioana Moflic and
Alexandru Paler},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Towards Faster Reinforcement Learning of Quantum Circuit Optimisation:
Exponential Reward Functions},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {21:1--21:2},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633259},
doi = {10.1145/3611315.3633259},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MoflicP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MoghadamAASNT23,
author = {Mehran Shoushtari Moghadam and
Sercan Aygun and
Mohsen Riahi Alam and
Jonas I Schmidt and
M. Hassan Najafi and
Nima Taherinejad},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Accurate and Energy-Efficient Stochastic Computing with Van Der Corput
Sequences},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {27:1--27:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633265},
doi = {10.1145/3611315.3633265},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MoghadamAASNT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MougkogiannisA23,
author = {Panagiotis Mougkogiannis and
Andrew Adamatzky},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Electrical Properties of Proteinoids for Unconventional Computing
Architectures},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {26:1--26:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633264},
doi = {10.1145/3611315.3633264},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MougkogiannisA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Nicolas0N23,
author = {Alban Nicolas and
C{\'{e}}dric Marchand and
David Navarro},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Non Volatile Operators Emulation Platform},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {15:1--15:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633252},
doi = {10.1145/3611315.3633252},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Nicolas0N23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OuLWZW23,
author = {Qianlei Ou and
Shixing Li and
Chao Wang and
He Zhang and
Zhaohao Wang},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {A Robust Time-based Error-Proofing Readout Scheme for {MRAM}},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {13:1--13:3},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633250},
doi = {10.1145/3611315.3633250},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OuLWZW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PalerDF23,
author = {Alexandru Paler and
Evan E. Dobbs and
Joseph S. Friedman},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {A T-depth two Toffoli gate for 2D square lattice architectures},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {32:1--32:2},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633270},
doi = {10.1145/3611315.3633270},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PalerDF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ParvareshHF23,
author = {Amirhossein Parvaresh and
Shima Hosseinzadeh and
Dietmar Fey},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Resilience and Precision Assessment of Natural Language Processing
Algorithms in Analog In-Memory Computing: {A} Hardware-Aware Study},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {28:1--28:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633266},
doi = {10.1145/3611315.3633266},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ParvareshHF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ProusalisNMDAT23,
author = {Dimitrios A. Prousalis and
Vasileios G. Ntinas and
Ioannis Messaris and
Ahmet Samil Demirkol and
Alon Ascoli and
Ronald Tetzlaff},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Stochastic template in cellular nonlinear networks modeling memristor
induced synaptic noise},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {23:1--23:3},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633261},
doi = {10.1145/3611315.3633261},
timestamp = {Tue, 16 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ProusalisNMDAT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RanW0023,
author = {Shuo Ran and
Bi Wu and
Ke Chen and
Weiqiang Liu},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {{VLCP:} {A} High-Performance FPGA-based {CNN} Accelerator with Vector-level
Cluster Pruning},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {33:1--33:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633271},
doi = {10.1145/3611315.3633271},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RanW0023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Rehal23,
author = {Amandeep Singh Rehal},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Low power Circuit Design Using Dynamic {GDI} Technique in {CNTFET}
Technology},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {1:1--1:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633236},
doi = {10.1145/3611315.3633236},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Rehal23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SalehK23,
author = {Saad Saleh and
Boris Koldehofe},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Memristor-based Network Switching Architecture for Energy Efficient
Cognitive Computational Models},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {34:1--34:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633272},
doi = {10.1145/3611315.3633272},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SalehK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SchniedersACHW23,
author = {Kristoffer Schnieders and
Stephan Aussen and
Felix C{\"{u}}ppers and
Susanne Hoffmann{-}Eifert and
Stefan Wiefels},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Impact of the switching mode on the read noise of ReRAM devices},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {11:1--11:3},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633248},
doi = {10.1145/3611315.3633248},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SchniedersACHW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SinghMBPWLRPMM23,
author = {Simranjeet Singh and
Elmira Moussavi and
Christopher Bengel and
Sachin B. Patkar and
Rainer Waser and
Rainer Leupers and
Vikas Rana and
Vivek Pachauri and
Stephan Menzel and
Farhad Merchant},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS
Technologies},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {30:1--30:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633268},
doi = {10.1145/3611315.3633268},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SinghMBPWLRPMM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SlesazeckLRHFM23,
author = {Stefan Slesazeck and
Suzanne Lancaster and
John Reuben and
Shima Hosseinzadeh and
Dietmar Fey and
Thomas Mikolajick},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Hyper Dimensional Computing with Ferroelectric Tunneling Junctions},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {3:1--3:2},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633239},
doi = {10.1145/3611315.3633239},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SlesazeckLRHFM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Teuscher23,
author = {Christof Teuscher},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Material and Physical Reservoir Computing for Beyond {CMOS} Electronics:
Quo Vadis?},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {14:1--14:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633251},
doi = {10.1145/3611315.3633251},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Teuscher23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/UhlmannRWQBOPOC23,
author = {Max Uhlmann and
Tommaso Rizzi and
Jianan Wen and
Emilio P{\'{e}}rez{-}Bosch Quesada and
Bakr Al Beattie and
Karlheinz Ochs and
Eduardo P{\'{e}}rez and
Philip Ostrovskyy and
Corrado Carta and
Christian Wenger and
Gerhard Kahmen},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {LUT-based {RRAM} Model for Neural Accelerator Circuit Simulation},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {35:1--35:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633273},
doi = {10.1145/3611315.3633273},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/UhlmannRWQBOPOC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WalterDNWW23,
author = {Marcel Walter and
Jan Drewniok and
Samuel Sze Hang Ng and
Konrad Walus and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Reducing the Complexity of Operational Domain Computation in Silicon
Dangling Bond Logic},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {9:1--9:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633246},
doi = {10.1145/3611315.3633246},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WalterDNWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangSNACHWTRM23,
author = {Yongmin Wang and
Kristoffer Schnieders and
Vasileios G. Ntinas and
Alon Ascoli and
Felix C{\"{u}}ppers and
Susanne Hoffmann{-}Eifert and
Stefan Wiefels and
Ronald Tetzlaff and
Vikas Rana and
Stephan Menzel},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Experimental Verification of Uncoupled Memristive Cellular Nonlinear
Network by Processing the {EDGE} Detection Task},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {36:1--36:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633274},
doi = {10.1145/3611315.3633274},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangSNACHWTRM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WeingartenDD23,
author = {Lennart Weingarten and
Kamalika Datta and
Rolf Drechsler},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {24:1--24:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633262},
doi = {10.1145/3611315.3633262},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WeingartenDD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YousufHGNA23,
author = {Osama Yousuf and
Imtiaz Hossen and
Andreu Glasmann and
Sina Najmaei and
Gina C. Adam},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Neural Network Modeling Bias for Hafnia-based FeFETs},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {16:1--16:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633253},
doi = {10.1145/3611315.3633253},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YousufHGNA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZegbroeckAHACC23,
author = {Arne Van Zegbroeck and
Pantazis Anagnostou and
Said Hamdioui and
Christoph Adelmann and
Florin Ciubotaru and
Sorin Cotofana},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Spin Wave Threshold Logic Gates},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {31:1--31:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633269},
doi = {10.1145/3611315.3633269},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZegbroeckAHACC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhaoPHBT23,
author = {Haibin Zhao and
Priyanjana Pal and
Michael Hefenbrock and
Michael Beigl and
Mehdi Baradaran Tahoori},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Towards Temporal Information Processing - Printed Neuromorphic Circuits
with Learnable Filters},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {12:1--12:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633249},
doi = {10.1145/3611315.3633249},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhaoPHBT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhouZRCLM23,
author = {Houji Zhou and
Zhiwei Zhou and
Shengguang Ren and
Jia Chen and
Yi Li and
Xiangshui Miao},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Heterogeneous Instruction Set Architecture for RRAM-enabled In-memory
Computing},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {7:1--7:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633244},
doi = {10.1145/3611315.3633244},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhouZRCLM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2023,
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315},
doi = {10.1145/3611315},
timestamp = {Fri, 26 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/0002WC022,
author = {You Wang and
Bi Wu and
Hao Cai and
Weiqiang Liu},
editor = {Christof Teuscher and
Jie Han},
title = {Low-cost stochastic number generator based on {MRAM} for stochastic
computing},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {20:1--20:5},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572545},
doi = {10.1145/3565478.3572545},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/0002WC022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AbsarMECBW22,
author = {Rubaya Absar and
Zach D. Merino and
Hazem Elgabra and
Xuesong Chen and
Jonathan Baugh and
Lan Wei},
editor = {Christof Teuscher and
Jie Han},
title = {Integrated Control Addressing Circuits for a Surface Code Quantum
Computer in Silicon},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {18:1--18:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572541},
doi = {10.1145/3565478.3572541},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AbsarMECBW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AhmedDMPAT22,
author = {Soyed Tuhin Ahmed and
Kamal Danouchi and
Christopher M{\"{u}}nch and
Guillaume Prenat and
Lorena Anghel and
Mehdi B. Tahoori},
editor = {Christof Teuscher and
Jie Han},
title = {Binary Bayesian Neural Networks for Efficient Uncertainty Estimation
Leveraging Inherent Stochasticity of Spintronic Devices},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {11:1--11:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572536},
doi = {10.1145/3565478.3572536},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AhmedDMPAT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BakerHH22,
author = {Timothy J. Baker and
Owen Hoffend and
John P. Hayes},
editor = {Christof Teuscher and
Jie Han},
title = {Multiplexer-Majority Chains: Managing Correlation and Cost in Stochastic
Number Generation},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {21:1--21:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572326},
doi = {10.1145/3565478.3572326},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BakerHH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BarveJ22,
author = {Siddharth Barve and
Rashmi Jha},
editor = {Christof Teuscher and
Jie Han},
title = {NeuroSOFM-Classifier: {A} Low Power Classifier Using Continuous Real-Time
Unsupervised Clustering},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {12:1--12:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572532},
doi = {10.1145/3565478.3572532},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BarveJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GoswamiS22,
author = {Bhanprakash Goswami and
Manan Suri},
editor = {Christof Teuscher and
Jie Han},
title = {Single Cycle {XOR} {(SCXOR)} and Stateful n-bit Parallel Adder Implementation
Using 2D {RRAM} Crossbar},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {1:1--1:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572329},
doi = {10.1145/3565478.3572329},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/GoswamiS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HendersonYHTMH22,
author = {Alex Henderson and
Chris Yakopcic and
Steven Harbour and
Tarek M. Taha and
Cory E. Merkel and
Hananel Hazan},
editor = {Christof Teuscher and
Jie Han},
title = {Circuit Optimization Techniques for Efficient Ex-Situ Training of
Robust Memristor Based Liquid State Machine},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {10:1--10:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572542},
doi = {10.1145/3565478.3572542},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HendersonYHTMH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HouSWW22,
author = {Zhengyi Hou and
Luyao Shi and
Bi Wang and
Zhaohao Wang},
editor = {Christof Teuscher and
Jie Han},
title = {Approximate computation based on {NAND-SPIN} {MRAM} for {CNN} on-chip
training},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {14:1--14:2},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572537},
doi = {10.1145/3565478.3572537},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HouSWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Hu0LH22,
author = {Aokun Hu and
Wenjie Li and
Dongxu Lv and
Guanghui He},
editor = {Christof Teuscher and
Jie Han},
title = {An Efficient Stochastic Convolution Accelerator based on Pseudo-Sobol
Sequences},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {25:1--25:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572543},
doi = {10.1145/3565478.3572543},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Hu0LH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KrayemMKKC22,
author = {Ibrahim Krayem and
Romain Mercier and
C{\'{e}}dric Killian and
Angeliki Kritikakou and
Daniel Chillet},
editor = {Christof Teuscher and
Jie Han},
title = {Data and Fault Aware Routing Algorithm for NoC Based Approximate Computing},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {17:1--17:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572327},
doi = {10.1145/3565478.3572327},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KrayemMKKC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KwakCY22,
author = {Jungyoun Kwak and
Gihun Choe and
Shimeng Yu},
editor = {Christof Teuscher and
Jie Han},
title = {A monolithic 3D design technology co-optimization with back-end-of-line
oxide channel transistor},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {6:1--6:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572312},
doi = {10.1145/3565478.3572312},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KwakCY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LambooyWW22,
author = {Willem Lambooy and
Marcel Walter and
Robert Wille},
editor = {Christof Teuscher and
Jie Han},
title = {Exploiting the Third Dimension: Stackable Quantum-dot Cellular Automata},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {9:1--9:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572529},
doi = {10.1145/3565478.3572529},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LambooyWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiSJL22,
author = {Han Li and
Heng Shi and
Honglan Jiang and
Siting Liu},
editor = {Christof Teuscher and
Jie Han},
title = {{HSB-GDM:} a Hybrid Stochastic-Binary Circuit for Gradient Descent
with Momentum in the Training of Neural Networks},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {22:1--22:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572530},
doi = {10.1145/3565478.3572530},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiSJL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiuWZ022,
author = {Kai Liu and
Bi Wu and
Haonan Zhu and
Weiqiang Liu},
editor = {Christof Teuscher and
Jie Han},
title = {High-performance {STT-MRAM} Logic-in-Memory Scheme Utilizing Data
Read Features},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {2:1--2:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572322},
doi = {10.1145/3565478.3572322},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiuWZ022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PhanSVHAET22,
author = {Nhat{-}Tan Phan and
Lucile Soumah and
Ahmed Sidi El Valli and
Louis Hutin and
Lorena Anghel and
Ursula Ebels and
Philippe Talatchian},
editor = {Christof Teuscher and
Jie Han},
title = {Electrical Coupling of Perpendicular Superparamagnetic Tunnel Junctions
for Probabilistic Computing},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {16:1--16:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572528},
doi = {10.1145/3565478.3572528},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PhanSVHAET22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RallisDSRK22,
author = {Konstantinos Rallis and
Panagiotis Dimitrakis and
Georgios Ch. Sirakoulis and
Antonio Rubio and
Ioannis Karafyllidis},
editor = {Christof Teuscher and
Jie Han},
title = {Current Characteristics of Defective {GNR} Nanoelectronic Devices},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {8:1--8:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572538},
doi = {10.1145/3565478.3572538},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/RallisDSRK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WalterW22,
author = {Marcel Walter and
Robert Wille},
editor = {Christof Teuscher and
Jie Han},
title = {Efficient Multi-Path Signal Routing for Field-coupled Nanotechnologies},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {7:1--7:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572539},
doi = {10.1145/3565478.3572539},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WalterW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Wang0WW0L22,
author = {Hanghang Wang and
Ke Chen and
Bi Wu and
Chenghua Wang and
Weiqiang Liu and
Fabrizio Lombardi},
editor = {Christof Teuscher and
Jie Han},
title = {HEADiv: {A} High-accuracy Energy-efficient Approximate Divider with
Error Compensation},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {15:1--15:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572324},
doi = {10.1145/3565478.3572324},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Wang0WW0L22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuWYHWZ22,
author = {Jiayao Wu and
Yijiao Wang and
Zhi Yang and
Kuiqing He and
Pengxu Wang and
Weisheng Zhao},
editor = {Christof Teuscher and
Jie Han},
title = {An In-memory Booth Multiplier Based on Non-volatile Memory for Neural
Network Applications},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {13:1--13:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572534},
doi = {10.1145/3565478.3572534},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WuWYHWZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangWW22,
author = {Zhongkui Zhang and
Chao Wang and
Zhaohao Wang},
editor = {Christof Teuscher and
Jie Han},
title = {Parallel Computing in Memory Paradigm based on Reconfigurable Spin-Orbit
Torque},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {4:1--4:2},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572531},
doi = {10.1145/3565478.3572531},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangWZ022,
author = {Didi Zhang and
Bi Wu and
Haonan Zhu and
Weiqiang Liu},
editor = {Christof Teuscher and
Jie Han},
title = {Capacity-oriented High-performance {NV-TCAM} Leveraging Hybrid {MRAM}
Scheme},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {3:1--3:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572315},
doi = {10.1145/3565478.3572315},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangWZ022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhaoYW22,
author = {Yiju Zhao and
Youngki Yoon and
Lan Wei},
editor = {Christof Teuscher and
Jie Han},
title = {A Multi-Level Simulation of GeH FETs: From Nanomaterial and Device
Characteristics to Circuit Performance Optimization},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {5:1--5:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572533},
doi = {10.1145/3565478.3572533},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhaoYW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhengLCJ022,
author = {Mengxin Zheng and
Qian Lou and
Fan Chen and
Lei Jiang and
Yongxin Zhu},
editor = {Christof Teuscher and
Jie Han},
title = {CryptoLight: An Electro-Optical Accelerator for Fully Homomorphic
Encryption},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {19:1--19:2},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572544},
doi = {10.1145/3565478.3572544},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhengLCJ022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhongWWQ22,
author = {Kuncai Zhong and
Xuan Wang and
Chen Wang and
Weikang Qian},
editor = {Christof Teuscher and
Jie Han},
title = {Joint Optimization of Randomizer and Computing Core for Low-Cost Stochastic
Circuits},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {24:1--24:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572540},
doi = {10.1145/3565478.3572540},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhongWWQ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhouZYC22,
author = {Yakun Zhou and
Yizhuo Zhou and
Jiajun Yan and
Jienan Chen},
editor = {Christof Teuscher and
Jie Han},
title = {Hardware Efficiency Stochastic Computing based on Hybrid Spatial Coding},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {23:1--23:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572535},
doi = {10.1145/3565478.3572535},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhouZYC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2022,
editor = {Christof Teuscher and
Jie Han},
title = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478},
doi = {10.1145/3565478},
isbn = {978-1-4503-9938-8},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BrandhoferDP21,
author = {Sebastian Brandhofer and
Simon J. Devitt and
Ilia Polian},
title = {Error Analysis of the Variational Quantum Eigensolver Algorithm},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642249},
doi = {10.1109/NANOARCH53687.2021.9642249},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BrandhoferDP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenSH21,
author = {Xiaoming Chen and
Tao Song and
Yinhe Han},
title = {RRAM-based Analog In-Memory Computing : Invited Paper},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642235},
doi = {10.1109/NANOARCH53687.2021.9642235},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenSH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DuanX21,
author = {Shijin Duan and
Xiaolin Xu},
title = {{HDCOG:} {A} Lightweight Hyperdimensional Computing Framework with
Feature Extraction},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642247},
doi = {10.1109/NANOARCH53687.2021.9642247},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DuanX21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FuAJG21,
author = {Weimin Fu and
Orlando Arias and
Yier Jin and
Xiaolong Guo},
title = {Fuzzing Hardware: Faith or Reality? : Invited Paper},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642252},
doi = {10.1109/NANOARCH53687.2021.9642252},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/FuAJG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HaoZWWBWZ21,
author = {Zuolei Hao and
Yue Zhang and
Jinkai Wang and
Hongyu Wang and
Yining Bai and
Guanda Wang and
Weisheng Zhao},
title = {A Computing-in-memory Scheme with Series Bit-cell in {STT-MRAM} for
Efficient Multi-bit Analog Multiplication},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642248},
doi = {10.1109/NANOARCH53687.2021.9642248},
timestamp = {Tue, 08 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HaoZWWBWZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HouGGNWLYC21,
author = {Yaoru Hou and
We Ge and
Yanan Guo and
Lirida A. B. Naviner and
You Wang and
Bo Liu and
Jun Yang and
Hao Cai},
title = {Cryogenic In-MRAM Computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642238},
doi = {10.1109/NANOARCH53687.2021.9642238},
timestamp = {Thu, 11 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HouGGNWLYC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HuangKAL21,
author = {Junqi Huang and
T. Nandha Kumar and
Haider A. F. Almurib and
Fabrizio Lombardi},
title = {Commutative Approximate Adders: Analysis and Evaluation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642233},
doi = {10.1109/NANOARCH53687.2021.9642233},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HuangKAL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiCGWL21,
author = {Jiang Li and
Yijun Cui and
Chongyan Gu and
Chenghua Wang and
Weiqiang Liu},
title = {Dynamically Configurable Physical Unclonable Function based on {RRAM}
Crossbar},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642245},
doi = {10.1109/NANOARCH53687.2021.9642245},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiCGWL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LinXWHZ21,
author = {Zhendong Lin and
Guangjun Xie and
Shaowei Wang and
Jie Han and
Yongqiang Zhang},
title = {A Review of Deterministic Approaches to Stochastic Computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642242},
doi = {10.1109/NANOARCH53687.2021.9642242},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LinXWHZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MarakkalageRM21,
author = {Dewmini Sudara Marakkalage and
Heinz Riener and
Giovanni De Micheli},
title = {Optimizing Adiabatic Quantum-Flux-Parametron {(AQFP)} Circuits using
an Exact Database},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642241},
doi = {10.1109/NANOARCH53687.2021.9642241},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MarakkalageRM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PanTZW21,
author = {Kangqiang Pan and
Amr M. S. Tosson and
Norman Y. Zhou and
Lan Wei},
title = {A Novel Programmable Variation-Tolerant RRAM-based Delay Element Circuit},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--2},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642239},
doi = {10.1109/NANOARCH53687.2021.9642239},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PanTZW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PoduvalIIZYNI21,
author = {Prathyush Poduval and
Mariam Issa and
Farhad Imani and
Cheng Zhuo and
Xunzhao Yin and
M. Hassan Najafi and
Mohsen Imani},
title = {Robust In-Memory Computing with Hyperdimensional Stochastic Representation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642237},
doi = {10.1109/NANOARCH53687.2021.9642237},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PoduvalIIZYNI21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/QianJZZWL21,
author = {Junyi Qian and
Yuanyuan Jiang and
Zilong Zhang and
Renyuan Zhang and
Ziyu Wang and
Bo Liu},
title = {Reconfigurable Approximate Multiplication Architecture for CNN-Based
Speech Recognition Using Wallace Tree Tensor Multiplier Unit},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642240},
doi = {10.1109/NANOARCH53687.2021.9642240},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/QianJZZWL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuNC21,
author = {Yu{-}ang Wu and
Lirida A. B. Naviner and
Hao Cai},
title = {Hybrid {MTJ-CMOS} Integration for Sigma-Delta {ADC}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642236},
doi = {10.1109/NANOARCH53687.2021.9642236},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WuNC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YanQCCNHW21,
author = {Aibin Yan and
Kuikui Qian and
Jie Cui and
Ningning Cui and
Tianming Ni and
Zhengfeng Huang and
Xiaoqing Wen},
title = {A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset
Self-Recoverable Latch},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642250},
doi = {10.1109/NANOARCH53687.2021.9642250},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YanQCCNHW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangL21,
author = {Maoshen Zhang and
Qiang Liu},
title = {Experimental Verification of {EMPA} Fault Mechanism},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642244},
doi = {10.1109/NANOARCH53687.2021.9642244},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangTW21,
author = {An Qi Zhang and
Amr M. S. Tosson and
Lan Wei},
title = {Error Resilience and Recovery of Process Induced Stuck-at Faults in
{MLP} Neural Networks using Emerging Technology},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642243},
doi = {10.1109/NANOARCH53687.2021.9642243},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangTW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhouXHZ21,
author = {Yuancheng Zhou and
Guangjun Xie and
Jie Han and
Yongqiang Zhang},
title = {Absolute Subtraction and Division Circuits Using Uncorrelated Random
Bitstreams in Stochastic Computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642251},
doi = {10.1109/NANOARCH53687.2021.9642251},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhouXHZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhouZDLX21,
author = {Tong Zhou and
Yuheng Zhang and
Shijin Duan and
Yukui Luo and
Xiaolin Xu},
title = {Deep Neural Network Security From a Hardware Perspective},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642246},
doi = {10.1109/NANOARCH53687.2021.9642246},
timestamp = {Fri, 20 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhouZDLX21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZokaeeLC21,
author = {Farzaneh Zokaee and
Bing Li and
Fan Chen},
title = {FeFET-based Process-in-Memory Architecture for Low-Power {DNN} Training},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021.9642234},
doi = {10.1109/NANOARCH53687.2021.9642234},
timestamp = {Thu, 02 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZokaeeLC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2021,
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2021, AB, Canada, November 8-10, 2021},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NANOARCH53687.2021},
doi = {10.1109/NANOARCH53687.2021},
isbn = {978-1-6654-0959-9},
timestamp = {Thu, 06 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/0010NWZZZ19,
author = {Yue Zhang and
Jiang Nan and
Guanda Wang and
Xueying Zhang and
Youguang Zhang and
Weisheng Zhao},
title = {Shaped Content Addressable Memory Based On Spin Orbit Torque Driven
Chiral Domain Wall Motions},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181194},
doi = {10.1109/NANOARCH47378.2019.181194},
timestamp = {Mon, 11 May 2020 11:18:24 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/0010NWZZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AliWHMZZ19,
author = {Rashid Ali and
You Wang and
Zhengyi Hou and
Haoyuan Ma and
Youguang Zhang and
Weisheng Zhao},
title = {Process Variation-Resilient {STT-MTJ} based {TRNG} using Linear Correcting
Codes},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181294},
doi = {10.1109/NANOARCH47378.2019.181294},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AliWHMZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AngiziF19,
author = {Shaahin Angizi and
Deliang Fan},
title = {Deep Neural Network Acceleration in Non-Volatile Memory: {A} Digital
Approach},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181297},
doi = {10.1109/NANOARCH47378.2019.181297},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AngiziF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Attarimashalkoubeh19,
author = {Behnoush Attarimashalkoubeh and
Yusuf Leblebici},
title = {Novel 3D architecture of 1S1R},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181278},
doi = {10.1109/NANOARCH47378.2019.181278},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Attarimashalkoubeh19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CarboniVSHLSI19,
author = {Roberto Carboni and
E. Vernocchi and
M. Siddik and
J. Harms and
A. Lyle and
G. Sandhu and
Daniele Ielmini},
title = {A compact model of stochastic switching in {STT} magnetic {RAM} for
memory and computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181290},
doi = {10.1109/NANOARCH47378.2019.181290},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/CarboniVSHLSI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FrerixSFD19,
author = {Steffen Frerix and
Saeideh Shirinzadeh and
Saman Fr{\"{o}}hlich and
Rolf Drechsler},
title = {ComPRIMe: {A} Compiler for Parallel and Scalable ReRAM-based In-Memory
Computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181285},
doi = {10.1109/NANOARCH47378.2019.181285},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/FrerixSFD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HirtzlinPKLVBPQ19,
author = {Tifenn Hirtzlin and
Bogdan Penkovsky and
Jacques{-}Olivier Klein and
Nicolas Locatelli and
Adrien F. Vincent and
Marc Bocquet and
Jean{-}Michel Portal and
Damien Querlioz},
title = {Implementing Binarized Neural Networks with Magnetoresistive {RAM}
without Error Correction},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181300},
doi = {10.1109/NANOARCH47378.2019.181300},
timestamp = {Fri, 24 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HirtzlinPKLVBPQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/IqbalMRR19,
author = {Md Arif Iqbal and
Naveen Kumar Macha and
Bhavana Tejaswini Repalle and
Mostafizur Rahman},
title = {A Logic Simplification Approach for Very Large Scale Crosstalk Circuit
Designs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181306},
doi = {10.1109/NANOARCH47378.2019.181306},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/IqbalMRR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JaoSRKSN19,
author = {Nicholas Jao and
Srivatsa Srivinasa and
Akshay Krishna Ramanathan and
Minhwan Kim and
John Sampson and
Vijaykrishnan Narayanan},
title = {Technology-Assisted Computing-In-Memory Design for Matrix Multiplication
Workloads},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181303},
doi = {10.1109/NANOARCH47378.2019.181303},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JaoSRKSN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KangZZ19,
author = {Wang Kang and
He Zhang and
Weisheng Zhao},
title = {Spintronic Memories: From Memory to Computing-in-Memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181298},
doi = {10.1109/NANOARCH47378.2019.181298},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KangZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KarakolisNDSNFK19,
author = {Panagiotis Karakolis and
Pascal Normand and
Panagiotis Dimitrakis and
L. Sygelou and
Vasileios G. Ntinas and
Iosif{-}Angelos Fyrigos and
Ioannis Karafyllidis and
George Ch. Sirakoulis},
title = {Plasma Modified Silicon Nitride Resistive Switching Memories},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181308},
doi = {10.1109/NANOARCH47378.2019.181308},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KarakolisNDSNFK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiuCHXYN19,
author = {Mingyue Liu and
Hao Cai and
Menglin Han and
Lei Xie and
Jun Yang and
Lirida A. B. Naviner},
title = {Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled
{MRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181292},
doi = {10.1109/NANOARCH47378.2019.181292},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiuCHXYN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LuSHM19,
author = {Yongjie Lu and
Yanan Sun and
Weifeng He and
Zhigang Mao},
title = {A Novel Memristor-Reusable Mapping Methodology of In-memory Logic
Implementation for High Area-Efficiency},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181207},
doi = {10.1109/NANOARCH47378.2019.181207},
timestamp = {Tue, 31 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LuSHM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MaJ19,
author = {Dongning Ma and
Xun Jiao},
title = {Detecting and Bypassing Trivial Computations in Convolutional Neural
Networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181286},
doi = {10.1109/NANOARCH47378.2019.181286},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MaJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MaYLLSW19,
author = {Xiaolong Ma and
Geng Yuan and
Sheng Lin and
Zhengang Li and
Hao Sun and
Yanzhi Wang},
title = {ResNet Can Be Pruned 60{\texttimes}: Introducing Network Purification
and Unused Path Removal {(P-RM)} after Weight Pruning},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181304},
doi = {10.1109/NANOARCH47378.2019.181304},
timestamp = {Tue, 21 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MaYLLSW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NtinasRSRN19,
author = {Vasileios G. Ntinas and
Antonio Rubio and
Georgios Ch. Sirakoulis and
Rosana Rodr{\'{\i}}guez and
Montserrat Nafr{\'{\i}}a},
title = {Experimental Investigation of Memristance Enhancement},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181299},
doi = {10.1109/NANOARCH47378.2019.181299},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/NtinasRSRN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PalerB19,
author = {Alexandru Paler and
Robert Basmadjian},
title = {Clifford Gate Optimisation and {T} Gate Scheduling: Using Queueing
Models for Topological Assemblies},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181305},
doi = {10.1109/NANOARCH47378.2019.181305},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PalerB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RallisDSKR19,
author = {Konstantinos Rallis and
Panagiotis Dimitrakis and
Georgios Ch. Sirakoulis and
Ioannis Karafyllidis and
Antonio Rubio},
title = {Effect of Lattice Defects on the Transport Properties of Graphene
Nanoribbon},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181307},
doi = {10.1109/NANOARCH47378.2019.181307},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/RallisDSKR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ThirumalaRNRG19,
author = {Sandeep Krishna Thirumala and
Arnab Raha and
Vijaykrishnan Narayanan and
Vijay Raghunathan and
Sumeet Kumar Gupta},
title = {Non-volatile Logic and Memory based on Reconfigurable Ferroelectric
Transistors},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181302},
doi = {10.1109/NANOARCH47378.2019.181302},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ThirumalaRNRG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangLJC19,
author = {He Wang and
Nicoleta Cucu Laurenciu and
Yande Jiang and
Sorin Dan Cotofana},
title = {Graphene Nanoribbon-based Synapses with Versatile Plasticity},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181301},
doi = {10.1109/NANOARCH47378.2019.181301},
timestamp = {Wed, 22 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangLJC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangS19,
author = {Tao Wang and
Weiwei Shan},
title = {An Energy-Efficient In-Memory {BNN} Architecture With Time-Domain
Analog and Digital Mixed-Signal Processing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181284},
doi = {10.1109/NANOARCH47378.2019.181284},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZHWZZZZ19,
author = {Guanda Wang and
Yue Zhang and
Zhe Huang and
Jinkai Wang and
Kun Zhang and
Zhizhong Zhang and
Youguang Zhang and
Weisheng Zhao},
title = {Thermal Stable and Fast Perpendicular Shape Anisotropy Magnetic Tunnel
Junction},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181282},
doi = {10.1109/NANOARCH47378.2019.181282},
timestamp = {Mon, 01 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZHWZZZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZLWZWZZ19,
author = {Jinkai Wang and
Yue Zhang and
Chenyu Lian and
Guanda Wang and
Kun Zhang and
Xiulong Wu and
Youguang Zhang and
Weisheng Zhao},
title = {High speed and reliable Sensing Scheme with Three Voltages for {STT-MRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181279},
doi = {10.1109/NANOARCH47378.2019.181279},
timestamp = {Mon, 01 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZLWZWZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZZZZZ19,
author = {Chengzhi Wang and
Deming Zhang and
Lang Zeng and
Kaili Zhang and
Youguang Zhang and
Weisheng Zhao},
title = {Low-Power, High-Speed and High-Density Magnetic Non-Volatile {SRAM}
Design with Voltage-Gated Spin-Orbit Torque},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181295},
doi = {10.1109/NANOARCH47378.2019.181295},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZZZZZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuGZTQYL19,
author = {Juejian Wu and
Mingyang Gu and
Hongtao Zhong and
Yunsong Tao and
Fei Qiao and
Huazhong Yang and
Xueqing Li},
title = {Enabling New Computing Paradigms with Emerging Symmetric-Access Memories},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181291},
doi = {10.1109/NANOARCH47378.2019.181291},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WuGZTQYL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuSX19,
author = {Chengjun Wu and
Weiwei Shan and
Jiaming Xu},
title = {ynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative
Error Resilience},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181283},
doi = {10.1109/NANOARCH47378.2019.181283},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WuSX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/XieCY19,
author = {Lei Xie and
Hao Cai and
Jun Yang},
title = {{REAL:} Logic and Arithmetic Operations Embedded in {RRAM} for General-Purpose
Computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181287},
doi = {10.1109/NANOARCH47378.2019.181287},
timestamp = {Thu, 14 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/XieCY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YangLZWY19,
author = {Jianxun Yang and
Leibo Liu and
Jin Zhang and
Shaojun Wei and
Shouyi Yin},
title = {An Energy-Efficient Architecture for Accelerating Inference of Memory-Augmented
Neural Networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181289},
doi = {10.1109/NANOARCH47378.2019.181289},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YangLZWY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YuNLTH19,
author = {Jintao Yu and
Hoang Anh Du Nguyen and
Muath Abu Lebdeh and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Enhanced Scouting Logic: {A} Robust Memristive Logic Design Scheme},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181296},
doi = {10.1109/NANOARCH47378.2019.181296},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YuNLTH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangL0L19,
author = {Tingting Zhang and
Weiqiang Liu and
Jie Han and
Fabrizio Lombardi},
title = {Design and Analysis of Majority Logic Based Approximate Radix-4 Booth
Encoders},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181281},
doi = {10.1109/NANOARCH47378.2019.181281},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangL0L19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhouHLCLY19,
author = {Yongliang Zhou and
Menglin Han and
Mingyue Liu and
Hao Cai and
Bo Liu and
Jun Yang},
title = {A Self-Timing Voltage-Mode Sense Amplifier for {STT-MRAM} Sensing
Yield Improvement},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NANOARCH47378.2019.181288},
doi = {10.1109/NANOARCH47378.2019.181288},
timestamp = {Fri, 04 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhouHLCLY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2019,
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2019, Qingdao, China, July 17-19, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/9060423/proceeding},
isbn = {978-1-7281-5520-3},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BalliouPSKRKG18,
author = {Angelika Balliou and
Jiri Pfleger and
George Skoulatakis and
Samrana Kazim and
Jan Rakusan and
Stella Kennou and
Nikos Glezos},
title = {Programmable Molecular-Nanoparticle Multi-junction Networks for Logic
Operations},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {37--43},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232225},
doi = {10.1145/3232195.3232225},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BalliouPSKRKG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BiglariLF18,
author = {Mehrdad Biglari and
Tobias Lieske and
Dietmar Fey},
title = {High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time
Tunable Resistive States},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {19--24},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232217},
doi = {10.1145/3232195.3232217},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BiglariLF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BoumcheddaNGMRE18,
author = {Reda Boumchedda and
Jean{-}Philippe Noel and
Bastien Giraud and
Adam Makosiej and
Marco Antonio Rios and
Eduardo Esmanhotto and
Emilien Bourde{-}Cic{\'{e}} and
Mathis Bellet and
David Turgis and
Edith Beign{\'{e}}},
title = {Energy-Efficient 4T {SRAM} Bitcell with 2T Read-Port for Ultra-Low-Voltage
Operations in 28 nm 3D Monolithic CoolCubeTM Technology},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {131--137},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232210},
doi = {10.1145/3232195.3232210},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BoumcheddaNGMRE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChatterjeeG18,
author = {Pratima Chatterjee and
Prasun Ghosal},
title = {Power Analysis of an mRNA-Ribosome System},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {141--146},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232223},
doi = {10.1145/3232195.3232223},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChatterjeeG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenJRL18,
author = {Linbin Chen and
Pilin Junsangsri and
Pedro Reviriego and
Fabrizio Lombardi},
title = {{CCE:} {A} Combined {SRAM} and Non Volatile Cache for Endurance of
Next Generation Multilevel Non Volatile Memories in Embedded Systems},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {58--64},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232196},
doi = {10.1145/3232195.3232196},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenJRL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DanialK18,
author = {Loai Danial and
Shahar Kvatinsky},
title = {Real-Time Trainable Data Converters for General Purpose Applications},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {34--36},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232209},
doi = {10.1145/3232195.3232209},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/DanialK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DeshMHTR18,
author = {Rajanikanth Desh and
Naveen Kumar Macha and
Sehtab Hossain and
Repalle Bhavana Tejaswini and
Mostafizur Rahman},
title = {A Novel Analog to Digital Conversion Concept with Crosstalk Computing},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {121--123},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232228},
doi = {10.1145/3232195.3232228},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/DeshMHTR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DingKZZZ18,
author = {Chaoxin Ding and
Wang Kang and
He Zhang and
Youguang Zhang and
Weisheng Zhao},
title = {A Novel Cross-point {MRAM} with Diode Selector Capable of High-Density,
High-Speed, and Low-Power In-Memory Computation},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {72--78},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232218},
doi = {10.1145/3232195.3232218},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/DingKZZZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/EscuderoVRM18,
author = {Manuel Escudero and
Ioannis Vourkas and
Antonio Rubio and
Francesc Moll},
title = {Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {13--18},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232213},
doi = {10.1145/3232195.3232213},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/EscuderoVRM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FoudaEK18,
author = {Mohammed E. Fouda and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
title = {Minimal Disturbed Bits in Writing Resistive Crossbar Memories},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {98--100},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232207},
doi = {10.1145/3232195.3232207},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FoudaEK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FoudaLEK18,
author = {Mohammed E. Fouda and
Jongeun Lee and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
title = {Overcoming Crossbar Nonidealities in Binary Neural Networks Through
Learning},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {31--33},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232226},
doi = {10.1145/3232195.3232226},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FoudaLEK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GravesMSBZLLCKF18,
author = {Catherine E. Graves and
Wen Ma and
Xia Sheng and
Brent Buchanan and
Le Zheng and
Sity Lam and
Xuema Li and
Sai Rahul Chalamalasetti and
Lennie Kiyama and
Martin Foltin and
John Paul Strachan and
Matthew P. Hardy},
title = {Regular Expression Matching with Memristor TCAMs for Network Security},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {65--71},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232201},
doi = {10.1145/3232195.3232201},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/GravesMSBZLLCKF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HassenKB018,
author = {Amad Ul Hassen and
Salman Anwar Khokhar and
Haseeb Aslam Butt and
Sumit Kumar Jha},
title = {Free {BDD} based {CAD} of Compact Memristor Crossbars for in-Memory
Computing},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {107--113},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232222},
doi = {10.1145/3232195.3232222},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HassenKB018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JiangLC18,
author = {Yande Jiang and
Nicoleta Cucu Laurenciu and
Sorin Cotofana},
title = {Complementary Arranged Graphene Nanoribbon-based Boolean Gates},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {51--57},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232199},
doi = {10.1145/3232195.3232199},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JiangLC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KarafyllidisSD18,
author = {Ioannis Karafyllidis and
Georgios Ch. Sirakoulis and
Panagiotis Dimitrakis},
title = {Representation of Qubit States using 3D Memristance Spaces: {A} first
step towards a Memristive Quantum Simulator},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {163--168},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232197},
doi = {10.1145/3232195.3232197},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KarafyllidisSD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiZQ0LY18,
author = {Qin Li and
Huifeng Zhu and
Fei Qiao and
Qi Wei and
Xinjun Liu and
Huazhong Yang},
title = {Energy-efficient {MFCC} extraction architecture in mixed-signal domain
for automatic speech recognition},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {138--140},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232219},
doi = {10.1145/3232195.3232219},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiZQ0LY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiolisMSK18,
author = {Orestis Liolis and
Vassilios A. Mardiris and
Georgios Ch. Sirakoulis and
Ioannis G. Karafyllidis},
title = {Quantum-dot Cellular Automata {RAM} design using Crossbar Architecture},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {86--90},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232216},
doi = {10.1145/3232195.3232216},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiolisMSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MachaGRIDR18,
author = {Naveen Kumar Macha and
Sandeep Geedipally and
Bhavana Tejaswini Repalle and
Md Arif Iqbal and
Wafi Danesh and
Mostafizur Rahman},
title = {Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic
Circuits},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {114--120},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232227},
doi = {10.1145/3232195.3232227},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MachaGRIDR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MalitaS18,
author = {Mihaela Malita and
Gheorghe M. Stefan},
title = {A Recursive Growing {\&} Featuring Mechanism for Nanocomputing
Structures},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {101--106},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232215},
doi = {10.1145/3232195.3232215},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MalitaS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MaragkoudakiMP18,
author = {Eleni Maragkoudaki and
Przemyslaw Mroszczyk and
Vasilis F. Pavlidis},
title = {Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {124--130},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232203},
doi = {10.1145/3232195.3232203},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MaragkoudakiMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MardirisLSK18,
author = {Vassilios A. Mardiris and
Orestis Liolis and
Georgios Ch. Sirakoulis and
Ioannis G. Karafyllidis},
title = {Signal Synchronization in Large Scale Quantum-dot Cellular Automata
Circuits},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {153--156},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232212},
doi = {10.1145/3232195.3232212},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MardirisLSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MorgulTAFCVAMSA18,
author = {Muhammed Ceylan Morg{\"{u}}l and
Onur Tunali and
Mustafa Altun and
Luca Frontini and
Valentina Ciriani and
Elena Ioana Vatajelu and
Lorena Anghel and
Csaba Andras Moritz and
Mircea R. Stan and
Dan Alexandrescu},
title = {Integrated Synthesis Methodology for Crossbar Arrays},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {91--97},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232211},
doi = {10.1145/3232195.3232211},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MorgulTAFCVAMSA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MozaffariGT18,
author = {Seyed Nima Mozaffari and
Krishna Prasad Gnawali and
Spyros Tragoudas},
title = {An Aging Resilient Neural Network Architecture},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {25--30},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232208},
doi = {10.1145/3232195.3232208},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MozaffariGT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NoltsisEMNRCSZS18,
author = {Michail Noltsis and
Panayiotis Englezakis and
Eleni Maragkoudaki and
Chrysostomos Nicopoulos and
Dimitrios Rodopoulos and
Francky Catthoor and
Yiannakis Sazeides and
Davide Zoni and
Dimitrios Soudris},
title = {Fast Estimations of Failure Probability Over Long Time Spans},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {1--6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232198},
doi = {10.1145/3232195.3232198},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NoltsisEMNRCSZS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Paler18,
author = {Alexandru Paler},
title = {Controlling distilleries in fault-tolerant quantum circuits: problem
statement and analysis towards a solution},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {147--152},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232224},
doi = {10.1145/3232195.3232224},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Paler18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RallisSKR18,
author = {Konstantinos Rallis and
Georgios Ch. Sirakoulis and
Ioannis Karafyllidis and
Antonio Rubio},
title = {Multi-Valued Logic Circuits on Graphene Quantum Point Contact Devices},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {44--48},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232214},
doi = {10.1145/3232195.3232214},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/RallisSKR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RienerTASM18,
author = {Heinz Riener and
Eleonora Testa and
Luca G. Amar{\`{u}} and
Mathias Soeken and
Giovanni De Micheli},
title = {Size Optimization of MIGs with an Application to {QCA} and {STMG}
Technologies},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {157--162},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232202},
doi = {10.1145/3232195.3232202},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/RienerTASM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VyasF18,
author = {Vaibhav Vyas and
Joseph S. Friedman},
title = {Sequential Circuit Design with Bilayer Avalanche Spin Diode Logic},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {49--50},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232221},
doi = {10.1145/3232195.3232221},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/VyasF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangHWCZZ18,
author = {Deming Zhang and
Yanchun Hou and
Chengzhi Wang and
Jie Chen and
Lang Zeng and
Weisheng Zhao},
title = {Hardware Acceleration Implementation of Sparse Coding Algorithm with
Spintronic Devices},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {79--85},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232220},
doi = {10.1145/3232195.3232220},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangHWCZZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhuL0L18,
author = {Yuying Zhu and
Weiqiang Liu and
Jie Han and
Fabrizio Lombardi},
title = {A Probabilistic Error Model and Framework for Approximate Booth Multipliers},
booktitle = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
pages = {7--12},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195.3232200},
doi = {10.1145/3232195.3232200},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhuL0L18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2018,
title = {Proceedings of the 14th {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2018, Athens, Greece, July 17-19, 2018},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232195},
doi = {10.1145/3232195},
isbn = {978-1-4503-5815-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AlsuwaiyanM17,
author = {Ali Alsuwaiyan and
Kartik Mohanram},
title = {L\({}^{\mbox{3}}\)EP: Low latency, low energy program-and-verify for
triple-level cell phase change memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {27--32},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053710},
doi = {10.1109/NANOARCH.2017.8053710},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AlsuwaiyanM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BennettQK17,
author = {Christopher H. Bennett and
Damien Querlioz and
Jacques{-}Olivier Klein},
title = {Spatio-temporal learning with arrays of analog nanosynapses},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {125--130},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053708},
doi = {10.1109/NANOARCH.2017.8053708},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BennettQK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BhatKSLM17,
author = {Sachin Bhat and
Sourabh Kulkami and
Jiajun Shi and
Mingyu Li and
Csaba Andras Moritz},
title = {SkyNet: Memristor-based 3D {IC} for artificial neural networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {109--114},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053706},
doi = {10.1109/NANOARCH.2017.8053706},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BhatKSLM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BhuinSPBP17,
author = {Sudipta Bhuin and
Joseph Sweeney and
Samuel Pagliarini and
Ayan Kumar Biswas and
Lawrence T. Pileggi},
title = {A self-calibrating sense amplifier for a true random number generator
using hybrid FinFET-straintronic {MTJ}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {147--152},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053738},
doi = {10.1109/NANOARCH.2017.8053738},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BhuinSPBP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CaiL17,
author = {Fuxi Cai and
Wei D. Lu},
title = {Epsilon-greedy strategy for online dictionary learning with realistic
memristor array constraints},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {19--20},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053730},
doi = {10.1109/NANOARCH.2017.8053730},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/CaiL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChakrabortyRJ17,
author = {Dwaipayan Chakraborty and
Sunny Raj and
Sumit Kumar Jha},
title = {A compact 8-bit adder design using in-memory memristive computing:
Towards solving the Feynman Grand Prize challenge},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {67--72},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053712},
doi = {10.1109/NANOARCH.2017.8053712},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChakrabortyRJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChangWZZ17,
author = {Liang Chang and
Zhaohao Wang and
Youguang Zhang and
Weisheng Zhao},
title = {Reconfigurable processing in memory architecture based on spin orbit
torque},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {95--96},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053713},
doi = {10.1109/NANOARCH.2017.8053713},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChangWZZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenHLL17,
author = {Linbin Chen and
Jie Han and
Weiqiang Liu and
Fabrizio Lombardi},
title = {Design and operational assessment of an intra-cell hybrid {L2} cache},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053709},
doi = {10.1109/NANOARCH.2017.8053709},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenHLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CoiPSTB17,
author = {Odilia Coi and
Guillaume Patrigeon and
Sophiane Senni and
Lionel Torres and
Pascal Benoit},
title = {A novel {SRAM} - {STT-MRAM} hybrid cache implementation improving
cache performance},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {39--44},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053704},
doi = {10.1109/NANOARCH.2017.8053704},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CoiPSTB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DaneshR17,
author = {Wafi Danesh and
Mostafizur Rahman},
title = {Linear regression based multi-state logic decomposition approach for
efficient hardware implementation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {153--154},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053715},
doi = {10.1109/NANOARCH.2017.8053715},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DaneshR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DuttaSBLRB17,
author = {Sumit Dutta and
Saima A. Siddiqui and
Felix Buttner and
Luqiao Liu and
Caroline A. Ross and
Marc A. Baldo},
title = {A logic-in-memory design with 3-terminal magnetic tunnel junction
function evaluators for convolutional neural networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {83--88},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053724},
doi = {10.1109/NANOARCH.2017.8053724},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DuttaSBLRB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GiacominGG17,
author = {Edouard Giacomin and
Jorge Romero Gonzalez and
Pierre{-}Emmanuel Gaillardon},
title = {Low-power multiplexer designs using three-independent-gate field effect
transistors},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {33--38},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053723},
doi = {10.1109/NANOARCH.2017.8053723},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GiacominGG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Hassen17,
author = {Amad Ul Hassen},
title = {Automated synthesis of compact multiplier circuits for in-memory computing
using ROBDDs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {141--146},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053714},
doi = {10.1109/NANOARCH.2017.8053714},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Hassen17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HeAPF17,
author = {Zhezhi He and
Shaahin Angizi and
Farhana Parveen and
Deliang Fan},
title = {High performance and energy-efficient in-memory computing architecture
based on {SOT-MRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {97--102},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053725},
doi = {10.1109/NANOARCH.2017.8053725},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HeAPF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HeittmannN17,
author = {Arne Heittmann and
Tobias G. Noll},
title = {Mixing circuit based on neural associative memories and nanoelectronic
1S1R cells},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {119--124},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053707},
doi = {10.1109/NANOARCH.2017.8053707},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HeittmannN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HuF17,
author = {Xuan Hu and
Joseph S. Friedman},
title = {Transient model with interchangeability for dual-gate ambipolar {CNTFET}
logic design},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {61--66},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053711},
doi = {10.1109/NANOARCH.2017.8053711},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HuF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JunsangsriL17,
author = {Salin Junsangsri and
Fabrizio Lombardi},
title = {AOI-based data-centric circuits for near-memory processing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {7--12},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053735},
doi = {10.1109/NANOARCH.2017.8053735},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JunsangsriL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LefterMVC17,
author = {Mihai Lefter and
Thomas Marconi and
George Razvan Voicu and
Sorin Dan Cotofana},
title = {Low cost multi-error correction for 3D polyhedral memories},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {13--18},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053722},
doi = {10.1109/NANOARCH.2017.8053722},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LefterMVC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LevisseRGNMP17,
author = {Alexandre Levisse and
Pablo Royer and
Bastien Giraud and
Jean{-}Philippe No{\"{e}}l and
Mathieu Moreau and
Jean{-}Michel Portal},
title = {Architecture, design and technology guidelines for crosspoint memories},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {55--60},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053733},
doi = {10.1109/NANOARCH.2017.8053733},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LevisseRGNMP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiSBM17,
author = {Mingyu Li and
Jiajun Shi and
Sachin Bhat and
Csaba Andras Moritz},
title = {Fine-grained 3D reconfigurable computing fabric with {RRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {79--80},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053721},
doi = {10.1109/NANOARCH.2017.8053721},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiSBM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MachaGR17,
author = {Naveen Kumar Macha and
Sandeep Geedipally and
Mostafizur Rahman},
title = {Ultra high density 3D {SRAM} cell design in Stacked Horizontal Nanowire
{(SN3D)} fabric},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {155--161},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053734},
doi = {10.1109/NANOARCH.2017.8053734},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MachaGR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/QinZGZLZZ17,
author = {Xiaowan Qin and
Lang Zeng and
Tianqi Gao and
Deming Zhang and
Mingzhi Long and
Youguang Zhang and
Weisheng Zhao},
title = {Proposal for novel magnetic memory device with spin momentum locking
materials},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {45--46},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053717},
doi = {10.1109/NANOARCH.2017.8053717},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/QinZGZLZZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RakhejaK17,
author = {Shaloo Rakheja and
N. Kani},
title = {Polymorphic spintronic logic gates for hardware security primitives
- Device design and performance benchmarking},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {131--132},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053726},
doi = {10.1109/NANOARCH.2017.8053726},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RakhejaK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ScharnhorstWTSG17,
author = {Kelsey Scharnhorst and
Walt Woods and
Christof Teuscher and
Adam Z. Stieg and
James K. Gimzewski},
title = {Non-temporal logic performance of an atomic switch network},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {133--138},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053728},
doi = {10.1109/NANOARCH.2017.8053728},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ScharnhorstWTSG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SharmaMB17,
author = {Nishtha Sharma and
Andrew Marshall and
Jonathan Bird},
title = {Verilog - {A} compact model of a {ME-MTJ} based {XNOR/NOR} gate},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {162--167},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053716},
doi = {10.1109/NANOARCH.2017.8053716},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SharmaMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShiLM17,
author = {Jiajun Shi and
Mingyu Li and
Csaba Andras Moritz},
title = {Power-delivery network in 3D ICs: Monolithic 3D vs. Skybridge 3D {CMOS}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {73--78},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053736},
doi = {10.1109/NANOARCH.2017.8053736},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ShiLM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TahaT17,
author = {Mohammad Mahmoud A. Taha and
Christof Teuscher},
title = {Naive Bayesian inference of handwritten digits using a memristive
associative memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {139--140},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053732},
doi = {10.1109/NANOARCH.2017.8053732},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TahaT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TranT17,
author = {S. J. Dat Tran and
Christof Teuscher},
title = {Memcapacitive reservoir computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {115--116},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053719},
doi = {10.1109/NANOARCH.2017.8053719},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TranT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VasudevanMDS17,
author = {Dilip P. Vasudevan and
George Michelogiannakis and
David Donofrio and
John Shalf},
title = {{CASPER} - Configurable design space exploration of programmable architectures
for machine learning using beyond moore devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {117--118},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053720},
doi = {10.1109/NANOARCH.2017.8053720},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VasudevanMDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VatajeluA17,
author = {Elena Ioana Vatajelu and
Lorena Anghel},
title = {Fully-connected single-layer STT-MTJ-based spiking neural network
under process variability},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {21--26},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053727},
doi = {10.1109/NANOARCH.2017.8053727},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VatajeluA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZZNZWZZZ17,
author = {Guanda Wang and
Yue Zhang and
Zhizhong Zhang and
Jiang Nan and
Zhenyi Zheng and
Yu Wang and
Lang Zeng and
Youguang Zhang and
Weisheng Zhao},
title = {Compact modeling of high spin transfer torque efficiency double-barrier
magnetic tunnel junction},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {49--54},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053705},
doi = {10.1109/NANOARCH.2017.8053705},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZZNZWZZZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WoodsT17,
author = {Walt Woods and
Christof Teuscher},
title = {Approximate vector matrix multiplication implementations for neuromorphic
applications using memristive crossbars},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {103--108},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053729},
doi = {10.1109/NANOARCH.2017.8053729},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WoodsT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YogendraK017,
author = {Karthik Yogendra and
Minsuk Koo and
Kaushik Roy},
title = {Energy efficient computation using injection locked bias-field free
spin-hall nano-oscillator array with shared heavy metal},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {89--94},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053737},
doi = {10.1109/NANOARCH.2017.8053737},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YogendraK017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangZGZQLZYZ17,
author = {Zuodong Zhang and
Lang Zeng and
Tianqi Gao and
Deming Zhang and
Xiaowan Qin and
Mingzhi Long and
Youguang Zhang and
Haiming Yu and
Weisheng Zhao},
title = {Frequency modulation of spin torque nano oscillator with voltage controlled
magnetic anisotropy effect},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {47--48},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053718},
doi = {10.1109/NANOARCH.2017.8053718},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangZGZQLZYZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZidanJL17,
author = {Mohammed Affan Zidan and
YeonJoo Jeong and
Wei D. Lu},
title = {Hybrid neural network using binary {RRAM} devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
pages = {81--82},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NANOARCH.2017.8053731},
doi = {10.1109/NANOARCH.2017.8053731},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZidanJL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2017,
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2017, Newport, RI, USA, July 25-26, 2017},
publisher = {{IEEE}},
year = {2017},
url = {https://ieeexplore.ieee.org/xpl/conhome/8048800/proceeding},
isbn = {978-1-5090-6037-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AlaweinF16,
author = {Meshal Alawein and
Hossein Fariborzi},
title = {Improved circuit model for all-spin logic},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {135--140},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950075},
doi = {10.1145/2950067.2950075},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AlaweinF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CaiWNWZ16,
author = {Hao Cai and
You Wang and
Lirida A. B. Naviner and
Zhaohao Wang and
Weisheng Zhao},
title = {Approximate computing in MOS/spintronic non-volatile full-adder},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {203--208},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950101},
doi = {10.1145/2950067.2950101},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/CaiWNWZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CalvetFQBD16,
author = {Laurie E. Calvet and
Joseph S. Friedman and
Damien Querlioz and
Pierre Bessi{\`{e}}re and
Jacques Droulez},
title = {Sleep stage classification with stochastic Bayesian inference},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {117--122},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950085},
doi = {10.1145/2950067.2950085},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/CalvetFQBD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CaoLWCL16,
author = {Tian Cao and
Weiqiang Liu and
Chenghua Wang and
Xiao{-}Ping Cui and
Fabrizio Lombardi},
title = {Design of approximate Redundant Binary multipliers},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {31--36},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950094},
doi = {10.1145/2950067.2950094},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CaoLWCL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChangWGKZZ16,
author = {Liang Chang and
Zhaohao Wang and
Yuqian Gao and
Wang Kang and
Youguang Zhang and
Weisheng Zhao},
title = {Evaluation of spin-Hall-assisted {STT-MRAM} for cache replacement},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {73--78},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950107},
doi = {10.1145/2950067.2950107},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChangWGKZZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenLHL16,
author = {Linbin Chen and
Fabrizio Lombardi and
Jie Han and
Weiqiang Liu},
title = {A fully parallel approximate {CORDIC} design},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {197--202},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950076},
doi = {10.1145/2950067.2950076},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenLHL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChengWSLLC16,
author = {Hsin{-}Pai Cheng and
Wei Wen and
Chang Song and
Beiye Liu and
Hai Li and
Yiran Chen},
title = {Exploring the optimal learning technique for {IBM} TrueNorth platform
to overcome quantization loss},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {185--190},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950096},
doi = {10.1145/2950067.2950096},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChengWSLLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DengAPZ16,
author = {Erya Deng and
Lorena Anghel and
Guillaume Prenat and
Weisheng Zhao},
title = {Multi-context non-volatile content addressable memory using magnetic
tunnel junctions},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {103--108},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950106},
doi = {10.1145/2950067.2950106},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/DengAPZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DuttaPB16,
author = {Sumit Dutta and
Michael Price and
Marc A. Baldo},
title = {Nonvolatile online {CMOS} trimming with magnetic tunnel junctions},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {61--66},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950091},
doi = {10.1145/2950067.2950091},
timestamp = {Tue, 23 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/DuttaPB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Fan16,
author = {Deliang Fan},
title = {Low power in-memory computing platform with four Terminal magnetic
Domain Wall Motion devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {153--158},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950084},
doi = {10.1145/2950067.2950084},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Fan16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GuptaMVACA16,
author = {Navneet Gupta and
Adam Makosiej and
Andrei Vladimirescu and
Amara Amara and
Sorin Cotofana and
Costin Anghel},
title = {{TFET} {NDR} skewed inverter based sensing method},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {13--14},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950069},
doi = {10.1145/2950067.2950069},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/GuptaMVACA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HurK16,
author = {Rotem Ben Hur and
Shahar Kvatinsky},
title = {Memory Processing Unit for in-memory processing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {171--172},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950086},
doi = {10.1145/2950067.2950086},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HurK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JiangLMLH16,
author = {Honglan Jiang and
Cong Liu and
Naman Maheshwari and
Fabrizio Lombardi and
Jie Han},
title = {A comparative evaluation of approximate multipliers},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {191--196},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950068},
doi = {10.1145/2950067.2950068},
timestamp = {Thu, 30 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JiangLMLH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JinLL16,
author = {Yingyezhe Jin and
Yu Liu and
Peng Li},
title = {{SSO-LSM:} {A} Sparse and Self-Organizing architecture for Liquid
State Machine based neural processors},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {55--60},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950100},
doi = {10.1145/2950067.2950100},
timestamp = {Thu, 31 Oct 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JinLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhaleghiVBR16,
author = {Soroush Khaleghi and
Paolo Vinella and
Soumya Banerjee and
Wenjing Rao},
title = {An {STT-MRAM} based strong {PUF}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {129--134},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950080},
doi = {10.1145/2950067.2950080},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KhaleghiVBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LaurenciuGSC16,
author = {Nicoleta Cucu Laurenciu and
Tushar Gupta and
Valentin Savin and
Sorin Dan Cotofana},
title = {Error Correction Code protected Data Processing Units},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {37--42},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950093},
doi = {10.1145/2950067.2950093},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LaurenciuGSC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LevisseGNMP16,
author = {Alexandre Levisse and
Bastien Giraud and
Jean{-}Philippe Noel and
Mathieu Moreau and
Jean{-}Michel Portal},
title = {Capacitor based SneakPath compensation circuit for transistor-less
ReRAM architectures},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {7--12},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950073},
doi = {10.1145/2950067.2950073},
timestamp = {Fri, 24 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LevisseGNMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiKSBRM16,
author = {Mingyu Li and
Santosh Khasanvis and
Jiajun Shi and
Sachin Bhat and
Mostafizur Rahman and
Csaba Andras Moritz},
title = {Towards automatic thermal network extraction in 3D ICs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {25--30},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950095},
doi = {10.1145/2950067.2950095},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiKSBRM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MachaIR16,
author = {Naveen Kumar Macha and
Md Arif Iqbal and
Mostafizur Rahman},
title = {Fine-grained 3-D {CMOS} concept using stacked horizontal nanowire},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {151--152},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950079},
doi = {10.1145/2950067.2950079},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MachaIR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NguyenXTHB16,
author = {Hoang Anh Du Nguyen and
Lei Xie and
Mottaqiallah Taouil and
Said Hamdioui and
Koen Bertels},
title = {Synthesizing {HDL} to memristor technology: {A} generic framework},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {43--48},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950098},
doi = {10.1145/2950067.2950098},
timestamp = {Mon, 26 Mar 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/NguyenXTHB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NiHY16,
author = {Leibin Ni and
Hantao Huang and
Hao Yu},
title = {A memristor network with coupled oscillator and crossbar towards L2-norm
based machine learning},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {179--184},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950083},
doi = {10.1145/2950067.2950083},
timestamp = {Tue, 24 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/NiHY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OuyangYXLW16,
author = {Peng Ouyang and
Shouyi Yin and
Chunxiao Xing and
Leibo Liu and
Shaojun Wei},
title = {Energy management on {DVS} based coarse-grained reconfigurable platform},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {49--54},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950097},
doi = {10.1145/2950067.2950097},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/OuyangYXLW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/QianGHAAW16,
author = {Fengyu Qian and
Yanping Gong and
Guoxian Huang and
Kiarash Ahi and
Mehdi Anwar and
Lei Wang},
title = {A memristor-based compressive sensing architecture},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {109--114},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950081},
doi = {10.1145/2950067.2950081},
timestamp = {Fri, 16 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/QianGHAAW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShahsavariFB16,
author = {Mahyar Shahsavari and
Pierre Falez and
Pierre Boulet},
title = {Combining a volatile and nonvolatile memristor in artificial synapse
to improve learning in Spiking Neural Networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {67--72},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950090},
doi = {10.1145/2950067.2950090},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ShahsavariFB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShiLKRM16,
author = {Jiajun Shi and
Mingyu Li and
Santosh Khasanvis and
Mostafizur Rahman and
Csaba Andras Moritz},
title = {Routability in 3D {IC} design: Monolithic 3D vs. Skybridge 3D {CMOS}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {145--150},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950078},
doi = {10.1145/2950067.2950078},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ShiLKRM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShiWGCKZZ16,
author = {Qian Shi and
Zhaohao Wang and
Yuqian Gao and
Liang Chang and
Wang Kang and
Youguang Zhang and
Weisheng Zhao},
title = {A spin Hall effect-based multi-level cell for {MRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {143--144},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950104},
doi = {10.1145/2950067.2950104},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ShiWGCKZZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TahaWT16,
author = {Mohammad Mahmoud A. Taha and
Walt Woods and
Christof Teuscher},
title = {Approximate in-memory Hamming distance calculation with a memristive
associative memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {159--164},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/1235},
doi = {10.1145/1235},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/TahaWT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TestaSZARLGM16,
author = {Eleonora Testa and
Mathias Soeken and
Odysseas Zografos and
Luca Gaetano Amar{\`{u}} and
Praveen Raghavan and
Rudy Lauwereins and
Pierre{-}Emmanuel Gaillardon and
Giovanni De Micheli},
title = {Inversion optimization in Majority-Inverter Graphs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {15--20},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950072},
doi = {10.1145/2950067.2950072},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/TestaSZARLGM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangCNKYZ16,
author = {You Wang and
Hao Cai and
Lirida A. B. Naviner and
Jacques{-}Olivier Klein and
Jianlei Yang and
Weisheng Zhao},
title = {A novel circuit design of true random number generator using magnetic
tunnel junction},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {123--128},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950108},
doi = {10.1145/2950067.2950108},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangCNKYZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangHLY16,
author = {Zhibo Wang and
Rui Hua and
Yongpan Liu and
Huazhong Yang},
title = {A compare-and-select error tolerant scheme for nonvolatile processors},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {21--22},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950092},
doi = {10.1145/2950067.2950092},
timestamp = {Mon, 27 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangHLY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangTP16,
author = {Xiaoxiao Wang and
Robin Tan and
Marek A. Perkowski},
title = {Synthesis of memristive circuits based on stateful {IMPLY} gates using
an evolutionary algorithm with a correction function},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {97--102},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950087},
doi = {10.1145/2950067.2950087},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangTP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZZS16,
author = {Xiaoyang Wang and
Chao Zhang and
Xian Zhang and
Guangyu Sun},
title = {np-ECC: Nonadjacent position error correction code for racetrack memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {23--24},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950082},
doi = {10.1145/2950067.2950082},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZZS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YangPQAC16,
author = {Bo Yang and
Emanuel M. Popovici and
Michael Alan Quille and
Andreas Amann and
Sorin Cotofana},
title = {A supply voltage-dependent variation aware reliability evaluation
model},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {79--84},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950089},
doi = {10.1145/2950067.2950089},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/YangPQAC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YuNHHCB16,
author = {Jintao Yu and
Razvan Nane and
Adib Haron and
Said Hamdioui and
Henk Corporaal and
Koen Bertels},
title = {Skeleton-based design and simulation flow for Computation-in-Memory
architectures},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {165--170},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950071},
doi = {10.1145/2950067.2950071},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/YuNHHCB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangKPLZZ16,
author = {He Zhang and
Wang Kang and
Tingting Pang and
Weifeng Lv and
Youguang Zhang and
Weisheng Zhao},
title = {Dual reference sensing scheme with triple steady states for deeply
scaled {STT-MRAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {1--6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950102},
doi = {10.1145/2950067.2950102},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangKPLZZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangZS16,
author = {Weiqi Zhang and
Chao Zhang and
Guangyu Sun},
title = {Accelerate context switch by racetrack-SRAM hybrid cells},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {115--116},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950070},
doi = {10.1145/2950067.2950070},
timestamp = {Sat, 18 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangZS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangZYSSZZ16,
author = {Zhizhong Zhang and
Yue Zhang and
Lei Yue and
Li Su and
Yichuan Shi and
Youguang Zhang and
Weisheng Zhao},
title = {Ultra-low power all spin logic device acceleration based on voltage
controlled magnetic anisotropy},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {141--142},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950103},
doi = {10.1145/2950067.2950103},
timestamp = {Thu, 04 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangZYSSZZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhangZZZK16,
author = {Deming Zhang and
Lang Zeng and
Youguang Zhang and
Weisheng Zhao and
Jacques{-}Olivier Klein},
title = {Stochastic spintronic device based synapses and spiking neurons for
neuromorphic computation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {173--178},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2950067.2950105},
doi = {10.1145/2950067.2950105},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhangZZZK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2016,
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
publisher = {{ACM}},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7556233/proceeding},
isbn = {978-1-4503-4330-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Xie16,
title = {Mosaic: {A} scheme of mapping non-volatile Boolean logic on memristor
crossbar},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {91--96},
publisher = {{ACM}},
year = {2016},
note = {Withdrawn.},
url = {https://doi.org/10.1145/2950067.2950088},
doi = {10.1145/2950067.2950088},
timestamp = {Tue, 25 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Xie16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/XieH16,
title = {{MECRO:} {A} local processing computer architecture based on memristor
crossbar},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2016, Beijing, China, July 18-20, 2016},
pages = {85--90},
publisher = {{ACM}},
year = {2016},
note = {Withdrawn.},
url = {https://doi.org/10.1145/2950067.2950099},
doi = {10.1145/2950067.2950099},
timestamp = {Tue, 25 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/XieH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AlsuwaiyanM15,
author = {Ali Alsuwaiyan and
Kartik Mohanram},
title = {{MFNW:} {A} Flip-N-Write architecture for multi-level cell non-volatile
memories},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180577},
doi = {10.1109/NANOARCH.2015.7180577},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AlsuwaiyanM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AnSKBOZ15,
author = {Qi An and
Li Su and
Jacques{-}Olivier Klein and
S{\'{e}}bastien Le Beux and
Ian O'Connor and
Weisheng Zhao},
title = {Full-adder circuit design based on all-spin logic device},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {163--168},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180606},
doi = {10.1109/NANOARCH.2015.7180606},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AnSKBOZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BennettCCJDQK15,
author = {Christopher H. Bennett and
Djaafar Chabi and
Theo Cabaret and
Bruno Jousselme and
Vincent Derycke and
Damien Querlioz and
Jacques{-}Olivier Klein},
title = {Supervised learning with organic memristor devices and prospects for
neural crossbar arrays},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {181--186},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180609},
doi = {10.1109/NANOARCH.2015.7180609},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BennettCCJDQK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BurgerGST15,
author = {Jens B{\"{u}}rger and
Alireza Goudarzi and
Darko Stefanovic and
Christof Teuscher},
title = {Hierarchical composition of memristive networks for real-time computing},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180583},
doi = {10.1109/NANOARCH.2015.7180583},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BurgerGST15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenLH15,
author = {Ke Chen and
Fabrizio Lombardi and
Jie Han},
title = {Matrix multiplication by an inexact systolic array},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {151--156},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180604},
doi = {10.1109/NANOARCH.2015.7180604},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenLH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DeBenedictisCHM15,
author = {Erik P. DeBenedictis and
Jeanine E. Cook and
Mark Hoemmen and
Tzevetan S. Metodi},
title = {Optimal adiabatic scaling and the processor-in-memory-and-storage
architecture {(OAS+PIMS)}},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180589},
doi = {10.1109/NANOARCH.2015.7180589},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DeBenedictisCHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DengWWKDPZ15,
author = {Erya Deng and
You Wang and
Zhaohao Wang and
Jacques{-}Olivier Klein and
Bernard Dieny and
Guillaume Prenat and
Weisheng Zhao},
title = {Robust magnetic full-adder with voltage sensing 2T/2MTJ cell},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {27--32},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180582},
doi = {10.1109/NANOARCH.2015.7180582},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DengWWKDPZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FriedmanQS15,
author = {Joseph S. Friedman and
Damien Querlioz and
Alan V. Sahakian},
title = {Magnetoresistance implications for complementary magnetic tunnel junction
logic {(CMAT)}},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {143--144},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180602},
doi = {10.1109/NANOARCH.2015.7180602},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FriedmanQS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GarbinVBARCGGDP15,
author = {Daniele Garbin and
Elisa Vianello and
Olivier Bichler and
M. Azzaz and
Quentin Rafhay and
Philippe Candelier and
Christian Gamrat and
G{\'{e}}rard Ghibaudo and
Barbara De Salvo and
Luca Perniola},
title = {On the impact of OxRAM-based synapses variability on convolutional
neural networks performance},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {193--198},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180611},
doi = {10.1109/NANOARCH.2015.7180611},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GarbinVBARCGGDP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GermuthA15,
author = {Aaron Germuth and
Alex Aravind},
title = {From kekule cells to molecular switches},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {118--123},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180597},
doi = {10.1109/NANOARCH.2015.7180597},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GermuthA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HaaswijkAGM15,
author = {Winston Haaswijk and
Luca Gaetano Amar{\`{u}} and
Pierre{-}Emmanuel Gaillardon and
Giovanni De Micheli},
title = {{NEM} relay design with biconditional binary decision diagrams},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180585},
doi = {10.1109/NANOARCH.2015.7180585},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HaaswijkAGM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HasanYT15,
author = {Raqibul Hasan and
Chris Yakopcic and
Tarek M. Taha},
title = {Ex-situ training of dense memristor crossbar for neuromorphic applications},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {75--81},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180590},
doi = {10.1109/NANOARCH.2015.7180590},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HasanYT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ImaniPR15,
author = {Mohsen Imani and
Shruti Patil and
Tajana Simunic Rosing},
title = {Hierarchical design of robust and low data dependent FinFET based
{SRAM} array},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {63--68},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180588},
doi = {10.1109/NANOARCH.2015.7180588},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ImaniPR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KatayamaYNNT15,
author = {Yasunao Katayama and
Toshiyuki Yamane and
Daiju Nakano and
Ryosho Nakane and
Gouhei Tanaka},
title = {Wave-based device scaling concept for brain-like energy efficiency
and integration},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {23--24},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180580},
doi = {10.1109/NANOARCH.2015.7180580},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KatayamaYNNT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisLRFBAB15,
author = {Santosh Khasanvis and
Mingyu Li and
Mostafizur Rahman and
Mohammad Salehi Fashami and
Ayan Kumar Biswas and
Jayasimha Atulasimha and
Supriyo Bandyopadhyay and
Csaba Andras Moritz},
title = {Physically equivalent magneto-electric nanoarchitecture for probabilistic
reasoning},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {25--26},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180581},
doi = {10.1109/NANOARCH.2015.7180581},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisLRFBAB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisRLSM15,
author = {Santosh Khasanvis and
Mostafizur Rahman and
Mingyu Li and
Jiajun Shi and
Csaba Andras Moritz},
title = {Architecting connectivity for fine-grained 3-D vertically integrated
circuits},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {175--180},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180608},
doi = {10.1109/NANOARCH.2015.7180608},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisRLSM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Lastras-Montano15,
author = {Miguel Angel Lastras{-}Monta{\~{n}}o and
Amirali Ghofrani and
Kwang{-}Ting Cheng},
title = {Architecting energy efficient crossbar-based memristive random-access
memories},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180575},
doi = {10.1109/NANOARCH.2015.7180575},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Lastras-Montano15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MozaffariTH15,
author = {Seyed Nima Mozaffari and
Spyros Tragoudas and
Themistoklis Haniotakis},
title = {Fast march tests for defects in resistive memory},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {88--93},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180592},
doi = {10.1109/NANOARCH.2015.7180592},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MozaffariTH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NguyenXTNHB15,
author = {Hoang Anh Du Nguyen and
Lei Xie and
Mottaqiallah Taouil and
Razvan Nane and
Said Hamdioui and
Koen Bertels},
title = {Computation-in-memory based parallel adder},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {57--62},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180587},
doi = {10.1109/NANOARCH.2015.7180587},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NguyenXTNHB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OnizawaMTH15,
author = {Naoya Onizawa and
Akira Mochizuki and
Akira Tamakoshi and
Takahiro Hanyu},
title = {A sudden power-outage resilient nonvolatile microprocessor for immediate
system recovery},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180584},
doi = {10.1109/NANOARCH.2015.7180584},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OnizawaMTH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PardueSB15,
author = {Colin Pardue and
Madhavan Swaminathan and
John Bosco Balaguru},
title = {Lossy frequency selective surfaces for gas sensing using ZnO films},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {19--20},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180578},
doi = {10.1109/NANOARCH.2015.7180578},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PardueSB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PayvandT15,
author = {Melika Payvand and
Luke Theogarajan},
title = {Exploiting local connectivity of {CMOL} architecture for highly parallel
orientation selective neuromorphic chips},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {187--192},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180610},
doi = {10.1109/NANOARCH.2015.7180610},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PayvandT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PouyanAR15,
author = {Peyman Pouyan and
Esteve Amat and
Antonio Rubio},
title = {Analysis and design of an adaptive proactive reconfiguration approach
for memristive crossbar memories},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {100--105},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180594},
doi = {10.1109/NANOARCH.2015.7180594},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PouyanAR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RahmanKSLM15,
author = {Mostafizur Rahman and
Santosh Khasanvis and
Jiajun Shi and
Mingyu Li and
Csaba Andras Moritz},
title = {Architecting 3-D integrated circuit fabric with intrinsic thermal
management features},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {157--162},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180605},
doi = {10.1109/NANOARCH.2015.7180605},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RahmanKSLM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Rakheja15,
author = {Shaloo Rakheja},
title = {Fundamental limits of energy dissipation in spintronic interconnects
using optical spin pumping},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {21--22},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180579},
doi = {10.1109/NANOARCH.2015.7180579},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Rakheja15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RoyerGL15,
author = {Pablo Royer and
Fernando Garc{\'{\i}}a{-}Redondo and
Marisa L{\'{o}}pez{-}Vallejo},
title = {Evolution of radiation-induced soft errors in FinFET SRAMs under process
variations beyond 22nm},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {112--117},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180596},
doi = {10.1109/NANOARCH.2015.7180596},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RoyerGL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SeyediKCCNU15,
author = {Azam Seyedi and
Vasileios Karakostas and
Stefan Cosemans and
Adri{\'{a}}n Cristal and
Mario Nemirovsky and
Osman S. Unsal},
title = {NEMsCAM: {A} novel {CAM} cell based on nano-electro-mechanical switch
and {CMOS} for energy efficient TLBs},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180586},
doi = {10.1109/NANOARCH.2015.7180586},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SeyediKCCNU15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SheridanL15,
author = {Patrick Sheridan and
Wei D. Lu},
title = {Defect consideratons for robust sparse coding using memristor arrays},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {137--138},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180600},
doi = {10.1109/NANOARCH.2015.7180600},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SheridanL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShiLRKM15,
author = {Jiajun Shi and
Mingyu Li and
Mostafizur Rahman and
Santosh Khasanvis and
Csaba Andras Moritz},
title = {Architecting NP-Dynamic Skybridge},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180607},
doi = {10.1109/NANOARCH.2015.7180607},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ShiLRKM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TahaM15,
author = {Mohammad Mahmoud A. Taha and
Wim J. C. Melis},
title = {Analogue auto-associative memory using a multi-valued memristive memory
cell},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {94--99},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180593},
doi = {10.1109/NANOARCH.2015.7180593},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TahaM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TunaliA15,
author = {Onur Tunali and
Mustafa Alton},
title = {Defect tolerance in diode, FET, and four-terminal switch based nano-crossbar
arrays},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {82--87},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180591},
doi = {10.1109/NANOARCH.2015.7180591},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TunaliA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VelasquezJ15,
author = {Alvaro Velasquez and
Sumit Kumar Jha},
title = {Automated synthesis of crossbars for nanoscale computing using formal
methods},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {130--136},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180599},
doi = {10.1109/NANOARCH.2015.7180599},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VelasquezJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WoodsTTBT15,
author = {Walt Woods and
Mohammad Mahmoud A. Taha and
S. J. Dat Tran and
Jens B{\"{u}}rger and
Christof Teuscher},
title = {Memristor panic - {A} survey of different device models in crossbar
architectures},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {106--111},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180595},
doi = {10.1109/NANOARCH.2015.7180595},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WoodsTTBT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuCWTSTZ15,
author = {Bi Wu and
Yuanqing Cheng and
Ying Wang and
Aida Todri{-}Sanial and
Guangyu Sun and
Lionel Torres and
Weisheng Zhao},
title = {An architecture-level cache simulation framework supporting advanced
{PMA} {STT-MRAM}},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180576},
doi = {10.1109/NANOARCH.2015.7180576},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WuCWTSTZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/XieNTHB15,
author = {Lei Xie and
Hoang Anh Du Nguyen and
Mottaqiallah Taouil and
Said Hamdioui and
Koen Bertels},
title = {Interconnect networks for memristor crossbar},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {124--129},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180598},
doi = {10.1109/NANOARCH.2015.7180598},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/XieNTHB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YangHL15,
author = {Zhixi Yang and
Jie Han and
Fabrizio Lombardi},
title = {Transmission gate-based approximate adders for inexact computing},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180603},
doi = {10.1109/NANOARCH.2015.7180603},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YangHL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZamanidoostKSK15,
author = {Elham Zamanidoost and
Michael Klachko and
Dmitri B. Strukov and
Irina Kataeva},
title = {Low area overhead in-situ training approach for memristor-based classifier},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {139--142},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180601},
doi = {10.1109/NANOARCH.2015.7180601},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZamanidoostKSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2015,
title = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7164206/proceeding},
isbn = {978-1-4673-7849-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BurgerT14,
author = {Jens B{\"{u}}rger and
Christof Teuscher},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Volatile memristive devices as short-term memory in a neuromorphic
learning architecture},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {104--109},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880493},
doi = {10.1109/NANOARCH.2014.6880493},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BurgerT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChabiWZK14,
author = {Djaafar Chabi and
Zhaohao Wang and
Weisheng Zhao and
Jacques{-}Olivier Klein},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {On-chip supervised learning rule for ultra high density neural crossbar
using memristor for synapse and neuron},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {7--12},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880483},
doi = {10.1109/NANOARCH.2014.6880483},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChabiWZK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenYW14,
author = {Wanlong Chen and
Xiao Yang and
Frank Zhigang Wang},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Memristor content addressable memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {83--87},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880476},
doi = {10.1109/NANOARCH.2014.6880476},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenYW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ColliauxBD14,
author = {David Colliaux and
Pierre Bessi{\`{e}}re and
Jacques Droulez},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Robust sequence storage in bistable oscillators},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {90--91},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880484},
doi = {10.1109/NANOARCH.2014.6880484},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ColliauxBD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DezanZ14,
author = {Catherine Dezan and
Sara Zermani},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Stochastic reliability evaluation of Sea-of-Tiles based on Double
Gate controllable-polarity FETs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {169--170},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880507},
doi = {10.1109/NANOARCH.2014.6880507},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DezanZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DgienPHLM14,
author = {David B. Dgien and
Poovaiah M. Palangappa and
Nathan Altay Hunter and
Jiayin Li and
Kartik Mohanram},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Compression architecture for bit-write reduction in non-volatile memory
technologies},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {51--56},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880482},
doi = {10.1109/NANOARCH.2014.6880482},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DgienPHLM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Diez-GarciaVIQ14,
author = {Miguel Diez{-}Garcia and
Adrien F. Vincent and
Nicolas Izard and
Damien Querlioz},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Monte Carlo simulations of carbon nanotube networks for optoelectronic
applications},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {135--136},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880498},
doi = {10.1109/NANOARCH.2014.6880498},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Diez-GarciaVIQ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DuttaS14,
author = {Sumit Dutta and
Vladimir Stojanovic},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Floating-point unit design with nano-electro-mechanical {(NEM)} relays},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {145--150},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880487},
doi = {10.1109/NANOARCH.2014.6880487},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DuttaS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GiriVCRGZ14,
author = {Davide Giri and
Marco Vacca and
Giovanni Causapruno and
Wenjing Rao and
Mariagrazia Graziano and
Maurizio Zamboni},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A standard cell approach for MagnetoElastic {NML} circuits},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {65--70},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880491},
doi = {10.1109/NANOARCH.2014.6880491},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GiriVCRGZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GoudarziLST14,
author = {Alireza Goudarzi and
Matthew R. Lakin and
Darko Stefanovic and
Christof Teuscher},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A model for variation- and fault-tolerant digital logic using self-assembled
nanowire architectures},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {116--121},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880504},
doi = {10.1109/NANOARCH.2014.6880504},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GoudarziLST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HuangZL14,
author = {Kejie Huang and
Rong Zhao and
Yong Lian},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {{STT-MRAM} based low power synchronous non-volatile logic with timing
demultiplexing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {31--36},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880495},
doi = {10.1109/NANOARCH.2014.6880495},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HuangZL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JunsangsriLH14,
author = {Pilin Junsangsri and
Fabrizio Lombardi and
Jie Han},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A memristor-based {TCAM} (Ternary Content Addressable Memory) cell},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {1--6},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880478},
doi = {10.1109/NANOARCH.2014.6880478},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JunsangsriLH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JunsangsriLH14a,
author = {Pilin Junsangsri and
Fabrizio Lombardi and
Jie Han},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {{HSPICE} macromodel of a Programmable Metallization Cell {(PMC)} and
its application to memory design},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {45--50},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880477},
doi = {10.1109/NANOARCH.2014.6880477},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JunsangsriLH14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KaniN14,
author = {Nickvash Kani and
Azad Naeemi},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Pipeline design in spintronic circuits},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {110--115},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880496},
doi = {10.1109/NANOARCH.2014.6880496},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KaniN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisRRM14,
author = {Santosh Khasanvis and
Mostafizur Rahman and
Sankara Narayanan Rajapandian and
Csaba Andras Moritz},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Wave-based multi-valued computation framework},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {171--176},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880494},
doi = {10.1109/NANOARCH.2014.6880494},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisRRM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LefterEVC14,
author = {Mihai Lefter and
Marius Enachescu and
George Razvan Voicu and
Sorin Dan Cotofana},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Energy effective 3D stacked hybrid {NEMFET-CMOS} caches},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {151--156},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880506},
doi = {10.1109/NANOARCH.2014.6880506},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LefterEVC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LisaB14,
author = {Nusrat Jahan Lisa and
Hafiz Md. Hasan Babu},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Minimization of a reversible quantum 2\({}^{\mbox{n}}\)-to-n {BCD}
priority encoder},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {77--82},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880474},
doi = {10.1109/NANOARCH.2014.6880474},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LisaB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MohammadiGYM14,
author = {Hassan Ghasemzadeh Mohammadi and
Pierre{-}Emmanuel Gaillardon and
Majid Yazdani and
Giovanni De Micheli},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Fast process variation analysis in nano-scaled technologies using
column-wise sparse parameter selection},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {163--168},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880479},
doi = {10.1109/NANOARCH.2014.6880479},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MohammadiGYM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OnizawaKGH14,
author = {Naoya Onizawa and
Daisaku Katagiri and
Warren J. Gross and
Takahiro Hanyu},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Analog-to-stochastic converter using magnetic-tunnel junction devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {59--64},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880490},
doi = {10.1109/NANOARCH.2014.6880490},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OnizawaKGH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PatelF14,
author = {Ravi Patel and
Eby G. Friedman},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Sub-crosspoint {RRAM} decoding for improved area efficiency},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {98--103},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880488},
doi = {10.1109/NANOARCH.2014.6880488},
timestamp = {Mon, 07 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PatelF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PayvandRST14,
author = {Melika Payvand and
Justin Rofeh and
Avantika Sodhi and
Luke Theogarajan},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A CMOS-memristive self-learning neural network for pattern classification
applications},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {92--97},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880486},
doi = {10.1109/NANOARCH.2014.6880486},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PayvandRST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RahmanLSKM14,
author = {Mostafizur Rahman and
Mingyu Li and
Jiajun Shi and
Santosh Khasanvis and
Csaba Andras Moritz},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A new Tunnel-FET based {RAM} concept for ultra-low power applications},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {57--58},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880505},
doi = {10.1109/NANOARCH.2014.6880505},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RahmanLSKM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RoclinBGK14,
author = {David Roclin and
Olivier Bichler and
Christian Gamrat and
Jacques{-}Olivier Klein},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Sneak paths effects in {CBRAM} memristive devices arrays for spiking
neural networks},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {13--18},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880501},
doi = {10.1109/NANOARCH.2014.6880501},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RoclinBGK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RomdhaneZZKWR14,
author = {Nesrine Ben Romdhane and
Weisheng Zhao and
Yue Zhang and
Jacques{-}Olivier Klein and
Z. R. Wang and
Dafine Ravelosona},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Design and analysis of Racetrack memory based on magnetic domain wall
motion in nanowires},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {71--76},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880489},
doi = {10.1109/NANOARCH.2014.6880489},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RomdhaneZZKWR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SjalanderNK14,
author = {Magnus Sj{\"{a}}lander and
Nina Shariati Nilsson and
Stefanos Kaxiras},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A tunable cache for approximate computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {88--89},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880480},
doi = {10.1109/NANOARCH.2014.6880480},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SjalanderNK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/StanKWL14,
author = {Mircea R. Stan and
Mehdi Kabir and
Stuart A. Wolf and
Jiwei Lu},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Spin torque nano oscillators as key building blocks for the Systems-on-Chip
of the future},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {37--38},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880508},
doi = {10.1109/NANOARCH.2014.6880508},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/StanKWL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SunF0CL14,
author = {Honghui Sun and
Liang Fang and
Yao Wang and
Yaqing Chi and
Rulin Liu},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A low contact resistance graphene field effect transistor with single-layer-channel
and multi-layer-contact},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {139--144},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880502},
doi = {10.1109/NANOARCH.2014.6880502},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SunF0CL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TaitP14,
author = {Alexander N. Tait and
Paul R. Prucnal},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Applications of wavelength-fan-in for high-performance distributed
processing systems},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {177--178},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880485},
doi = {10.1109/NANOARCH.2014.6880485},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TaitP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TeodorovL14,
author = {Ciprian Teodorov and
Lo{\"{\i}}c Lagadec},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Virtual prototyping of {R2D} {NASIC} based {FPGA}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {179--180},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880509},
doi = {10.1109/NANOARCH.2014.6880509},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TeodorovL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TittmannHSPCSS14,
author = {Jana Tittmann and
Sascha Hermann and
Stefan E. Schulz and
Anibal Pacheco{-}Sanchez and
Martin Claus and
Michael Schr{\"{o}}ter},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Hysteresis-free carbon nanotube field-effect transistors without passivation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {137--138},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880499},
doi = {10.1109/NANOARCH.2014.6880499},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TittmannHSPCSS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WoodsBT14,
author = {Walt Woods and
Jens B{\"{u}}rger and
Christof Teuscher},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {On the influence of synaptic weight states in a locally competitive
algorithm for memristive hardware},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {19--24},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880503},
doi = {10.1109/NANOARCH.2014.6880503},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WoodsBT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YadavJPS14,
author = {Nandakishor Yadav and
Shikha Jain and
Manisha Pattanaik and
G. K. Sharma},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {{NBTI} aware IG-FinFET based {SRAM} design using adaptable trip-point
sensing technique},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {122--128},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880481},
doi = {10.1109/NANOARCH.2014.6880481},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YadavJPS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YangKYV14,
author = {Jinghua Yang and
Niranjan Kulkarni and
Shimeng Yu and
Sarma B. K. Vrudhula},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Integration of threshold logic gates with {RRAM} devices for energy
efficient and robust operation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {39--44},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880500},
doi = {10.1109/NANOARCH.2014.6880500},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YangKYV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZahirZPGDMP14,
author = {Ali Zahir and
Syed Azhar Ali Zaidi and
Azzurra Pulimeno and
Mariagrazia Graziano and
Danilo Demarchi and
Guido Masera and
Gianluca Piccinini},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {Molecular transistor circuits: From device model to circuit simulation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {129--134},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880492},
doi = {10.1109/NANOARCH.2014.6880492},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZahirZPGDMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZografosRASLRVT14,
author = {Odysseas Zografos and
Praveen Raghavan and
Luca Gaetano Amar{\`{u}} and
Bart Soree and
Rudy Lauwereins and
Iuliana P. Radu and
Diederik Verkest and
Aaron Thean},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {System-level assessment and area evaluation of Spin Wave logic circuits},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {25--30},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880475},
doi = {10.1109/NANOARCH.2014.6880475},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZografosRASLRVT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2014,
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://ieeexplore.ieee.org/xpl/conhome/6872767/proceeding},
doi = {10.1145/2770287},
isbn = {978-1-4799-6383-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AymerichR13,
author = {Nivard Aymerich and
Antonio Rubio},
title = {Extending the fundamental error bounds for asymmetric error reliable
computation},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {106--109},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623053},
doi = {10.1109/NANOARCH.2013.6623053},
timestamp = {Tue, 11 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AymerichR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BichlerRGQ13,
author = {Olivier Bichler and
David Roclin and
Christian Gamrat and
Damien Querlioz},
title = {Design exploration methodology for memristor-based spiking neuromorphic
architectures with the Xnet event-driven simulator},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623029},
doi = {10.1109/NANOARCH.2013.6623029},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BichlerRGQ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BurgerT13,
author = {Jens B{\"{u}}rger and
Christof Teuscher},
title = {Variation-tolerant Computing with Memristive Reservoirs},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623028},
doi = {10.1109/NANOARCH.2013.6623028},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BurgerT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenSGC13,
author = {Ying{-}Yu Chen and
Amit Sangai and
Morteza Gholipour and
Deming Chen},
title = {Schottky-barrier-type Graphene Nano-Ribbon Field-Effect Transistors:
{A} study on compact modeling, process variation, and circuit performance},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {82--88},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623049},
doi = {10.1109/NANOARCH.2013.6623049},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenSGC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenZBL13,
author = {Zhijie Chen and
Lu Zhang and
Xiuyuan Bi and
Hai Li},
title = {A pseudo-weighted sensing scheme for memristor based cross-point memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {38--39},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623039},
doi = {10.1109/NANOARCH.2013.6623039},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenZBL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GaoMAGHCS13,
author = {Ligang Gao and
Farnood Merrikh{-}Bayat and
Fabien Alibart and
Xinjie Guo and
Brian D. Hoskins and
Kwang{-}Ting Cheng and
Dmitri B. Strukov},
title = {Digital-to-analog and analog-to-digital conversion with metal oxide
memristors for ultra-low power computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {19--22},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623031},
doi = {10.1109/NANOARCH.2013.6623031},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GaoMAGHCS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GasnierGM13,
author = {Catherine Gasnier and
Pierre{-}Emmanuel Gaillardon and
Giovanni De Micheli},
title = {SATSoT: {A} methodology to map controllable-polarity devices on a
regular fabric using {SAT}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623043},
doi = {10.1109/NANOARCH.2013.6623043},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GasnierGM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Ghosh13,
author = {Swaroop Ghosh},
title = {Design methodologies for high density domain wall memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {30--31},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623035},
doi = {10.1109/NANOARCH.2013.6623035},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Ghosh13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HajimiriMBLLJ13,
author = {Hadi Hajimiri and
Prabhat Mishra and
Swarup Bhunia and
Branden Long and
Yibo Li and
Rashmi Jha},
title = {Content-aware encoding for improving energy efficiency in multi-level
cell resistive random access memory},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {76--81},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623048},
doi = {10.1109/NANOARCH.2013.6623048},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HajimiriMBLLJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HajimiriQM13,
author = {Hadi Hajimiri and
Mimonah Al Qathrady and
Prabhat Mishra},
title = {Proactive thermal management using memory based computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {110--115},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623054},
doi = {10.1109/NANOARCH.2013.6623054},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HajimiriQM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisRSNYCM13,
author = {Santosh Khasanvis and
Mostafizur Rahman and
Prasad Shabadi and
Pritish Narayanan and
Hyung Suk Yu and
Chi On Chui and
Csaba Andras Moritz},
title = {Nanowire field-programmable computing platform},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {23--25},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623032},
doi = {10.1109/NANOARCH.2013.6623032},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisRSNYCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisRSSM13,
author = {Santosh Khasanvis and
Sankara Narayanan Rajapandian and
Prasad Shabadi and
Jiajun Shi and
Csaba Andras Moritz},
title = {Embedded processors based on Spin Wave Functions (SPWFs)},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {32--33},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623036},
doi = {10.1109/NANOARCH.2013.6623036},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisRSSM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiLMCJ13,
author = {Yibo Li and
Branden Long and
Saptarshi Mandal and
Wenbo Chen and
Rashmi Jha},
title = {Understanding the impact of diode parameters on sneak current in 1Diode
1ReRAM crossbar architectures},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623046},
doi = {10.1109/NANOARCH.2013.6623046},
timestamp = {Tue, 29 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiLMCJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LieCM13,
author = {Denny Lie and
Kwanyeob Chae and
Saibal Mukhopadhyay},
title = {On the impact of 3D integration on high-throughput sensor information
processing: {A} case study with image sensing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623057},
doi = {10.1109/NANOARCH.2013.6623057},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LieCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MaciasPDKYGT13,
author = {Nicholas J. Macias and
Shivendra Pandey and
A. Deswandikar and
C. K. Kothapalli and
ChangKyu Yoon and
David H. Gracias and
Christof Teuscher},
title = {A cellular architecture for self-assembled 3D computational devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {116--121},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623055},
doi = {10.1109/NANOARCH.2013.6623055},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MaciasPDKYGT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MahmoudiWSS13,
author = {Hiwa Mahmoudi and
Thomas Windbacher and
Viktor Sverdlov and
Siegfried Selberherr},
title = {MRAM-based logic array for large-scale non-volatile logic-in-memory
applications},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {26--27},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623033},
doi = {10.1109/NANOARCH.2013.6623033},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MahmoudiWSS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MandalLEJ13,
author = {Saptarshi Mandal and
Branden Long and
Ammaarah El{-}Amin and
Rashmi Jha},
title = {Doped HfO2 based nanoelectronic memristive devices for self-learning
neural circuits and architecture},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623030},
doi = {10.1109/NANOARCH.2013.6623030},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MandalLEJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Marconcini13,
author = {Paolo Marconcini},
title = {Effect of potential disorder on shot noise suppression in nanoscale
devices},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {146--151},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623060},
doi = {10.1109/NANOARCH.2013.6623060},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Marconcini13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PalmaSQVS13,
author = {Giorgio Palma and
Manan Suri and
Damien Querlioz and
Elisa Vianello and
Barbara De Salvo},
title = {Stochastic neuron design using conductive bridge {RAM}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623051},
doi = {10.1109/NANOARCH.2013.6623051},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PalmaSQVS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PortalMBADMZDKQRCZ13,
author = {Jean{-}Michel Portal and
Mathieu Moreau and
Marc Bocquet and
Hassen Aziza and
Damien Deleruyelle and
Christophe Muller and
Yue Zhang and
Erya Deng and
Jacques{-}Olivier Klein and
Damien Querlioz and
Dafine Ravelosona and
Claude Chappert and
Weisheng Zhao},
title = {Analytical study of complementary memristive synchronous logic gates},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623047},
doi = {10.1109/NANOARCH.2013.6623047},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PortalMBADMZDKQRCZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PulimenoGWDP13,
author = {Azzurra Pulimeno and
Mariagrazia Graziano and
Ruiyu Wang and
Danilo Demarchi and
Gianluca Piccinini},
title = {Charge distribution in a molecular {QCA} wire based on bis-ferrocene
molecules},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {42--43},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623041},
doi = {10.1109/NANOARCH.2013.6623041},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PulimenoGWDP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RahmanNKNM13,
author = {Mostafizur Rahman and
Pritish Narayanan and
Santosh Khasanvis and
John Nicholson and
Csaba Andras Moritz},
title = {Experimental prototyping of beyond-CMOS nanowire computing fabrics},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623058},
doi = {10.1109/NANOARCH.2013.6623058},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RahmanNKNM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RanganathanHRMFB13,
author = {Vaishnavi Nattar Ranganathan and
Tina He and
Srihari Rajgopal and
Mehran Mehregany and
Philip X.{-}L. Feng and
Swarup Bhunia},
title = {Nanomechanical non-volatile memory for computing at extreme},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {44--45},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623042},
doi = {10.1109/NANOARCH.2013.6623042},
timestamp = {Sat, 02 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RanganathanHRMFB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Raychowdhury13,
author = {Arijit Raychowdhury},
title = {Pulsed {READ} in spin transfer torque {(STT)} memory bitcell for lower
{READ} disturb},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {34--35},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623037},
doi = {10.1109/NANOARCH.2013.6623037},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Raychowdhury13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RoseMYWX13,
author = {Garrett S. Rose and
Nathan R. McDonald and
Lok{-}Kwong Yan and
Bryant T. Wysocki and
Karen Xu},
title = {Foundations of memristor based {PUF} architectures},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {52--57},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623044},
doi = {10.1109/NANOARCH.2013.6623044},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RoseMYWX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SharadVFRR13,
author = {Mrigank Sharad and
Rangharajan Venkatesan and
Xuanyao Fong and
Anand Raghunathan and
Kaushik Roy},
title = {Reading spin-torque memory with spin-torque sensors},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {40--41},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623040},
doi = {10.1109/NANOARCH.2013.6623040},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SharadVFRR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SharadYR13,
author = {Mrigank Sharad and
Karthik Yogendra and
Kaushik Roy},
title = {Energy efficient computing using coupled Dual-Pillar Spin Torque Nano
Oscillators},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {28--29},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623034},
doi = {10.1109/NANOARCH.2013.6623034},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SharadYR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/StearnsA13,
author = {Kyle J. Stearns and
Neal G. Anderson},
title = {Throughput-dissipation tradeoff in partially reversible nanocomputing:
{A} case study},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {101--105},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623052},
doi = {10.1109/NANOARCH.2013.6623052},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/StearnsA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SureshSKBRM13,
author = {Vikram B. Suresh and
Akshaya Shanmugam and
Lekshmi Krishnan and
Avinash Bijjal and
Mostafizur Rahman and
Csaba Andras Moritz},
title = {Design of 8T-nanowire {RAM} array},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {152--157},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623061},
doi = {10.1109/NANOARCH.2013.6623061},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SureshSKBRM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SuriGBQVGD13,
author = {Manan Suri and
Daniele Garbin and
Olivier Bichler and
Damien Querlioz and
Dominique Vuillaume and
Christian Gamrat and
Barbara De Salvo},
title = {Impact of {PCM} resistance-drift in neuromorphic systems and drift-mitigation
strategy},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623059},
doi = {10.1109/NANOARCH.2013.6623059},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SuriGBQVGD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VaccaFGCCZ13,
author = {Marco Vacca and
Stefano Frache and
Mariagrazia Graziano and
L. Di Crescenzo and
Fabrizio Cairo and
Maurizio Zamboni},
title = {Automatic Place{\&}Route of Nano-magnetic Logic circuits},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623045},
doi = {10.1109/NANOARCH.2013.6623045},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VaccaFGCCZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VoicuC13,
author = {George Razvan Voicu and
Sorin Dan Cotofana},
title = {Towards heterogenous 3D-stacked reliable computing with von Neumann
multiplexing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623056},
doi = {10.1109/NANOARCH.2013.6623056},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VoicuC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WindbacherMSS13,
author = {Thomas Windbacher and
Hiwa Mahmoudi and
Viktor Sverdlov and
Siegfried Selberherr},
title = {Novel MTJ-based shift register for non-volatile logic applications},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {36--37},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623038},
doi = {10.1109/NANOARCH.2013.6623038},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WindbacherMSS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuLH13,
author = {Hao Wu and
Fabrizio Lombardi and
Jie Han},
title = {A PCM-based {TCAM} cell using {NDR}},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
pages = {89--94},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NanoArch.2013.6623050},
doi = {10.1109/NANOARCH.2013.6623050},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WuLH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2013,
title = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2013, Brooklyn, NY, USA, July 15-17, 2013},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://ieeexplore.ieee.org/xpl/conhome/6599038/proceeding},
isbn = {978-1-4799-0873-8},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/0002CF12,
author = {Yao Wang and
Sorin Dan Cotofana and
Liang Fang},
editor = {Csaba Andras Moritz},
title = {Statistical reliability analysis of {NBTI} impact on FinFET SRAMs
and mitigation technique using independent-gate devices},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {109--115},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765512},
doi = {10.1145/2765491.2765512},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/0002CF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AhmedYN12,
author = {Tanvir Ahmed and
Jun Yao and
Yasuhiko Nakashima},
editor = {Csaba Andras Moritz},
title = {Introducing {OVP} awareness to achieve an efficient permanent defect
locating},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {43--49},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765500},
doi = {10.1145/2765491.2765500},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AhmedYN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AlzateULNLWCAWH12,
author = {J. G. Alzate and
Parag Upadhyaya and
M. Lewis and
J. Nath and
Y. T. Lin and
Kin Wong and
S. Cherepov and
P. Khalili Amiri and
Kang L. Wang and
J. Hockel and
A. Bur and
G. P. Carman and
S. Bender and
Y. Tserkovnyak and
J. Zhu and
Y.{-}J. Chen and
I. N. Krivorotov and
J. Katine and
J. Langer and
Prasad Shabadi and
Santosh Khasanvis and
Sankara Narayanan Rajapandian and
Csaba Andras Moritz and
Alexander Khitun},
editor = {Csaba Andras Moritz},
title = {Spin wave nanofabric update},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {196--202},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765526},
doi = {10.1145/2765491.2765526},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/AlzateULNLWCAWH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Amine-BounouarB12,
author = {Mohamed Amine{-}Bounouar and
Arnaud Beaumont and
Khalil El Hajjam and
Fran{\c{c}}is Calmon and
Dominique Drouin},
editor = {Csaba Andras Moritz},
title = {Room temperature double gate single electron transistor based standard
cell library},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {146--151},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765518},
doi = {10.1145/2765491.2765518},
timestamp = {Mon, 12 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/Amine-BounouarB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BobbaGZMSLM12,
author = {Shashikanth Bobba and
Pierre{-}Emmanuel Gaillardon and
Jian Zhang and
Michele De Marchi and
Davide Sacchetto and
Yusuf Leblebici and
Giovanni De Micheli},
editor = {Csaba Andras Moritz},
title = {Process/design co-optimization of regular logic tiles for double-gate
silicon nanowire transistors},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {55--60},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765503},
doi = {10.1145/2765491.2765503},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/BobbaGZMSLM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChevillonML12,
author = {Nicolas Chevillon and
Morgan Madec and
Christophe Lallement},
editor = {Csaba Andras Moritz},
title = {Gate-level modeling for {CMOS} circuit simulation with ultimate FinFETs},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {22--29},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765497},
doi = {10.1145/2765491.2765497},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/ChevillonML12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FracheCGRTZ12,
author = {Stefano Frache and
Diego Chiabrando and
Mariagrazia Graziano and
Fabrizio Riente and
Giovanna Turvani and
Maurizio Zamboni},
editor = {Csaba Andras Moritz},
title = {ToPoliNano: nanoarchitectures design made real},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {160--167},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765520},
doi = {10.1145/2765491.2765520},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/FracheCGRTZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FriedmanIMSW12,
author = {Joseph S. Friedman and
Yehea I. Ismail and
Gokhan Memik and
Alan V. Sahakian and
Bruce W. Wessels},
editor = {Csaba Andras Moritz},
title = {Emitter-coupled spin-transistor logic},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {139--145},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765517},
doi = {10.1145/2765491.2765517},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FriedmanIMSW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HanninenT12,
author = {Ismo H{\"{a}}nninen and
Jarmo Takala},
editor = {Csaba Andras Moritz},
title = {Irreversibility induced density limits and logical reversiblity in
nanocircuits},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {50--54},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765501},
doi = {10.1145/2765491.2765501},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HanninenT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HeittmannN12,
author = {Arne Heittmann and
Tobias G. Noll},
editor = {Csaba Andras Moritz},
title = {A Monte Carlo analysis of a write method used in passive nanoelectronic
crossbars},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {93--100},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765509},
doi = {10.1145/2765491.2765509},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/HeittmannN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JabeurOBN12,
author = {Kotb Jabeur and
Ian O'Connor and
S{\'{e}}bastien Le Beux and
David Navarro},
editor = {Csaba Andras Moritz},
title = {Ambipolar double gate CNTFETs based reconfigurable logic cells},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {7--13},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765494},
doi = {10.1145/2765491.2765494},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JabeurOBN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JabeurONB12,
author = {Kotb Jabeur and
Ian O'Connor and
David Navarro and
S{\'{e}}bastien Le Beux},
editor = {Csaba Andras Moritz},
title = {Low-power design technique with ambipolar double gate devices},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {14--21},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765495},
doi = {10.1145/2765491.2765495},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JabeurONB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JunsangsriLH12,
author = {Pilin Junsangsri and
Fabrizio Lombardi and
Jie Han},
editor = {Csaba Andras Moritz},
title = {Macromodeling a phase change memory {(PCM)} cell by {HSPICE}},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {77--84},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765506},
doi = {10.1145/2765491.2765506},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/JunsangsriLH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisHRNLM12,
author = {Santosh Khasanvis and
K. M. Masum Habib and
Mostafizur Rahman and
Pritish Narayanan and
Roger K. Lake and
Csaba Andras Moritz},
editor = {Csaba Andras Moritz},
title = {Ternary volatile random access memory based on heterogeneous graphene-CMOS
fabric},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {69--76},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765505},
doi = {10.1145/2765491.2765505},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisHRNLM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KianpourS12,
author = {Moein Kianpour and
Reza Sabbaghi{-}Nadooshan},
editor = {Csaba Andras Moritz},
title = {A conventional design for {CLB} implementation of a {FPGA} in quantum-dot
cellular automata {(QCA)}},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {36--42},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765499},
doi = {10.1145/2765491.2765499},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KianpourS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KulkarniT12,
author = {Manjari S. Kulkarni and
Christof Teuscher},
editor = {Csaba Andras Moritz},
title = {Memristor-based reservoir computing},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {226--232},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765531},
doi = {10.1145/2765491.2765531},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/KulkarniT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LaurenciuC12,
author = {Nicoleta Cucu Laurenciu and
Sorin Dan Cotofana},
editor = {Csaba Andras Moritz},
title = {A Markovian, variation-aware circuit-level aging model},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {116--122},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765513},
doi = {10.1145/2765491.2765513},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LaurenciuC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiangHCL12,
author = {Jinghang Liang and
Jie Han and
Linbin Chen and
Fabrizio Lombardi},
editor = {Csaba Andras Moritz},
title = {Design and reliability analysis of multiple valued logic gates using
carbon nanotube FETs},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {131--138},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765515},
doi = {10.1145/2765491.2765515},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LiangHCL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MohanramYRLB12,
author = {Kartik Mohanram and
Xuebei Yang and
Masoud Rostami and
Guanxiong Liu and
Alexander A. Balandin},
editor = {Csaba Andras Moritz},
title = {Ambipolar circuits for analog, mixed-signal, and radio-frequency applications},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {1--6},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765493},
doi = {10.1145/2765491.2765493},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/MohanramYRLB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NukalaKV12,
author = {Nishant Nukala and
Niranjan Kulkarni and
Sarma B. K. Vrudhula},
editor = {Csaba Andras Moritz},
title = {Spintronic threshold logic array {(STLA)} - a compact, low leakage,
non-volatile gate array architecture},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {188--195},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765525},
doi = {10.1145/2765491.2765525},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/NukalaKV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OConnorJBN12,
author = {Ian O'Connor and
Kotb Jabeur and
S{\'{e}}bastien Le Beux and
David Navarro},
editor = {Csaba Andras Moritz},
title = {Ambipolar independent double gate {FET} logic},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {61--68},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765504},
doi = {10.1145/2765491.2765504},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/OConnorJBN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PalerDNP12,
author = {Alexandru Paler and
Simon J. Devitt and
Kae Nemoto and
Ilia Polian},
editor = {Csaba Andras Moritz},
title = {Synthesis of topological quantum circuits},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {181--187},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765524},
doi = {10.1145/2765491.2765524},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/PalerDNP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/QuerliozZDKBG12,
author = {Damien Querlioz and
Weisheng Zhao and
Philippe Dollfus and
Jacques{-}Olivier Klein and
Olivier Bichler and
Christian Gamrat},
editor = {Csaba Andras Moritz},
title = {Bioinspired networks with nanoscale memristive devices that combine
the unsupervised and supervised learning approaches},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {203--210},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765528},
doi = {10.1145/2765491.2765528},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/QuerliozZDKBG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RuotoloOPL12,
author = {Angelo Giuseppe Ruotolo and
Marco Ottavi and
Salvatore Pontarelli and
Fabrizio Lombardi},
editor = {Csaba Andras Moritz},
title = {A novel write-scheme for data integrity in memristor-based crossbar
memories},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {168--173},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765521},
doi = {10.1145/2765491.2765521},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/RuotoloOPL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SafiruddinCP12,
author = {Saleh Safiruddin and
Sorin Cotofana and
Ferdinand Peper},
editor = {Csaba Andras Moritz},
title = {Stigmergic search with single electron tunneling technology based
memory enhanced hubs},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {174--180},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765523},
doi = {10.1145/2765491.2765523},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SafiruddinCP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SafiruddinLBVC12,
author = {Saleh Safiruddin and
Mihai Lefter and
Demid Borodin and
George Razvan Voicu and
Sorin Dan Cotofana},
editor = {Csaba Andras Moritz},
title = {Zero-performance-overhead online fault detection and diagnosis in
3D stacked integrated circuits},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {123--130},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765514},
doi = {10.1145/2765491.2765514},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SafiruddinLBVC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SakodeLH12,
author = {Vikas Sakode and
Fabrizio Lombardi and
Jie Han},
editor = {Csaba Andras Moritz},
title = {Cell design and comparative evaluation of a novel 1T memristor-based
memory},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {152--159},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765519},
doi = {10.1145/2765491.2765519},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SakodeLH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SharadAPR12,
author = {Mrigank Sharad and
Charles Augustine and
Georgios Panagopoulos and
Kaushik Roy},
editor = {Csaba Andras Moritz},
title = {Ultra low energy analog image processing using spin based neurons},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {211--217},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765529},
doi = {10.1145/2765491.2765529},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SharadAPR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SoltizMKR12,
author = {Michael Soltiz and
Cory E. Merkel and
Dhireesha Kudithipudi and
Garrett S. Rose},
editor = {Csaba Andras Moritz},
title = {RRAM-based adaptive neural logic block for implementing non-linearly
separable functions in a single layer},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {218--225},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765530},
doi = {10.1145/2765491.2765530},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/SoltizMKR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TurkyilmazORCHA12,
author = {Ogun Turkyilmaz and
Santhosh Onkaraiah and
Marina Reyboz and
Fabien Clermidy and
Hraziia and
Costin Anghel and
Jean{-}Michel Portal and
Marc Bocquet},
editor = {Csaba Andras Moritz},
title = {RRAM-based {FPGA} for "normally off, instantly on" applications},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {101--108},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765510},
doi = {10.1145/2765491.2765510},
timestamp = {Fri, 24 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TurkyilmazORCHA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangY12,
author = {Yuhao Wang and
Hao Yu},
editor = {Csaba Andras Moritz},
title = {Design exploration of ultra-low power non-volatile memory based on
topological insulator},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {30--35},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765498},
doi = {10.1145/2765491.2765498},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WangY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZhaoZKQCRCPBADM12,
author = {Weisheng Zhao and
Yue Zhang and
Jacques{-}Olivier Klein and
Damien Querlioz and
Djaafar Chabi and
Dafine Ravelosona and
Claude Chappert and
Jean{-}Michel Portal and
Marc Bocquet and
Hassen Aziza and
Damien Deleruyelle and
Christophe Muller},
editor = {Csaba Andras Moritz},
title = {Crossbar architecture based on 2R complementary resistive switching
memory cell},
booktitle = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
pages = {85--92},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491.2765508},
doi = {10.1145/2765491.2765508},
timestamp = {Fri, 24 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZhaoZKQCRCPBADM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2012,
editor = {Csaba Andras Moritz},
title = {Proceedings of the 2012 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2012, Amsterdam, The Netherlands, July 4-6,
2012},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2765491},
doi = {10.1145/2765491},
isbn = {978-1-4503-1671-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/0002CF11,
author = {Yao Wang and
Sorin Cotofana and
Liang Fang},
title = {A unified aging model of {NBTI} and {HCI} degradation towards lifetime
reliability management for nanoscale {MOSFET} circuits},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {175--180},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941501},
doi = {10.1109/NANOARCH.2011.5941501},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/0002CF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AugustinePBSSR11,
author = {Charles Augustine and
Georgios Panagopoulos and
Behtash Behin{-}Aein and
Srikant Srinivasan and
Angik Sarkar and
Kaushik Roy},
title = {Low-power functionality enhanced computation architecture using spin-based
devices},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {129--136},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941494},
doi = {10.1109/NANOARCH.2011.5941494},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AugustinePBSSR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChabiZQK11,
author = {Djaafar Chabi and
Weisheng Zhao and
Damien Querlioz and
Jacques{-}Olivier Klein},
title = {Robust neural logic block {(NLB)} based on memristor crossbar array},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {137--143},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941495},
doi = {10.1109/NANOARCH.2011.5941495},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChabiZQK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenLZP11,
author = {Yi{-}Chung Chen and
Hai Li and
Wei Zhang and
Robinson E. Pino},
title = {3D-HIM: {A} 3D High-density Interleaved Memory for bipolar {RRAM}
design},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {59--64},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941484},
doi = {10.1109/NANOARCH.2011.5941484},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenLZP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CongX11,
author = {Jason Cong and
Bingjun Xiao},
title = {mrFPGA: {A} novel {FPGA} architecture with memristor-based reconfiguration},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941476},
doi = {10.1109/NANOARCH.2011.5941476},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CongX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DorranceRTHYM11,
author = {Richard Dorrance and
Fengbo Ren and
Yuta Toriyama and
Amr Amin Hafez and
Chih{-}Kong Ken Yang and
Dejan Markovic},
title = {Scalability and design-space analysis of a 1T-1MTJ memory cell},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {32--36},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941480},
doi = {10.1109/NANOARCH.2011.5941480},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DorranceRTHYM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ErcanRA11,
author = {Ilke Ercan and
Mostafizur Rahman and
Neal G. Anderson},
title = {Determining fundamental heat dissipation bounds for transistor-based
nanocomputing paradigms},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941500},
doi = {10.1109/NANOARCH.2011.5941500},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ErcanRA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FracheAGZ11,
author = {Stefano Frache and
Luca Gaetano Amar{\`{u}} and
Mariagrazia Graziano and
Maurizio Zamboni},
title = {Nanofabric power analysis: Biosequence alignment case study},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941489},
doi = {10.1109/NANOARCH.2011.5941489},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FracheAGZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GaillardonJCO11,
author = {Pierre{-}Emmanuel Gaillardon and
M. Haykel Ben Jamaa and
Fabien Clermidy and
Ian O'Connor},
title = {Ultra-fine grain FPGAs: {A} granularity study},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {9--15},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941477},
doi = {10.1109/NANOARCH.2011.5941477},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GaillardonJCO11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HabibKBL11,
author = {K. M. Masum Habib and
Alexander Khitun and
Alexander A. Balandin and
Roger K. Lake},
title = {Graphene nanoribbon crossbar nanomesh},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {86--90},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941488},
doi = {10.1109/NANOARCH.2011.5941488},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HabibKBL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HuangYZ11,
author = {Xiwei Huang and
Hao Yu and
Wei Zhang},
title = {{NEMS} based thermal management for 3D many-core system},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {218--223},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941507},
doi = {10.1109/NANOARCH.2011.5941507},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HuangYZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JabeurYOB11,
author = {Kotb Jabeur and
Nataliya Yakymets and
Ian O'Connor and
S{\'{e}}bastien Le Beux},
title = {Ambipolar double-gate {FET} binary-decision- diagram (Am-BDD) for
reconfigurable logic cells},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {162--168},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941499},
doi = {10.1109/NANOARCH.2011.5941499},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JabeurYOB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KhasanvisHRNLM11,
author = {Santosh Khasanvis and
K. M. Masum Habib and
Mostafizur Rahman and
Pritish Narayanan and
Roger K. Lake and
Csaba Andras Moritz},
title = {Hybrid Graphene Nanoribbon-CMOS tunneling volatile memory fabric},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {189--195},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941503},
doi = {10.1109/NANOARCH.2011.5941503},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KhasanvisHRNLM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KimT11,
author = {Jaeyoon Kim and
Sandip Tiwari},
title = {Inexact computing for ultra low-power nanometer digital circuit design},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941479},
doi = {10.1109/NANOARCH.2011.5941479},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KimT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KoohiH11,
author = {Somayyeh Koohi and
Shaahin Hessabi},
title = {Power efficient nanophotonic on-chip network for future large scale
multiprocessor architectures},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {114--121},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941492},
doi = {10.1109/NANOARCH.2011.5941492},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KoohiH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NarayananKPVSRL11,
author = {Pritish Narayanan and
Jorge Kina and
Pavan Panchapakeshan and
Priyamvada Vijayakumar and
Kyeong{-}Sik Shin and
Mostafizur Rahman and
Michael Leuchtenburg and
Israel Koren and
Chi On Chui and
Csaba Andras Moritz},
title = {Nanoscale Application Specific Integrated Circuits},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {99--106},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941490},
doi = {10.1109/NANOARCH.2011.5941490},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NarayananKPVSRL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OnkaraiahGRCPBM11,
author = {Santhosh Onkaraiah and
Pierre{-}Emmanuel Gaillardon and
Marina Reyboz and
Fabien Clermidy and
Jean{-}Michel Portal and
Marc Bocquet and
Christophe Muller},
title = {Using OxRRAM memories for improving communications of reconfigurable
{FPGA} architectures},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {65--69},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941485},
doi = {10.1109/NANOARCH.2011.5941485},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OnkaraiahGRCPBM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PanchapakeshanN11,
author = {Pavan Panchapakeshan and
Pritish Narayanan and
Csaba Andras Moritz},
title = {N3ASICs: Designing nanofabrics with fine-grained {CMOS} integration},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {196--202},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941504},
doi = {10.1109/NANOARCH.2011.5941504},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PanchapakeshanN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ParkDHRMY11,
author = {Henry Park and
Richard Dorrance and
Amr Amin Hafez and
Fengbo Ren and
Dejan Markovic and
Chih{-}Kong Ken Yang},
title = {Analysis of {STT-RAM} cell design with multiple MTJs per access},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {53--58},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941483},
doi = {10.1109/NANOARCH.2011.5941483},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ParkDHRMY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/QuerliozDBG11,
author = {Damien Querlioz and
Philippe Dollfus and
Olivier Bichler and
Christian Gamrat},
title = {Learning with memristive devices: How should we model their behavior?},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {150--156},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941497},
doi = {10.1109/NANOARCH.2011.5941497},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/QuerliozDBG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RiechersK11,
author = {Paul M. Riechers and
Richard A. Kiehl},
title = {A scheme for computation in nanoscale dynamical systems: Gated discrete
phase-shift interactions},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {144--149},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941496},
doi = {10.1109/NANOARCH.2011.5941496},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RiechersK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SaripalliDNK11,
author = {Vinay Saripalli and
Suman Datta and
Vijaykrishnan Narayanan and
Jaydeep P. Kulkarni},
title = {Variation-tolerant ultra low-power heterojunction tunnel {FET} {SRAM}
design},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {45--52},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941482},
doi = {10.1109/NANOARCH.2011.5941482},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SaripalliDNK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShabadiKWAWM11,
author = {Prasad Shabadi and
Alexander Khitun and
Kin Wong and
P. Khalili Amiri and
Kang L. Wang and
Csaba Andras Moritz},
title = {Spin wave functions nanofabric update},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {107--113},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941491},
doi = {10.1109/NANOARCH.2011.5941491},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ShabadiKWAWM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TeodorovNLD11,
author = {Ciprian Teodorov and
Pritish Narayanan and
Lo{\"{\i}}c Lagadec and
Catherine Dezan},
title = {Regular 2D NASIC-based architecture and design space exploration},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {70--77},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941486},
doi = {10.1109/NANOARCH.2011.5941486},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TeodorovNLD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Venkatasubramanian11,
author = {Ramakrishnan Venkatasubramanian and
Sujan K. Manohar and
Poras T. Balsara},
title = {Improving performance of {NEM} relay logic circuits using integrated
charge-boosting flip flop},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {37--44},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941481},
doi = {10.1109/NANOARCH.2011.5941481},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Venkatasubramanian11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VenkatesanCARR11,
author = {Rangharajan Venkatesan and
Vinay K. Chippa and
Charles Augustine and
Kaushik Roy and
Anand Raghunathan},
title = {Energy efficient many-core processor for recognition and mining using
spin-based memory},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {122--128},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941493},
doi = {10.1109/NANOARCH.2011.5941493},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VenkatesanCARR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VijayakumarNKKM11,
author = {Priyamvada Vijayakumar and
Pritish Narayanan and
Israel Koren and
C. Mani Krishna and
Csaba Andras Moritz},
title = {Impact of nanomanufacturing flow on systematic yield losses in nanoscale
fabrics},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {181--188},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941502},
doi = {10.1109/NANOARCH.2011.5941502},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VijayakumarNKKM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/VoicuEC11,
author = {George Razvan Voicu and
Marius Enachescu and
Sorin Dan Cotofana},
title = {Towards "zero-energy" using NEMFET-based power management for 3D hybrid
stacked ICs},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {203--209},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941505},
doi = {10.1109/NANOARCH.2011.5941505},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/VoicuEC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangNPB11,
author = {Xinmu Wang and
Seetharam Narasimhan and
Somnath Paul and
Swarup Bhunia},
title = {NEMTronics: Symbiotic integration of nanoelectronic and nanomechanical
devices for energy-efficient adaptive computing},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {210--217},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941506},
doi = {10.1109/NANOARCH.2011.5941506},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangNPB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WeiHL11,
author = {Wei Wei and
Jie Han and
Fabrizio Lombardi},
title = {A hybrid memory cell using Single-Electron transfer},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {16--23},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941478},
doi = {10.1109/NANOARCH.2011.5941478},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WeiHL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YoonS11,
author = {Youngki Yoon and
Sayeef S. Salahuddin},
title = {Performance assessment of partially unzipped carbon nanotube field-effect
transistors},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {157--161},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941498},
doi = {10.1109/NANOARCH.2011.5941498},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YoonS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ZamaniT11,
author = {Masoud Zamani and
Mehdi Baradaran Tahoori},
title = {Self-timed nano-PLA},
booktitle = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
pages = {78--85},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/NANOARCH.2011.5941487},
doi = {10.1109/NANOARCH.2011.5941487},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ZamaniT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2011,
title = {Proceedings of the 2011 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2011, San Diego, CA, USA, June 8-9, 2011},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/5934628/proceeding},
isbn = {978-1-4577-0993-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AshrafNCN10,
author = {Rehman Ashraf and
Rajeev K. Nain and
Malgorzata Chrzanowska{-}Jeske and
Siva G. Narendra},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Design methodology for Carbon Nanotube based circuits in the presence
of metallic tubes},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {71--76},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510924},
doi = {10.1109/NANOARCH.2010.5510924},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AshrafNCN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CrockerHN10,
author = {Michael Crocker and
Xiaobo Sharon Hu and
Michael T. Niemier},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Design and comparison of {NML} systolic architectures},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {29--34},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510929},
doi = {10.1109/NANOARCH.2010.5510929},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CrockerHN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/JabeurNOGJC10,
author = {Kotb Jabeur and
David Navarro and
Ian O'Connor and
Pierre{-}Emmanuel Gaillardon and
M. Haykel Ben Jamaa and
Fabien Clermidy},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Reducing transistor count in clocked standard cells with ambipolar
double-gate FETs},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {47--52},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510928},
doi = {10.1109/NANOARCH.2010.5510928},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/JabeurNOGJC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiuCTZTW10,
author = {Bao Liu and
Zhen Cao and
Jun Tao and
Xuan Zeng and
Pushan Tang and
H.{-}S. Philip Wong},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Intel {LVS} logic as a combinational logic paradigm in {CNT} technology},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {77--81},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510922},
doi = {10.1109/NANOARCH.2010.5510922},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiuCTZTW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MarchiJM10,
author = {Michele De Marchi and
M. Haykel Ben Jamaa and
Giovanni De Micheli},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Regular fabric design with ambipolar CNTFETs for {FPGA} and structured
{ASIC} applications},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {65--70},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510923},
doi = {10.1109/NANOARCH.2010.5510923},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MarchiJM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OttaviPDSKL10,
author = {Marco Ottavi and
Salvatore Pontarelli and
Erik DeBenedictis and
Adelio Salsano and
Peter M. Kogge and
Fabrizio Lombardi},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {High throughput and low power dissipation in {QCA} pipelines using
Bennett clocking},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {17--22},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510931},
doi = {10.1109/NANOARCH.2010.5510931},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OttaviPDSKL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PinoBMWRCOT10,
author = {Robinson E. Pino and
James W. Bohl and
Nathan R. McDonald and
Bryant T. Wysocki and
Peter J. Rozwood and
Kristy A. Campbell and
Antonio S. Oblea and
Achyut Timilsina},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Compact method for modeling and simulation of memristor devices: Ion
conductor chalcogenide-based memristor devices},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510936},
doi = {10.1109/NANOARCH.2010.5510936},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PinoBMWRCOT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RachlinS10,
author = {Eric Rachlin and
John E. Savage},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Stochastic nanoscale addressing for logic},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {59--64},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510926},
doi = {10.1109/NANOARCH.2010.5510926},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RachlinS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RajendranMKR10,
author = {Jeyavijayan Rajendran and
Harika Manem and
Ramesh Karri and
Garrett S. Rose},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Memristor based programmable threshold logic array},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {5--10},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510933},
doi = {10.1109/NANOARCH.2010.5510933},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RajendranMKR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ShabadiKNBKWM10,
author = {Prasad Shabadi and
Alexander Khitun and
Pritish Narayanan and
Mingqiang Bao and
Israel Koren and
Kang L. Wang and
Csaba Andras Moritz},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Towards logic functions as the device},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {11--16},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510934},
doi = {10.1109/NANOARCH.2010.5510934},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ShabadiKNBKWM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SimsirBJ10,
author = {Muzaffer O. Simsir and
Ajay N. Bhoj and
Niraj K. Jha},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Fault modeling for FinFET circuits},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {41--46},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510927},
doi = {10.1109/NANOARCH.2010.5510927},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SimsirBJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SimsirJ10,
author = {Muzaffer O. Simsir and
Niraj K. Jha},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {NanoV: Nanowire-based {VLSI} design},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {53--58},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510925},
doi = {10.1109/NANOARCH.2010.5510925},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SimsirJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WuY0LNWX10,
author = {Xiaowen Wu and
Yaoyao Ye and
Wei Zhang and
Weichen Liu and
Mahdi Nikdast and
Xuan Wang and
Jiang Xu},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {{UNION:} {A} unified inter/intra-chip optical network for chip multiprocessors},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {35--40},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510930},
doi = {10.1109/NANOARCH.2010.5510930},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WuY0LNWX10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/YamashitaM10,
author = {Shigeru Yamashita and
Igor L. Markov},
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {Fast equivalence-checking for quantum circuits},
booktitle = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
pages = {23--28},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NANOARCH.2010.5510932},
doi = {10.1109/NANOARCH.2010.5510932},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/YamashitaM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2010,
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5506521/proceeding},
isbn = {978-1-4244-8020-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/0001EYNI09,
author = {Yuan Xie and
Soumya Eachempati and
Aditya Yanamandra and
Vijaykrishnan Narayanan and
Mary Jane Irwin},
title = {Power and area reduction using carbon nanotube bundle interconnect
in global clock tree distribution network},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226352},
doi = {10.1109/NANOARCH.2009.5226352},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/0001EYNI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/AraniHL09,
author = {Zahra Mashreghian Arani and
Masoud Hashempour and
Fabrizio Lombardi},
title = {A coding framework for {DNA} self-assembly},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226361},
doi = {10.1109/NANOARCH.2009.5226361},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/AraniHL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/ChenW09,
author = {Yiran Chen and
Xiaobin Wang},
title = {Compact modeling and corner analysis of spintronic memristor},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226363},
doi = {10.1109/NANOARCH.2009.5226363},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/ChenW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DinglerNHGA09,
author = {Aaron Dingler and
Michael T. Niemier and
Xiaobo Sharon Hu and
Michael Garrison and
M. Tanvir Alam},
title = {System-level energy and performance projections for nanomagnet-based
logic},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {21--26},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226358},
doi = {10.1109/NANOARCH.2009.5226358},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DinglerNHGA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/FarazmandT09,
author = {Navid Farazmand and
Mehdi Baradaran Tahoori},
title = {Online detection of multiple faults in crossbar nano-architectures
using dual rail implementations},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {79--82},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226346},
doi = {10.1109/NANOARCH.2009.5226346},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/FarazmandT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GaillardonCOL09,
author = {Pierre{-}Emmanuel Gaillardon and
Fabien Clermidy and
Ian O'Connor and
Junchen Liu},
title = {Interconnection scheme and associated mapping method of reconfigurable
cell matrices based on nanoscale devices},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226348},
doi = {10.1109/NANOARCH.2009.5226348},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GaillardonCOL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HaronH09,
author = {Nor Zaidi Haron and
Said Hamdioui},
title = {Residue-based code for reliable hybrid memories},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {27--32},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226359},
doi = {10.1109/NANOARCH.2009.5226359},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HaronH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KongSK09,
author = {Inwook Kong and
Earl E. Swartzlander Jr. and
Seong{-}Wan Kim},
title = {Design of a Goldschmidt iterative divider for quantum-dot cellular
automata},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {47--50},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226355},
doi = {10.1109/NANOARCH.2009.5226355},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KongSK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KuiperC09,
author = {Ben Kuiper and
Sorin Cotofana},
title = {Adaptive Clock Scheduling for pipelined structures},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {65--68},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226351},
doi = {10.1109/NANOARCH.2009.5226351},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KuiperC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LehtonenL09,
author = {Eero Lehtonen and
Mika Laiho},
title = {Stateful implication logic with memristors},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {33--36},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226356},
doi = {10.1109/NANOARCH.2009.5226356},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LehtonenL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Li009,
author = {Shu Li and
Tong Zhang},
title = {Using carbon nanotube in digital memories},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {57--60},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226353},
doi = {10.1109/NANOARCH.2009.5226353},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Li009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Lincoln09,
author = {Patrick Lincoln},
title = {Challenges in scalable fault tolerance},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {13--14},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226360},
doi = {10.1109/NANOARCH.2009.5226360},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Lincoln09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiuYT009,
author = {Ming Liu and
Haigang Yang and
Sansiri Tanachutiwat and
Wei Wang},
title = {{FPGA} based on integration of carbon nanorelays and {CMOS} devices},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {61--64},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226350},
doi = {10.1109/NANOARCH.2009.5226350},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiuYT009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NarayananMPC09,
author = {Pritish Narayanan and
Csaba Andras Moritz and
Kyoung{-}won Park and
Chi On Chui},
title = {Validating cascading of crossbar circuits with an integrated device-circuit
exploration},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {37--42},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226357},
doi = {10.1109/NANOARCH.2009.5226357},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NarayananMPC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PaulB09,
author = {Somnath Paul and
Swarup Bhunia},
title = {Computing with nanoscale memory: Model and architecture},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226362},
doi = {10.1109/NANOARCH.2009.5226362},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PaulB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SrivastavaMA09,
author = {Saket Srivastava and
Aissa Melouki and
Bashir M. Al{-}Hashimi},
title = {Defect tolerance in hybrid nano/CMOS architecture using tagging mechanism},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {43--46},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226354},
doi = {10.1109/NANOARCH.2009.5226354},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SrivastavaMA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SuR09,
author = {Yehua Su and
Wenjing Rao},
title = {Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar
architectures},
booktitle = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
pages = {75--78},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NANOARCH.2009.5226349},
doi = {10.1109/NANOARCH.2009.5226349},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SuR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2009,
title = {2009 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2009, San Francisco, CA, USA, July 30-31, 2009},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://ieeexplore.ieee.org/xpl/conhome/5209244/proceeding},
isbn = {978-1-4244-4957-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/CrockerHN08,
author = {Michael Crocker and
Xiaobo Sharon Hu and
Michael T. Niemier},
title = {Defect tolerance in QCA-based PLAs},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {46--53},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585791},
doi = {10.1109/NANOARCH.2008.4585791},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/CrockerHN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/EachempatiSVD08,
author = {Soumya Eachempati and
Vinay Saripalli and
Narayanan Vijaykrishnan and
Suman Datta},
title = {Reconfigurable {BDD} based quantum circuits},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {61--67},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585793},
doi = {10.1109/NANOARCH.2008.4585793},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/EachempatiSVD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/GarciaO08,
author = {Saturnino Garcia and
Alex Orailoglu},
title = {Online test and fault-tolerance for nanoelectronic programmable logic
arrays},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {8--15},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585786},
doi = {10.1109/NANOARCH.2008.4585786},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/GarciaO08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Liu008,
author = {Ming Liu and
Wei Wang},
title = {rFGA: CMOS-nano hybrid {FPGA} using {RRAM} components},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {93--98},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585797},
doi = {10.1109/NANOARCH.2008.4585797},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Liu008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MadappuramBKM08,
author = {Basheer A. M. Madappuram and
Valeriu Beiu and
Peter M. Kelly and
Liam McDaid},
title = {On brain-inspired connectivity and hybrid network topologies},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {54--61},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585792},
doi = {10.1109/NANOARCH.2008.4585792},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MadappuramBKM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MishraMJ08,
author = {Prateek Mishra and
Anish Muttreja and
Niraj K. Jha},
title = {Evaluation of multiple supply and threshold voltages for low-power
FinFET circuit synthesis},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {77--84},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585795},
doi = {10.1109/NANOARCH.2008.4585795},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MishraMJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NamaziNS08,
author = {Ali Namazi and
M. Nourami and
M. Saquib},
title = {A voterless strategy for defect-tolerant nano-architectures},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {38--45},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585790},
doi = {10.1109/NANOARCH.2008.4585790},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NamaziNS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/PasrichaKD08,
author = {Sudeep Pasricha and
Fadi J. Kurdahi and
Nikil D. Dutt},
title = {System level performance analysis of carbon nanotube global interconnects
for emerging chip multiprocessors},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585785},
doi = {10.1109/NANOARCH.2008.4585785},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/PasrichaKD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/RaoOM08,
author = {Wenjing Rao and
Alex Orailoglu and
Keith Marzullo},
title = {Locality aware redundancy allocation in nanoelectronic systems},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585788},
doi = {10.1109/NANOARCH.2008.4585788},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/RaoOM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SafiruddinCP08,
author = {Saleh Safiruddin and
Sorin Dan Cotofana and
Ferdinand Peper},
title = {Single Electron Tunneling Delay Insensitive and fluctuation based
computation paradigms and circuits},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {69--76},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585794},
doi = {10.1109/NANOARCH.2008.4585794},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SafiruddinCP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Snider08,
author = {Gregory S. Snider},
title = {Spike-timing-dependent learning in memristive nanodevices},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {85--92},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585796},
doi = {10.1109/NANOARCH.2008.4585796},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Snider08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Tang008,
author = {Weiguo Tang and
Lei Wang},
title = {A {DSP} nanosystem with defect tolerance},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585789},
doi = {10.1109/NANOARCH.2008.4585789},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Tang008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TeuscherGR08,
author = {Christof Teuscher and
Natali Gulbahce and
Thimo Rohlf},
title = {Assessing random dynamical network architectures for nanoelectronics},
booktitle = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
pages = {16--23},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/NANOARCH.2008.4585787},
doi = {10.1109/NANOARCH.2008.4585787},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TeuscherGR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2008,
title = {2008 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2008, Anaheim, CA, USA, June 12-13, 2008},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://ieeexplore.ieee.org/xpl/conhome/4577668/proceeding},
isbn = {978-1-4244-2552-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/BiswasCMK07,
author = {Susmit Biswas and
Frederic T. Chong and
Tzvetan S. Metodi and
Ryan Kastner},
title = {A pageable, defect-tolerant nanoscale memory system},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {85--92},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400862},
doi = {10.1109/NANOARCH.2007.4400862},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/BiswasCMK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Dai0J07,
author = {Jianwei Dai and
Lei Wang and
Faquir C. Jain},
title = {Analysis of defect tolerance in molecular electronics using information-theoretic
measures},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {21--26},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400853},
doi = {10.1109/NANOARCH.2007.4400853},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Dai0J07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DasB07,
author = {Shamik Das and
Matthew F. Bauwens},
title = {Clocking nanocircuits for nanocomputers and other nanoelectronic systems},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {123--128},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400867},
doi = {10.1109/NANOARCH.2007.4400867},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DasB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HashempourAL07,
author = {Masoud Hashempour and
Zahra Mashreghian Arani and
Fabrizio Lombardi},
title = {Robust self-assembly of interconnects by parallel {DNA} growth},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {70--76},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400860},
doi = {10.1109/NANOARCH.2007.4400860},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HashempourAL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HuoYA07,
author = {Dennis Huo and
Qiaoyan Yu and
Paul Ampadu},
title = {A ballistic nanoelectronic device simulator},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {38--45},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400856},
doi = {10.1109/NANOARCH.2007.4400856},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HuoYA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KazmierskiZA07,
author = {Tom J. Kazmierski and
Dafeng Zhou and
Bashir M. Al{-}Hashimi},
title = {A fast, numerical circuit-level model of carbon nanotube transistor},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {33--37},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400855},
doi = {10.1109/NANOARCH.2007.4400855},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KazmierskiZA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/KimKO07,
author = {Kyosun Kim and
Ramesh Karri and
Alex Orailoglu},
title = {Design automation for hybrid CMOS-nonoelectronics crossbars},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {27--32},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400854},
doi = {10.1109/NANOARCH.2007.4400854},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/KimKO07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiMPKZB07,
author = {Hua Li and
Joseph L. Mundy and
William R. Patterson and
Dimitrios Kazazis and
Alexander Zaslavsky and
R. Iris Bahar},
title = {Thermally-induced soft errors in nanoscale {CMOS} circuits},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {62--69},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400859},
doi = {10.1109/NANOARCH.2007.4400859},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiMPKZB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MetodiCTCC07,
author = {Tzvetan S. Metodi and
Andrew W. Cross and
Darshan D. Thaker and
Isaac L. Chuang and
Frederic T. Chong},
title = {Design-space exploration of fault-tolerant building blocks for large-scale
quantum computing},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {7--14},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400851},
doi = {10.1109/NANOARCH.2007.4400851},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MetodiCTCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/MohamedJB07,
author = {Tamer Mohamed and
Graham A. Jullien and
Wael M. Badawy},
title = {Crossbar latch-based combinational and sequential logic for nano {FPGA}},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {117--122},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400866},
doi = {10.1109/NANOARCH.2007.4400866},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/MohamedJB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/NessHL07,
author = {Drew C. Ness and
Christian J. Hescott and
David J. Lilja},
title = {Improving nanoelectronic designs using a statistical approach to identify
key parameters in circuit level {SEU} simulations},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {46--53},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400857},
doi = {10.1109/NANOARCH.2007.4400857},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/NessHL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SinghZAVO07,
author = {Ashish Kumar Singh and
Hady Ali Zeineddine and
Adnan Aziz and
Sriram Vishwanath and
Michael Orshansky},
title = {A heterogeneous {CMOS-CNT} architecture utilizing novel coding of
boolean functions},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400852},
doi = {10.1109/NANOARCH.2007.4400852},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SinghZAVO07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/StrukovL07,
author = {Dmitri B. Strukov and
Konstantin K. Likharev},
title = {Prospects for the development of digital {CMOL} circuits},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {109--116},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400865},
doi = {10.1109/NANOARCH.2007.4400865},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/StrukovL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/TaskinCSV07,
author = {Baris Taskin and
Andy Chiu and
Jonathan Salkind and
Daniel Venutolo},
title = {A shift-register-based {QCA} memory architecture},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {54--61},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400858},
doi = {10.1109/NANOARCH.2007.4400858},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/TaskinCSV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Venkatasubramanian07,
author = {Girish Venkatasubramanian and
P. Oscar Boykin and
Renato J. O. Figueiredo},
title = {Design of high-yield defect-tolerant self-assembled nanoscale memories},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {77--84},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400861},
doi = {10.1109/NANOARCH.2007.4400861},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Venkatasubramanian07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/Wang0J07,
author = {Shuo Wang and
Lei Wang and
Faquir C. Jain},
title = {Dynamic redundancy allocation for reliable and high-performance nanocomputing},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400850},
doi = {10.1109/NANOARCH.2007.4400850},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/Wang0J07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangNM07,
author = {Teng Wang and
Pritish Narayanan and
Csaba Andras Moritz},
title = {Combining 2-level logic families in grid-based nanoscale fabrics},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {101--108},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400864},
doi = {10.1109/NANOARCH.2007.4400864},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangNM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WangZS007,
author = {Zhengfei Wang and
Huaixiu Zheng and
Qinwei Shi and
Jie Chen},
title = {Emerging nanocircuit paradigm: Graphene-based electronics for nanoscale
computing},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {93--100},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400863},
doi = {10.1109/NANOARCH.2007.4400863},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WangZS007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2007,
title = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://ieeexplore.ieee.org/xpl/conhome/4400848/proceeding},
isbn = {978-1-4244-1790-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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