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@inproceedings{DBLP:conf/aspdac/AllaraBCNPR98,
author = {Alberto Allara and
Massimo Bombana and
Patrizia Cavalloro and
Wolfgang Nebel and
Wolfram Putzke{-}R{\"{o}}ming and
Martin Radetzki},
title = {{ATM} Cell Modelling using Objective {VHDL}},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {261--264},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669461},
doi = {10.1109/ASPDAC.1998.669461},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/AllaraBCNPR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/AmanoS98,
author = {Hideharu Amano and
Yuichiro Shibata},
title = {Reconfigurable Systems: Activities in Asia and South Pacific (Embedded
Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {453--457},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669521},
doi = {10.1109/ASPDAC.1998.669521},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/AmanoS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BeckerHHN98,
author = {J{\"{u}}rgen Becker and
Reiner W. Hartenstein and
Michael Herz and
Ulrich Nageldinger},
title = {Parallelization in Co-Compilation for Configurable Accelerators},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {23--33},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669393},
doi = {10.1109/ASPDAC.1998.669393},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BeckerHHN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Bettadapur98,
author = {Dinesh R. Bettadapur},
title = {Software Licensing Models in the {EDA} Industry},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {235--239},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669455},
doi = {10.1109/ASPDAC.1998.669455},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Bettadapur98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BickerstaffARWS98,
author = {Mark A. Bickerstaff and
T. Arivoli and
Philip J. Ryan and
Neil Weste and
David J. Skellern},
title = {A Low Power 50MHz {FFT} Processor with Cyclic Extension and Shaping
Filter},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {335--336},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669493},
doi = {10.1109/ASPDAC.1998.669493},
timestamp = {Fri, 03 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BickerstaffARWS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BinhIT98,
author = {Nguyen{-}Ngoc B{\`{\i}}nh and
Masaharu Imai and
Yoshinori Takeuchi},
title = {A Performance Maximization Algorithm to Design ASIPs under the Constraint
of Chip Area Including {RAM} and {ROM} Sizes},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {367--372},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669502},
doi = {10.1109/ASPDAC.1998.669502},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BinhIT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenJCLK98,
author = {Liang{-}Gee Chen and
Juing{-}Ying Jiu and
Hao{-}Chieh Chang and
Yung{-}Pin Lee and
Chung{-}Wei Ku},
title = {A Low Power 2-D {DCT} Chip Design Using Direct 2-D Algorithm},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {145--150},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669434},
doi = {10.1109/ASPDAC.1998.669434},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChenJCLK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/CottrellMM98,
author = {Donald Cottrell and
David Mallis and
Joseph Morrell},
title = {CHDStd - {A} Model for Deep Submicron Design Tools},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {249--255},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669458},
doi = {10.1109/ASPDAC.1998.669458},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/CottrellMM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DasCB98,
author = {Debesh K. Das and
Susanta Chakraborty and
Bhargab B. Bhattacharya},
title = {Interchangeable Boolean Functions and Their Effects on Redundancy
in Logic Circuits},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {469--474},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669527},
doi = {10.1109/ASPDAC.1998.669527},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DasCB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DebnathS98,
author = {Debatosh Debnath and
Tsutomu Sasao},
title = {A Heuristic Algorithm to Design {AND-OR-EXOR} Three-Level Networks},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {69--74},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669404},
doi = {10.1109/ASPDAC.1998.669404},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DebnathS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DevganK98,
author = {Anirudh Devgan and
Sandip Kundu},
title = {Timing Analysis and Optimization: From Devices to Systems (Abstract
of Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {345},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669498},
doi = {10.1109/ASPDAC.1998.669498},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DevganK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DeyRR98,
author = {Sujit Dey and
Anand Raghunathan and
Rabindra K. Roy},
title = {Considering Testability during High-level Design (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {205--210},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669447},
doi = {10.1109/ASPDAC.1998.669447},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DeyRR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DrechslerH98,
author = {Rolf Drechsler and
Stefan H{\"{o}}reth},
title = {Manipulation of *BMDs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {433--438},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669516},
doi = {10.1109/ASPDAC.1998.669516},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DrechslerH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/EdamatsuHKKT98,
author = {Hisakazu Edamatsu and
Katsumi Homma and
Masaru Kakimoto and
Yutaka Koike and
Kinya Tabuchi},
title = {Pre-layout Delay Calculation Specification for {CMOS} {ASIC} Libraries},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {241--248},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669457},
doi = {10.1109/ASPDAC.1998.669457},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/EdamatsuHKKT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/EunS98,
author = {Se Young Eun and
Myung Hoon Sunwoo},
title = {An Effcient 2-D Convolver Chip for Real Time Image Processing},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {329--330},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669488},
doi = {10.1109/ASPDAC.1998.669488},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/EunS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/FeldmannKMS98,
author = {Ute Feldmann and
Ronald Kakoschke and
Mitiko Miura{-}Mattausch and
G. Schraud},
title = {Concurrent Technology, Device, and Circuit Development for EEPROMs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {123--128},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669423},
doi = {10.1109/ASPDAC.1998.669423},
timestamp = {Tue, 27 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/FeldmannKMS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Fujita98,
author = {Masahiro Fujita},
title = {Model Checking: Its Basics and Reality (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {217--222},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669449},
doi = {10.1109/ASPDAC.1998.669449},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Fujita98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/FunabaKTY98,
author = {Seiji Funaba and
Akihiro Kitagawa and
Toshiro Tsukada and
Goichi Yokomizo},
title = {A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology
Scaling},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {489--494},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669532},
doi = {10.1109/ASPDAC.1998.669532},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/FunabaKTY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GroutLBFCMDMSGPA98,
author = {S. Grout and
G. Ledenbach and
R. G. Bushroe and
P. Fisher and
Donald Cottrell and
David Mallis and
S. DasGupta and
Joseph Morrell and
J. Sayah and
R. Gupta and
P. T. Patel and
P. Adams},
title = {Hierarchy - {A} CHDStd Tool for the Coming Deep Submicron Complex
Design Crisis},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {257--260},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669460},
doi = {10.1109/ASPDAC.1998.669460},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GroutLBFCMDMSGPA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GuoP98,
author = {Hui Guo and
Sri Parameswaran},
title = {Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {99--104},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669416},
doi = {10.1109/ASPDAC.1998.669416},
timestamp = {Thu, 30 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/GuoP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HamaE98,
author = {Toshiyuki Hama and
Hiroaki Etoh},
title = {Curvilinear Detailed Routing Algorithm and Its Extension to Wire-Spreading
and Wire-Fattening},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {385--390},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669505},
doi = {10.1109/ASPDAC.1998.669505},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HamaE98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HamamotoAH98,
author = {Takayuki Hamamoto and
Kiyoharu Aizawa and
Mitsutoshi Hatori},
title = {Motion Adaptive Image Sensor},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {343--344},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669497},
doi = {10.1109/ASPDAC.1998.669497},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HamamotoAH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HeK98,
author = {Jiang{-}An He and
Hideaki Kobayashi},
title = {Simultaneous Wire Sizing and Wire Spacing in Post-Layout Performance
Optimization},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {373--378},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669503},
doi = {10.1109/ASPDAC.1998.669503},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HeK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HenkelE98,
author = {J{\"{o}}rg Henkel and
Rolf Ernst},
title = {High-Level Estimation Techniques for Usage in Hardware/Software Co-Design},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {353--360},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669500},
doi = {10.1109/ASPDAC.1998.669500},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HenkelE98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HiranoOKK98,
author = {Keiichi Hirano and
Taizou Ono and
Hiroyuki Kurino and
Mitsumasa Koyanagi},
title = {A New Multiport Memory for High Performance Parallel Processor System
with Shared Memory},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {333--334},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669491},
doi = {10.1109/ASPDAC.1998.669491},
timestamp = {Fri, 04 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/HiranoOKK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HongP98,
author = {Inki Hong and
Miodrag Potkonjak},
title = {Techniques for Functional Test Pattern Execution},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {283--288},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669468},
doi = {10.1109/ASPDAC.1998.669468},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HongP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HongPK98,
author = {Inki Hong and
Miodrag Potkonjak and
Ramesh Karri},
title = {Heterogeneous BISR-approach using System Level Synthesis Flexibility},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {289--294},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669470},
doi = {10.1109/ASPDAC.1998.669470},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/HongPK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IshiharaY98,
author = {Tohru Ishihara and
Hiroto Yasuura},
title = {Power-Pro: Programmable Power Management Architecture},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {321--322},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669482},
doi = {10.1109/ASPDAC.1998.669482},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IshiharaY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IsshikiSOAK98,
author = {Tsuyoshi Isshiki and
Takenobu Shimizugashira and
Akihisa Ohta and
Imanuddin Amril and
Hiroaki Kunieda},
title = {{FPGA} for High-Performance Bit-Serial Pipeline Datapath},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {331--332},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669490},
doi = {10.1109/ASPDAC.1998.669490},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IsshikiSOAK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IzumiTK98,
author = {Tomonori Izumi and
Atsushi Takahashi and
Yoji Kajitani},
title = {Air-Pressure-Model-Based Fast Algorithms for General Floorplan},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {563--570},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669555},
doi = {10.1109/ASPDAC.1998.669555},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IzumiTK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Jang98,
author = {Ho Keun Jang},
title = {A Design of Sound Synthesis {IC}},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {327--328},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669487},
doi = {10.1109/ASPDAC.1998.669487},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Jang98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JeonC98,
author = {Jinhwan Jeon and
Kiyoung Choi},
title = {Loop Pipelining in Hardware-Software Partitioning},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {361--366},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669501},
doi = {10.1109/ASPDAC.1998.669501},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/JeonC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JiangHCWH98,
author = {Yi{-}Min Jiang and
Shi{-}Yu Huang and
Kwang{-}Ting Cheng and
Deborah C. Wang and
ChingYen Ho},
title = {A Hybrid Power Model for {RTL} Power Estimation},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {551--556},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669550},
doi = {10.1109/ASPDAC.1998.669550},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/JiangHCWH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KawaguchiS98,
author = {Hiroshi Kawaguchi and
Takayasu Sakurai},
title = {Delay and Noise Formulas for Capacitively Coupled Distributed {RC}
Lines},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {35--43},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669394},
doi = {10.1109/ASPDAC.1998.669394},
timestamp = {Mon, 11 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KawaguchiS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KawahitoTM98,
author = {Shoji Kawahito and
Yoshiaki Tadokoro and
Akira Matsuzawa},
title = {{CMOS} Image Sensors with Video Compression},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {595--600},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669569},
doi = {10.1109/ASPDAC.1998.669569},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KawahitoTM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KawahitoYSMTMDM98,
author = {Shoji Kawahito and
Makoto Yoshida and
Masaaki Sasaki and
Daisuke Miyazaki and
Yoshiaki Tadokoro and
Kenji Murata and
Shiro Doushou and
Akira Matsuzawa},
title = {A {CMOS} Smart Image Sensor {LSI} for Focal-Plane Compression},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {339--340},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669495},
doi = {10.1109/ASPDAC.1998.669495},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KawahitoYSMTMDM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimK98,
author = {Tae Hun Kim and
Beomsup Kim},
title = {Dual-loop Digital {PLL} Design for Adaptive Clock Recovery},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {347--352},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669499},
doi = {10.1109/ASPDAC.1998.669499},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimL98,
author = {Uisok Kim and
Dong{-}Ik Lee},
title = {Practical Synthesis of Speed-Independent Circuits Using Unfoldings},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {191--196},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669442},
doi = {10.1109/ASPDAC.1998.669442},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimS98,
author = {Wonjong Kim and
Hyunchul Shin},
title = {Hierarchical {LVS} Based on Hierarchy Rebuilding},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {379--384},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669504},
doi = {10.1109/ASPDAC.1998.669504},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimS98a,
author = {Tae{-}Min Kim and
Gun Sun Shin},
title = {A Circuit Design of 16x16 Multiplier Using Redundant Binary Arithmetic},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {415},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimS98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KirovskiLPM98,
author = {Darko Kirovski and
Chunho Lee and
Miodrag Potkonjak and
William H. Mangione{-}Smith},
title = {Synthesis of Power Efficient Systems-on-Silicon},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {557--562},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669553},
doi = {10.1109/ASPDAC.1998.669553},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KirovskiLPM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KitaharaMUUNMM98,
author = {Takeshi Kitahara and
Fumihiro Minami and
Toshiaki Ueda and
Kimiyoshi Usami and
Seiichi Nishio and
Masami Murakata and
Takashi Mitsuhashi},
title = {A Clock-Gating Method for Low-Power {LSI} Design},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {307--312},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669476},
doi = {10.1109/ASPDAC.1998.669476},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KitaharaMUUNMM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KobayashiEK98,
author = {Susumu Kobayashi and
Masato Edahiro and
Mikio Kubo},
title = {Scan-chain Optimization Algorithms for Multiple Scan-paths},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {301--306},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KobayashiEK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KoideW98,
author = {Tetsushi Koide and
Shin'ichi Wakabayashi},
title = {A Timing-Driven Global Routing Algorithm with Pin Assignment, Block
Reshaping, and Positioning for Building Block Layout},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {577--583},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669560},
doi = {10.1109/ASPDAC.1998.669560},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KoideW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KomatsuIA98,
author = {Satoshi Komatsu and
Makoto Ikeda and
Kunihiro Asada},
title = {Low Power Micoprocessors for Comparative Study on Bus Architecture
and Multiplexer Architecture},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {323--324},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669484},
doi = {10.1109/ASPDAC.1998.669484},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KomatsuIA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeD98,
author = {Gueesang Lee and
Rolf Drechsler},
title = {ETDD-Based Synthesis of Term-Based FPGAs for Incompletely Specified
Boolean Functions},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {75--80},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669407},
doi = {10.1109/ASPDAC.1998.669407},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeeD98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeP98,
author = {Chunho Lee and
Miodrag Potkonjak},
title = {Quantitative Selection of Media Benchmarks},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {105--110},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeeP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeupersBM98,
author = {Rainer Leupers and
Anupam Basu and
Peter Marwedel},
title = {Optimized Array Index Computation in {DSP} Programs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {87--92},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669411},
doi = {10.1109/ASPDAC.1998.669411},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeupersBM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LiCCL98,
author = {Simon Cimin Li and
Reggie Chien and
Jerry Chien and
Kaung{-}Long Lin},
title = {A Simple Architecture of Low Voltage GHz BiCMOS Four-Quadrant Analogue
Multiplier using Complementary Voltage Follower},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {13--18},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669391},
doi = {10.1109/ASPDAC.1998.669391},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LiCCL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LouSP98,
author = {Jinan Lou and
Amir H. Salek and
Massoud Pedram},
title = {An Integrated Flow for Technology Remapping and Placement of Sub-half-micron
Circuits},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {295--300},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669472},
doi = {10.1109/ASPDAC.1998.669472},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LouSP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MasudaTSM98,
author = {Hiroo Masuda and
Katsumi Tsuneno and
Hisako Sato and
Kazutaka Mori},
title = {{TCAD/DA} for {MPU} and {ASIC} Development},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {129--134},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MasudaTSM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MehendaleSS98,
author = {Mahesh Mehendale and
Amit Sinha and
Sunil D. Sherlekar},
title = {Low Power Realization of {FIR} Filters Implemented using Distributed
Arithmetic},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {151--156},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669435},
doi = {10.1109/ASPDAC.1998.669435},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MehendaleSS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MeinelST98,
author = {Christoph Meinel and
Fabio Somenzi and
Thorsten Theobald},
title = {Function Decomposition and Synthesis Using Linear Sifting},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {81--86},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669410},
doi = {10.1109/ASPDAC.1998.669410},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MeinelST98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MidoA98,
author = {Tetsuhisa Mido and
Kunihiro Asada},
title = {An Analysis on {VLSI} Interconnection Considering Skin Effect},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {403--408},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MidoA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MidorikawaKHA98,
author = {Takashi Midorikawa and
Takayuki Kamei and
Toshihiro Hanawa and
Hideharu Amano},
title = {The {MINC} (Multistage Interconnection Network with Cache Control
Mechanism) Chip},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {337--338},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669494},
doi = {10.1109/ASPDAC.1998.669494},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MidorikawaKHA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Miyazaki98,
author = {Toshiaki Miyazaki},
title = {Reconfigurable Systems: {A} Survey (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {447--452},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669520},
doi = {10.1109/ASPDAC.1998.669520},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Miyazaki98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MurookaTMT98,
author = {Takahiro Murooka and
Atsushi Takahara and
Toshiaki Miyazaki and
Akihiro Tsutsui},
title = {An Architecture-oriented Routing Method for FPGAs Having Rich Hierarchical
Routing Resources},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {527--533},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669542},
doi = {10.1109/ASPDAC.1998.669542},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MurookaTMT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/NakatakeFK98,
author = {Shigetoshi Nakatake and
Masahiro Furuya and
Yoji Kajitani},
title = {Module Placement on BSG-Structure with Pre-Placed Modules and Rectilinear
Modules},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {571--576},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669558},
doi = {10.1109/ASPDAC.1998.669558},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/NakatakeFK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OhP98,
author = {Jaewon Oh and
Massoud Pedram},
title = {Power Reduction in Microprocessor Chips by Gated Clock Routing},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {313--318},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669478},
doi = {10.1109/ASPDAC.1998.669478},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OhP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OnoyeFOMS98,
author = {Takao Onoye and
Gen Fujita and
Hiroyuki Okuhata and
Morgan Hirosuke Miki and
Isao Shirakawa},
title = {Low-Power Implementation of {H.324} Audiovisual Codec Dedicated to
Mobile Computing},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {589--594},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669566},
doi = {10.1109/ASPDAC.1998.669566},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OnoyeFOMS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PanWW98,
author = {Jiaofeng Pan and
Yu{-}Liang Wu and
C. K. Wong},
title = {On the Optimal Sub-routing Structures of 2-D {FPGA} Greedy Routing
Architectures},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {535--540},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669544},
doi = {10.1109/ASPDAC.1998.669544},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PanWW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PandiniSG98,
author = {Davide Pandini and
Primo Scandolara and
Carlo Guardiani},
title = {Reduced Order Macromodel of Coupled Interconnects for Timing and Functional
Verification of Sub Half-micron {IC} Designs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {45--50},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669395},
doi = {10.1109/ASPDAC.1998.669395},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PandiniSG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Parameswaran98,
author = {Sri Parameswaran},
title = {{HW-SW} Co-Synthesis: The Present and The Future (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {19--22},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669392},
doi = {10.1109/ASPDAC.1998.669392},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Parameswaran98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ParameswaranG98,
author = {Sri Parameswaran and
Hui Guo},
title = {Power Reduction in Pipelines},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {545--550},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669548},
doi = {10.1109/ASPDAC.1998.669548},
timestamp = {Thu, 30 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ParameswaranG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Pedram98,
author = {Massoud Pedram},
title = {Logical-Physical Co-design for Deep Submicron Circuits: Challenges
and Solutions (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {137--142},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669430},
doi = {10.1109/ASPDAC.1998.669430},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Pedram98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PedramWW98,
author = {Massoud Pedram and
Qing Wu and
Xunwei Wu},
title = {A New Design for Double Edge Triggered Flip-flops},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {417--421},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PedramWW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SahniN98,
author = {Mohit Sahni and
Takashi Nanya},
title = {On the {CSC} Property of Signal Transition Graph Specifications for
Asynchronous Circuit Design},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {183--189},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669440},
doi = {10.1109/ASPDAC.1998.669440},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SahniN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SanoNMOO98,
author = {Kimikazu Sano and
Koichi Narahara and
Koichi Murata and
Taiichi Otsuji and
Kiyomitsu Onodera},
title = {High-speed GaAs {MESFET} Digital {IC} Design for Optical Communication
Systems},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {1--5},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669389},
doi = {10.1109/ASPDAC.1998.669389},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SanoNMOO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SasakiRY98,
author = {Yasuhiko Sasaki and
Kunihito Rikino and
Kazuo Yano},
title = {{ALPS:} An Automatic Layouter for Pass-Transistor Cell Synthesis},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {227--232},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669451},
doi = {10.1109/ASPDAC.1998.669451},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SasakiRY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Schreyer98,
author = {Tim A. Schreyer},
title = {Tool Capabilities Needed for Designing 100 MHz Interconnects},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {391--395},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669506},
doi = {10.1109/ASPDAC.1998.669506},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Schreyer98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Sedaghat-MamanB98,
author = {Reza Sedaghat{-}Maman and
Erich Barke},
title = {Real Time Fault Injection Using Logic Emulators},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {475--479},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669529},
doi = {10.1109/ASPDAC.1998.669529},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Sedaghat-MamanB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Shi98,
author = {C.{-}J. Richard Shi},
title = {Mixed-Signal Hardware Description Languages in the Era of System-on-Silicon:
Challenges and Opportunities (Abstract of Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {543},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669547},
doi = {10.1109/ASPDAC.1998.669547},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Shi98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ShiT98,
author = {C.{-}J. Richard Shi and
Michael W. Tian},
title = {Automatic Test Generation for Linear Analog Circuits under Parameter
Variations},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {501--506},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ShiT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Silva98,
author = {Jo{\~{a}}o P. Marques Silva},
title = {Integer Programming Models for Optimization Problems in Test Generation},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {481--487},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669530},
doi = {10.1109/ASPDAC.1998.669530},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Silva98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/StankovicS98,
author = {Radomir S. Stankovic and
Tsutomu Sasao},
title = {Decision Diagrams for Discrete Functions: Classification and Unified
Interpretation},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {439--446},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669518},
doi = {10.1109/ASPDAC.1998.669518},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/StankovicS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SudaO98,
author = {Reiji Suda and
Yoshio Oyanagi},
title = {The Ensparsed {LU} Decomposition Method for Large Scale Circuit Transient
Analysis},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {507--512},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669537},
doi = {10.1109/ASPDAC.1998.669537},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SudaO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SungH98,
author = {Wonyong Sung and
Soonhoi Ha},
title = {A Hardware Software Cosimulation Backplane with Automatic Interface
Generation},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {177--182},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669439},
doi = {10.1109/ASPDAC.1998.669439},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SungH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuzukiMKN98,
author = {Kaoru Suzuki and
Shunsuke Miyamoto and
Masato Kurosaki and
Junji Nakagoshi},
title = {Effective Simulation for the Giga-scale Massively Parallel Supercomputer
{SR2201}},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {163--168},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669437},
doi = {10.1109/ASPDAC.1998.669437},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SuzukiMKN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakahashiEH98,
author = {Shuji Takahashi and
Masato Edahiro and
Yoshihiro Hayashi},
title = {A New {LSI} Performance Prediction Model for Interconnection Analysis
of Future LSIs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {51--56},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669396},
doi = {10.1109/ASPDAC.1998.669396},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakahashiEH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakamuraOFFUIKN98,
author = {Akihiro Takamura and
Motokazu Ozawa and
Izumi Fukasaku and
Taro Fujii and
Yoichiro Ueno and
Masashi Imai and
Masashi Kuwako and
Takashi Nanya},
title = {{TITAC-2:} An Asynchronous 32-bit Microprocessor},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {319--320},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669480},
doi = {10.1109/ASPDAC.1998.669480},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakamuraOFFUIKN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakanoSOKN98,
author = {Kouji Takano and
Takehito Sasaki and
Nobuyuki Oba and
Hiroaki Kobayashi and
Tadao Nakamura},
title = {Automated Design of Wave Pipelined Multiport Register Files},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {197--202},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669443},
doi = {10.1109/ASPDAC.1998.669443},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakanoSOKN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakasakiIF98,
author = {Tomoya Takasaki and
Tomoo Inoue and
Hideo Fujiwara},
title = {Partial Scan Design Methods Based on Internally Balanced Structure},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {211--216},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669448},
doi = {10.1109/ASPDAC.1998.669448},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakasakiIF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Taki98,
author = {Kazuo Taki},
title = {A Survey for Pass-Transistor Logic Technologies - Recent Researches
and Developments and Future Prospects (Embedded Tutorial)},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {223--226},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669450},
doi = {10.1109/ASPDAC.1998.669450},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Taki98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TandaiS98,
author = {Miyako Tandai and
Takao Shinsha},
title = {A Redundant Fault Identification Algorithm with Exclusive-OR Circuit
Reduction},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {463--468},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669526},
doi = {10.1109/ASPDAC.1998.669526},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TandaiS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TaruiTS98,
author = {Yuji Tarui and
Takehiro Takahashi and
Noboru Schibuya},
title = {Development of a Support Tool for {PCB} Design with {EMC} Constraint},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {397--402},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669507},
doi = {10.1109/ASPDAC.1998.669507},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TaruiTS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TogawaHYO98,
author = {Nozomu Togawa and
Takafumi Hisaki and
Masao Yanagisawa and
Tatsuo Ohtsuki},
title = {A High-Level Synthesis System for Digital Signal Processing Based
on Enumerating Data-Flow Graphs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {265--274},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669463},
doi = {10.1109/ASPDAC.1998.669463},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TogawaHYO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TogawaHYO98a,
author = {Nozomu Togawa and
Kayoko Hagi and
Masao Yanagisawa and
Tatsuo Ohtsuki},
title = {An Incremental Placement and Global Routing Algorithm for Field-Programmable
Gate Arrays},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {519--526},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669540},
doi = {10.1109/ASPDAC.1998.669540},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TogawaHYO98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TomiyamaY98,
author = {Hiroyuki Tomiyama and
Hiroto Yasuura},
title = {Module Selection Using Manufacturing Information},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {275--281},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669466},
doi = {10.1109/ASPDAC.1998.669466},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TomiyamaY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TsunoSTSMH98,
author = {Morikazu Tsuno and
Masato Suga and
Masayasu Tanaka and
Kentaro Shibahara and
Mitiko Miura{-}Mattausch and
Masataka Hirose},
title = {Reliable Threshold Voltage Determination for Sub-0.1{\(\mathrm{\mu}\)}m
Gate Length MOSFET's},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {111--116},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669419},
doi = {10.1109/ASPDAC.1998.669419},
timestamp = {Tue, 02 Jan 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/TsunoSTSMH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WesteSP98,
author = {Neil Weste and
David J. Skellern and
Terry Percival},
title = {{VLSI} for Multimedia {U-NII} WLANs},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {585--587},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669564},
doi = {10.1109/ASPDAC.1998.669564},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WesteSP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WolfKS98,
author = {Markus Wolf and
Ulrich Kleine and
Fr{\'{e}}d{\'{e}}ric Schafer},
title = {A Novel Design Assistant for Analog Circuits},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {495--500},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669533},
doi = {10.1109/ASPDAC.1998.669533},
timestamp = {Thu, 27 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WolfKS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YamaguchiG98,
author = {Seiichiro Yamaguchi and
Hiroshi Goto},
title = {Inverse Modeling - {A} Promising Approach to Know What Is Made and
What Should Be Made},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {117--121},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YamaguchiG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YamaguchiIK98,
author = {Masayuki Yamaguchi and
Nagisa Ishiura and
Takashi Kambe},
title = {Binding and Scheduling Algorithms for Highly Retargetable Compilation},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {93--98},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669414},
doi = {10.1109/ASPDAC.1998.669414},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YamaguchiIK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YamamotoMYFOSMN98,
author = {Kazuya Yamamoto and
Takao Moriwaki and
Yutaka Yoshii and
Takayuki Fujii and
Jun Otsuji and
Yoshinobu Sasaki and
Yukio Miyazaki and
Kazuo Nishitani},
title = {Design and Experimental Results of a 2V-Operation Single-Chip GaAs
{T/R-MMIC} Front-End for 1.9-GHz Personal Communications},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {7--12},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669390},
doi = {10.1109/ASPDAC.1998.669390},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YamamotoMYFOSMN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YamashitaSN98,
author = {Shigeru Yamashita and
Hiroshi Sawada and
Akira Nagoya},
title = {New Methods to Find Optimal Non-Disjoint Bi-Decompositions},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {59--68},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669399},
doi = {10.1109/ASPDAC.1998.669399},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YamashitaSN98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YangCBO98,
author = {Bwolen Yang and
Yirng{-}An Chen and
Randal E. Bryant and
David R. O'Hallaron},
title = {Space- and Time-Efficient {BDD} Construction via Working Set Control},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {423--432},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669515},
doi = {10.1109/ASPDAC.1998.669515},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YangCBO98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YangKSNRCK98,
author = {Jin{-}Hyuk Yang and
Byung{-}Woon Kim and
Sung{-}Won Seo and
Sang{-}Jun Nam and
Chang{-}Ho Ryu and
Jang{-}Ho Cho and
Chong{-}Min Kyung},
title = {Metacore: {A} Configurable and Instruction Level Extensible {DSP}
Core},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {325--326},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669485},
doi = {10.1109/ASPDAC.1998.669485},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YangKSNRCK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YasudaSKSS98,
author = {Mitsuhiro Yasuda and
Katsuhiko Seo and
Hisao Koizumi and
Barry Shackleford and
Fumio Suzuki},
title = {A Top-down Hardware/Software Co-Simulation Method for Embedded Systems
Based Upon a Component Logical Bus Architecture},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {169--175},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669438},
doi = {10.1109/ASPDAC.1998.669438},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YasudaSKSS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YooK98,
author = {Changsik Yoo and
Wonchan Kim},
title = {A {\(\pm\)}1.5V 4MHz Low-Pass Gm-C Filter in {CMOS}},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {341--342},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669496},
doi = {10.1109/ASPDAC.1998.669496},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YooK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YoonS98,
author = {Sung Hyun Yoon and
Myung Hoon Sunwoo},
title = {An Efficient Variable-Length Tap {FIR} Filter Chip},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {157--161},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669436},
doi = {10.1109/ASPDAC.1998.669436},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YoonS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZengTT98,
author = {X. Zeng and
P. S. Tang and
C. K. Tse},
title = {Design of Nonlinear Switched-Current Circuits Using Building Block
Approach},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {409--414},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZengTT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZhouTT98,
author = {Rongzheng Zhou and
Jiarong Tong and
Pushan Tang},
title = {{FPART:} {A} Multi-way {FPGA} Partitioning Procedure Based on the
Improved {FM} Algorithm},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {513--518},
publisher = {{IEEE}},
year = {1998},
timestamp = {Tue, 30 Apr 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZhouTT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/aspdac/1998,
title = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
publisher = {{IEEE}},
year = {1998},
url = {https://ieeexplore.ieee.org/xpl/conhome/5474/proceeding},
isbn = {0-7803-4425-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/1998.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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