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@inproceedings{DBLP:conf/fpl/AasaraaiM09,
author = {Kaveh Aasaraai and
Andreas Moshovos},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Towards a viable out-of-order soft core: Copy-Free, checkpointed register
renaming},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {79--85},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272544},
doi = {10.1109/FPL.2009.5272544},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AasaraaiM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AgronA09,
author = {Jason Agron and
David Andrews},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Building heterogeneous reconfigurable systems using threads},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {435--438},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272501},
doi = {10.1109/FPL.2009.5272501},
timestamp = {Fri, 12 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AgronA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlachiotisSSD09,
author = {Nikolaos Alachiotis and
Alexandros Stamatakis and
Euripides Sotiriades and
Apostolos Dollas},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A reconfigurable architecture for the Phylogenetic Likelihood Function},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {674--678},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272341},
doi = {10.1109/FPL.2009.5272341},
timestamp = {Mon, 09 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AlachiotisSSD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Alfke09,
author = {Peter Alfke},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Virtex-6 and Spartan-6, plus a look into the future},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {5},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272564},
doi = {10.1109/FPL.2009.5272564},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Alfke09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlnajiarKIKHMHOO09,
author = {Dawood Alnajiar and
Younghun Ko and
Takashi Imagawa and
Hiroaki Konoura and
Masayuki Hiromoto and
Yukio Mitsuyama and
Masanori Hashimoto and
Hiroyuki Ochi and
Takao Onoye},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Coarse-grained dynamically reconfigurable architecture with flexible
reliability},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {186--192},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272317},
doi = {10.1109/FPL.2009.5272317},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AlnajiarKIKHMHOO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AndersonW09,
author = {Jason Helge Anderson and
Qiang Wang},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Improving logic density through synthesis-inspired architecture},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {105--111},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272537},
doi = {10.1109/FPL.2009.5272537},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AndersonW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AngelovL09,
author = {Venelin Angelov and
Volker Lindenstruth},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {The educational processor Sweet-16},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {555--559},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272412},
doi = {10.1109/FPL.2009.5272412},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AngelovL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AngermeierAT09,
author = {Josef Angermeier and
Abdulazim Amouri and
J{\"{u}}rgen Teich},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {General methodology for mapping iterative approximation algorithms
to adaptive dynamically partially reconfigurable systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {302--307},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272281},
doi = {10.1109/FPL.2009.5272281},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AngermeierAT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ArnesenRW09,
author = {Adam Arnesen and
Nathan Rollins and
Michael J. Wirthlin},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A multi-layered {XML} schema and design tool for reusing and integrating
{FPGA} {IP}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {472--475},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272468},
doi = {10.1109/FPL.2009.5272468},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ArnesenRW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AsanoMY09,
author = {Shuichi Asano and
Tsutomu Maruyama and
Yoshiki Yamaguchi},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Performance comparison of FPGA, {GPU} and {CPU} in image processing},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {126--131},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272532},
doi = {10.1109/FPL.2009.5272532},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AsanoMY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AsherR09,
author = {Yosi Ben{-}Asher and
Nadav Rotem},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Binary Synthesis with multiple memory banks targeting array references},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {600--603},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272381},
doi = {10.1109/FPL.2009.5272381},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AsherR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Athanas09,
author = {Peter Athanas},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {In search of agile hardware},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {2},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272571},
doi = {10.1109/FPL.2009.5272571},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Athanas09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Awad09,
author = {Mariette Awad},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{FPGA} supercomputing platforms: {A} survey},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {564--568},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272406},
doi = {10.1109/FPL.2009.5272406},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Awad09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BassoyMM09,
author = {Cem Savas Bassoy and
Henning Manteuffel and
Friedrich Mayer{-}Lindenberg},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Sharf: An FPGA-based customizable processor architecture},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {516--520},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272447},
doi = {10.1109/FPL.2009.5272447},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BassoyMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BattezzatiDSV09,
author = {Niccol{\`{o}} Battezzati and
Filomena Decuzzi and
Luca Sterpone and
Massimo Violante},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Soft errors in Flash-based FPGAs: Analysis methodologies and first
results},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {723--724},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272321},
doi = {10.1109/FPL.2009.5272321},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BattezzatiDSV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BauerSH09,
author = {Lars Bauer and
Muhammad Shafique and
J{\"{o}}rg Henkel},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{RISPP:} {A} run-time adaptive reconfigurable embedded processor},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {725--726},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272323},
doi = {10.1109/FPL.2009.5272323},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BauerSH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BelaidMM09,
author = {Ikbel Belaid and
Fabrice Muller and
Maher Benjemaa},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Off-line placement of hardware tasks on {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {591--595},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272402},
doi = {10.1109/FPL.2009.5272402},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BelaidMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BellasCDLL09,
author = {Nikolaos Bellas and
Sek M. Chai and
Malcolm Dwyer and
Dan Linzmeier and
Abelardo L{\'{o}}pez{-}Lagunas},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Proteus: An architectural synthesis tool based on the stream programming
paradigm},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {596--599},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272389},
doi = {10.1109/FPL.2009.5272389},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BellasCDLL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Betz09,
author = {Vaughn Betz},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{FPGA} challenges and opportunities at 40nm and beyond},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {4},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272567},
doi = {10.1109/FPL.2009.5272567},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Betz09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BraekenKTTMV09,
author = {An Braeken and
Serge Kubera and
Frederik Trouillez and
Abdellah Touhafi and
Nele Mentens and
Jo Vliegen},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Secure {FPGA} technologies and techniques},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {560--563},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272414},
doi = {10.1109/FPL.2009.5272414},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/BraekenKTTMV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CamardaPN09,
author = {Florent Camarda and
Jean{-}Christophe Pr{\'{e}}votet and
Fabienne Nouvel},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Implementation of a reconfigurable Fast Fourier Transform application
to digital terrestrial television broadcasting},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {353--358},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272266},
doi = {10.1109/FPL.2009.5272266},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CamardaPN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CantoFLR09,
author = {Enrique Cant{\'{o}} and
Mariano Fons and
Mariano L{\'{o}}pez{-}Garc{\'{\i}}a and
Rafael Ramos{-}Lara},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Acceleration of complex algorithms on a fast reconfigurable embedded
system on Spartan-3},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {429--434},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272242},
doi = {10.1109/FPL.2009.5272242},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/CantoFLR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CevreroAPSBLI09,
author = {Alessandro Cevrero and
Panagiotis Athanasopoulos and
Hadi Parandeh{-}Afshar and
Maurizio Skerlj and
Philip Brisk and
Yusuf Leblebici and
Paolo Ienne},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Using 3D integration technology to realize multi-context FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {507--510},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272454},
doi = {10.1109/FPL.2009.5272454},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CevreroAPSBLI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChalamalasettiVPM09,
author = {Sai Rahul Chalamalasetti and
Wim Vanderbauwhede and
Sohan Purohit and
Martin Margala},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A low cost reconfigurable soft processor for multimedia applications:
Design synthesis and programming model},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {534--538},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272461},
doi = {10.1109/FPL.2009.5272461},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChalamalasettiVPM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChinW09,
author = {Scott Y. L. Chin and
Steven J. E. Wilton},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An analytical model relating {FPGA} architecture and place and route
runtime},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {146--153},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272519},
doi = {10.1109/FPL.2009.5272519},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChinW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChinW09a,
author = {Scott Y. L. Chin and
Steven J. E. Wilton},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Improving the memory footprint and runtime scalability of {FPGA} {CAD}
algorithms},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {717--718},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272331},
doi = {10.1109/FPL.2009.5272331},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChinW09a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChiuH09,
author = {Matt Chiu and
Martin C. Herbordt},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Efficient particle-pair filtering for acceleration of molecular dynamics
simulation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {345--352},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272272},
doi = {10.1109/FPL.2009.5272272},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChiuH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChooBSHK09,
author = {Chang Choo and
Bhavya Bambhania and
Woon Seob So and
In Ki Hwang and
Do Young Kim},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An FPGA-based embedded wideband audio codec system},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {587--590},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272421},
doi = {10.1109/FPL.2009.5272421},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ChooBSHK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChrysosSPD09,
author = {Grigorios Chrysos and
Euripides Sotiriades and
Ioannis Papaefstathiou and
Apostolos Dollas},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A {FPGA} based coprocessor for gene finding using Interpolated Markov
Model {(IMM)}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {683--686},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272367},
doi = {10.1109/FPL.2009.5272367},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ChrysosSPD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ClausHRS09,
author = {Christopher Claus and
Robert Huitl and
Joachim Rausch and
Walter Stechele},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Optimizing the {SUSAN} corner detection algorithm for a high speed
{FPGA} implementation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {138--145},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272524},
doi = {10.1109/FPL.2009.5272524},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ClausHRS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Cong09,
author = {Jason Cong},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Customizable domain-specific computing},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {1},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272570},
doi = {10.1109/FPL.2009.5272570},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Cong09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DasWLL09,
author = {Joydip Das and
Steven J. E. Wilton and
Philip Heng Wai Leong and
Wayne Luk},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Modeling post-techmapping and post-clustering {FPGA} circuit depth},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {205--211},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272315},
doi = {10.1109/FPL.2009.5272315},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DasWLL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DenolfNV09,
author = {Kristof Denolf and
Stephen Neuendorffer and
Kees A. Vissers},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Using C-to-gates to program streaming image processing kernels efficiently
on FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {626--630},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272373},
doi = {10.1109/FPL.2009.5272373},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DenolfNV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DinechinKP09,
author = {Florent de Dinechin and
Cristian Klein and
Bogdan Pasca},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Generating high-performance custom floating-point pipelines},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {59--64},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272553},
doi = {10.1109/FPL.2009.5272553},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DinechinKP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DinechinP09,
author = {Florent de Dinechin and
Bogdan Pasca},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Large multipliers with fewer {DSP} blocks},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {250--255},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272296},
doi = {10.1109/FPL.2009.5272296},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DinechinP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DouZCLX09,
author = {Yong Dou and
Jie Zhou and
Xiaoyang Chen and
Yuanwu Lei and
Jinbo Xu},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{FPGA} accelerating three {QR} decomposition algorithms in the unified
pipelined framework},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {410--416},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272252},
doi = {10.1109/FPL.2009.5272252},
timestamp = {Fri, 31 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DouZCLX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EffraimidisPDP09,
author = {Charalampos Effraimidis and
Kyprianos Papadimitriou and
Apostolos Dollas and
Ioannis Papaefstathiou},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A self-reconfiguring architecture supporting multiple objective functions
in genetic algorithms},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {453--456},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272482},
doi = {10.1109/FPL.2009.5272482},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/EffraimidisPDP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EhliarL09,
author = {Andreas Ehliar and
Dake Liu},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An {ASIC} perspective on {FPGA} optimizations},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {218--223},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272311},
doi = {10.1109/FPL.2009.5272311},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/EhliarL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EssenWCFPYEH09,
author = {Brian Van Essen and
Aaron Wood and
Allan Carroll and
Stephen Friedman and
Robin Panda and
Benjamin Ylvisaker and
Carl Ebeling and
Scott Hauck},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Static versus scheduled interconnect in Coarse-Grained Reconfigurable
Arrays},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {268--275},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272293},
doi = {10.1109/FPL.2009.5272293},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/EssenWCFPYEH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FarabetPHL09,
author = {Cl{\'{e}}ment Farabet and
Cyril Poulet and
Jefferson Y. Han and
Yann LeCun},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{CNP:} An FPGA-based processor for Convolutional Networks},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {32--37},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272559},
doi = {10.1109/FPL.2009.5272559},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/FarabetPHL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GaoSS09,
author = {Shanyuan Gao and
Andrew G. Schmidt and
Ron Sass},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Hardware implementation of MPI{\_}Barrier on an {FPGA} cluster},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {12--17},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272560},
doi = {10.1109/FPL.2009.5272560},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GaoSS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GarziaHN09,
author = {Fabio Garzia and
Waqar Hussain and
Jari Nurmi},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{CREMA:} {A} coarse-grain reconfigurable array with mapping adaptiveness},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {708--712},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272353},
doi = {10.1109/FPL.2009.5272353},
timestamp = {Thu, 21 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GarziaHN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GasparDFB09,
author = {Lubos Gaspar and
Milos Drutarovsk{\'{y}} and
Viktor Fischer and
Nathalie Bochard},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Efficient {AES} S-boxes implementation for non-volatile FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {649--653},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272356},
doi = {10.1109/FPL.2009.5272356},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GasparDFB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GassonA09,
author = {Nick Gasson and
Neil C. Audsley},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Synthesis of the {SR} programming language for complex FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {617--621},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272377},
doi = {10.1109/FPL.2009.5272377},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GassonA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GebeleinEK09,
author = {Jano Gebelein and
Heiko Engel and
Udo Kebschull},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An approach to system-wide fault tolerance for FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {467--471},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272477},
doi = {10.1109/FPL.2009.5272477},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GebeleinEK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GiefersP09,
author = {Heiner Giefers and
Marco Platzner},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Program-driven fine-grained power management for the reconfigurable
mesh},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {119--125},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272527},
doi = {10.1109/FPL.2009.5272527},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GiefersP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GirardeyHB09,
author = {Romuald Girardey and
Michael H{\"{u}}bner and
J{\"{u}}rgen Becker},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Dynamic reconfigurable mixed-signal architecture for safety critical
applications},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {503--506},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272452},
doi = {10.1109/FPL.2009.5272452},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GirardeyHB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GlackinHMMW09,
author = {Brendan P. Glackin and
Jim Harkin and
T. Martin McGinnity and
Liam P. Maguire and
Qingxiang Wu},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Emulating Spiking Neural Networks for edge detection on {FPGA} hardware},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {670--673},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272339},
doi = {10.1109/FPL.2009.5272339},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GlackinHMMW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GohringerLHB09,
author = {Diana G{\"{o}}hringer and
Bin Liu and
Michael H{\"{u}}bner and
J{\"{u}}rgen Becker},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Star-Wheels Network-on-Chip featuring a self-adaptive mixed topology
and a synergy of a circuit - and a packet-switching communication
protocol},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {320--325},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272279},
doi = {10.1109/FPL.2009.5272279},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GohringerLHB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GonzalezMR09,
author = {Carlos Gonz{\'{a}}lez and
Daniel Mozos and
Javier Resano},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{FPGA} support for satellite computations of hyper spectral images},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {715--716},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272329},
doi = {10.1109/FPL.2009.5272329},
timestamp = {Thu, 15 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GonzalezMR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GutierrezVP09,
author = {Roberto Gutierrez and
Javier Valls and
Asuncion Perez{-}Pascual},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {FPGA-implementation of Time-Multiplexed Multiple Constant Multiplication
based on carry-save arithmetic},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {609--612},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272379},
doi = {10.1109/FPL.2009.5272379},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GutierrezVP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Halak09,
author = {Jiri Halak},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Multigigabit network traffic processing},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {521--524},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272439},
doi = {10.1109/FPL.2009.5272439},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Halak09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HeinerSWK09,
author = {Jonathan Heiner and
Benjamin Sellers and
Michael J. Wirthlin and
Jeff Kalb},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{FPGA} partial reconfiguration via configuration scrubbing},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {99--104},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272543},
doi = {10.1109/FPL.2009.5272543},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HeinerSWK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HinagaYYK09,
author = {Saya Hinaga and
Yoshiki Yamaguchi and
Tetsuhiko Yao and
Tohru Kawabe},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Dynamic reconfiguration system for real-time video processing},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {691--694},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272364},
doi = {10.1109/FPL.2009.5272364},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HinagaYYK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HinkelmannZG09,
author = {Heiko Hinkelmann and
Peter Zipf and
Manfred Glesner},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Design and evaluation of an energy-efficient dynamically reconfigurable
architecture for wireless sensor nodes},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {359--366},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272268},
doi = {10.1109/FPL.2009.5272268},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HinkelmannZG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HosseinabadyN09,
author = {Mohammad Hosseinabady and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Run-time resource management in fault-tolerant network on reconfigurable
chips},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {574--577},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272400},
doi = {10.1109/FPL.2009.5272400},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HosseinabadyN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HudaMA09,
author = {Safeen Huda and
Muntasir Mallick and
Jason Helge Anderson},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Clock gating architectures for {FPGA} power reduction},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {112--118},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272538},
doi = {10.1109/FPL.2009.5272538},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HudaMA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HutchingsNWC09,
author = {Brad L. Hutchings and
Brent E. Nelson and
Stephen West and
Reed Curtis},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Comparing fine-grained performance on the Ambric {MPPA} against an
{FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {174--179},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272505},
doi = {10.1109/FPL.2009.5272505},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HutchingsNWC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Ibarra-ManzanoDBLF09,
author = {Mario Alberto Ibarra{-}Manzano and
Michel Devy and
Jean{-}Louis Boizard and
Pierre Lacroix and
Jean{-}Yves Fourniols},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An efficient reconfigurable architecture to implement dense stereo
vision algorithm using high-level synthesis},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {444--447},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272490},
doi = {10.1109/FPL.2009.5272490},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Ibarra-ManzanoDBLF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/InagiTN09,
author = {Masato Inagi and
Yasuhiro Takashima and
Yuichi Nakamura},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Globally optimal time-multiplexing in inter-FPGA connections for accelerating
multi-FPGA systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {212--217},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272309},
doi = {10.1109/FPL.2009.5272309},
timestamp = {Thu, 09 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/InagiTN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/InakagataMOFA09,
author = {Kenta Inakagata and
Hirokazu Morishita and
Yasunori Osana and
Naoyuki Fujita and
Hideharu Amano},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Modularizing flux limiter functions for a Computational Fluid Dynamics
accelerator on FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {654--657},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272347},
doi = {10.1109/FPL.2009.5272347},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/InakagataMOFA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IturbeAMPA09,
author = {Xabier Iturbe and
Mikel Azkarate{-}askasua and
Imanol Martinez and
Jon P{\'{e}}rez and
Armando Astarloa},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A novel SEU, {MBU} and {SHE} handling strategy for Xilinx Virtex-4
FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {569--573},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272410},
doi = {10.1109/FPL.2009.5272410},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/IturbeAMPA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JacobBC09,
author = {Arpith C. Jacob and
Jeremy D. Buhler and
Roger D. Chamberlain},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Optimal runtime reconfiguration strategies for systolic arrays},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {162--167},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272515},
doi = {10.1109/FPL.2009.5272515},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/JacobBC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JacobsGC09,
author = {Adam Jacobs and
Alan D. George and
Grzegorz Cieslewski},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Reconfigurable fault tolerance: {A} framework for environmentally
adaptive fault mitigation in space},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {199--204},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272313},
doi = {10.1109/FPL.2009.5272313},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JacobsGC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JinTL09,
author = {Qiwei Jin and
David B. Thomas and
Wayne Luk},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Exploring reconfigurable architectures for explicit finite difference
option pricing models},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {73--78},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272549},
doi = {10.1109/FPL.2009.5272549},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JinTL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JovanovicTWB09,
author = {Slavisa Jovanovic and
Camel Tanougast and
Serge Weber and
Christophe Bobda},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A new deadlock-free fault-tolerant routing algorithm for NoC interconnections},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {326--331},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272274},
doi = {10.1109/FPL.2009.5272274},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/JovanovicTWB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JuanRMRMR09,
author = {Guillermo Botella Juan and
Antonio Garc{\'{\i}}a R{\'{\i}}os and
Uwe Meyer{-}B{\"{a}}se and
Manuel Rodr{\'{\i}}guez and
Mar{\'{\i}}a C. Molina and
Lu{\'{\i}}s Parrilla Roure},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Enhanced gradient-based motion vector coprocessor},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {687--690},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272369},
doi = {10.1109/FPL.2009.5272369},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/JuanRMRMR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KalayciogluUH09,
author = {Caglar Kalaycioglu and
Onur Can Ulusel and
Ilker Hamzaoglu},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Low power techniques for Motion Estimation hardware},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {180--185},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272508},
doi = {10.1109/FPL.2009.5272508},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KalayciogluUH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KapreD09,
author = {Nachiket Kapre and
Andr{\'{e}} DeHon},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Performance comparison of single-precision {SPICE} Model-Evaluation
on FPGA, GPU, Cell, and multi-core processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {65--72},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272548},
doi = {10.1109/FPL.2009.5272548},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KapreD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KepaMK09,
author = {Krzysztof Kepa and
Fearghal Morgan and
Krzysztof Kosciuszkiewicz},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{IP} protection in Partially Reconfigurable FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {403--409},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272250},
doi = {10.1109/FPL.2009.5272250},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KepaMK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KimMMO09,
author = {Sang Kyun Kim and
Lawrence C. McAfee and
Peter Leonard McMahon and
Kunle Olukotun},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A highly scalable Restricted Boltzmann Machine {FPGA} implementation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {367--372},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272262},
doi = {10.1109/FPL.2009.5272262},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KimMMO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KokufutaM09,
author = {Kentaro Kokufuta and
Tsutomu Maruyama},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Real-time processing of local contrast enhancement on {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {288--293},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272284},
doi = {10.1109/FPL.2009.5272284},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KokufutaM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KontosPP09,
author = {Dimitrios Kontos and
Ioannis Papaefstathiou and
Dionisios N. Pnevmatikatos},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Design space exploration of reconfigurable systems for calculating
flying object's optimal noise reduction paths},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {282--287},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272288},
doi = {10.1109/FPL.2009.5272288},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KontosPP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KryjakG09,
author = {Tomasz Kryjak and
Marek Gorgon},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Pipeline implementation of the 128-bit block cipher {CLEFIA} in {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {373--378},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272264},
doi = {10.1109/FPL.2009.5272264},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KryjakG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KumarG09,
author = {Rohit Kumar and
Ann Gordon{-}Ross},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Macs: {A} Minimal Adaptive routing circuit-switched architecture for
scalable and parametric NoCs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {525--529},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272440},
doi = {10.1109/FPL.2009.5272440},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KumarG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KyriakoulakosP09,
author = {Konstantinos Kyriakoulakos and
Dionisios N. Pnevmatikatos},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A novel SRAM-based {FPGA} architecture for efficient {TMR} fault tolerance
support},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {193--198},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272319},
doi = {10.1109/FPL.2009.5272319},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KyriakoulakosP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LabrecqueS09,
author = {Martin Labrecque and
J. Gregory Steffan},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Fast critical sections via thread scheduling for FPGA-based multithreaded
processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {18--25},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272561},
doi = {10.1109/FPL.2009.5272561},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LabrecqueS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LeongL09,
author = {David Leong and
Guy G. Lemieux},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Replace: An incremental placement algorithm for field programmable
gate arrays},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {154--161},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272520},
doi = {10.1109/FPL.2009.5272520},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LeongL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LinWS09,
author = {Colin Yu Lin and
Ngai Wong and
Hayden Kwok{-}Hay So},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Operation scheduling for FPGA-based reconfigurable computers},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {481--484},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272497},
doi = {10.1109/FPL.2009.5272497},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LinWS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LitzFTB09,
author = {Heiner Litz and
Holger Fr{\"{o}}ning and
Maximilian Th{\"{u}}rmer and
Ulrich Br{\"{u}}ning},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An {FPGA} based verification platform for HyperTransport 3.x},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {631--634},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272393},
doi = {10.1109/FPL.2009.5272393},
timestamp = {Sat, 04 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LitzFTB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuKLJ09,
author = {Ming Liu and
Wolfgang Kuehn and
Zhonghai Lu and
Axel Jantsch},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Run-time Partial Reconfiguration speed investigation and architectural
design space exploration},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {498--502},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272463},
doi = {10.1109/FPL.2009.5272463},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuKLJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuTCLC09,
author = {Qiang Liu and
Tim Todman and
Jos{\'{e}} Gabriel de Figueiredo Coutinho and
Wayne Luk and
George A. Constantinides},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Optimising designs by combining model-based and pattern-based transformations},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {308--313},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272283},
doi = {10.1109/FPL.2009.5272283},
timestamp = {Sat, 19 May 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuTCLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LlamoccaPV09,
author = {Daniel Llamocca and
Marios S. Pattichis and
G. Alonzo Vera},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A dynamically reconfigurable parallel pixel processing system},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {462--466},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272476},
doi = {10.1109/FPL.2009.5272476},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LlamoccaPV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LubbersP09,
author = {Enno L{\"{u}}bbers and
Marco Platzner},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Cooperative multithreading in dynamically reconfigurable systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {551--554},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272418},
doi = {10.1109/FPL.2009.5272418},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LubbersP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LyC09,
author = {Daniel Le Ly and
Paul Chow},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A multi-FPGA architecture for stochastic Restricted Boltzmann Machines},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {168--173},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272516},
doi = {10.1109/FPL.2009.5272516},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LyC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaitiS09,
author = {Abhranil Maiti and
Patrick Schaumont},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Improving the quality of a Physical Unclonable Function using configurable
Ring Oscillators},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {703--707},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272361},
doi = {10.1109/FPL.2009.5272361},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MaitiS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MenottiCFM09,
author = {Ricardo Menotti and
Jo{\~{a}}o M. P. Cardoso and
Marcio Merino Fernandes and
Eduardo Marques},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Automatic generation of {FPGA} hardware accelerators using a domain
specific language},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {457--461},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272485},
doi = {10.1109/FPL.2009.5272485},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MenottiCFM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Mikusek09,
author = {Petr Mikusek},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Multi-terminal {BDD} synthesis and applications},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {721--722},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272326},
doi = {10.1109/FPL.2009.5272326},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Mikusek09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MoritaW09,
author = {Hironobu Morita and
Minoru Watanabe},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Mems optically reconfigurable gate array},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {511--515},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272445},
doi = {10.1109/FPL.2009.5272445},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MoritaW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NakaharaSMK09,
author = {Hiroki Nakahara and
Tsutomu Sasao and
Munehiro Matsuura and
Yoshifumi Kawamura},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A virus scanning engine using a parallel finite-input memory machine
and MPUs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {635--639},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272396},
doi = {10.1109/FPL.2009.5272396},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NakaharaSMK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NezamfarH09,
author = {Bita Nezamfar and
Mark Horowitz},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {In field, energy-performance tunable {FPGA} architectures},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {262--267},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272290},
doi = {10.1109/FPL.2009.5272290},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NezamfarH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NicolauSC09,
author = {Carles Nicolau and
Dolors Sala and
Enrique Cant{\'{o}}},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Clock duplicity for high-precision timestamping in Gigabit Ethernet},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {379--384},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272258},
doi = {10.1109/FPL.2009.5272258},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NicolauSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NietoBV09,
author = {Alejandro Nieto and
V{\'{\i}}ctor M. Brea and
David L{\'{o}}pez Vilari{\~{n}}o},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {FPGA-accelerated retinal vessel-tree extraction},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {485--488},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272498},
doi = {10.1109/FPL.2009.5272498},
timestamp = {Tue, 29 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NietoBV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OjailDCD09,
author = {Maroun Ojail and
Rapha{\"{e}}l David and
St{\'{e}}phane Chevobbe and
Didier Demigny},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A reconfigurable {FIR/FFT} unit for wireless telecommunication systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {645--648},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272375},
doi = {10.1109/FPL.2009.5272375},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/OjailDCD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OoyaYISOOYNFHA09,
author = {Tomonori Ooya and
Hideki Yamada and
Tomoya Ishimori and
Yuichiro Shibata and
Yasunori Osana and
Kiyoshi Oguri and
Masato Yoshimi and
Yuri Nishikawa and
Akira Funahashi and
Noriko Hiroi and
Hideharu Amano},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Configuring area and performance: Empirical evaluation on an FPGA-based
biochemical simulator},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {679--682},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272335},
doi = {10.1109/FPL.2009.5272335},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/OoyaYISOOYNFHA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Parandeh-AfsharBI09,
author = {Hadi Parandeh{-}Afshar and
Philip Brisk and
Paolo Ienne},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Exploiting fast carry-chains of FPGAs for designing compressor trees},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {242--249},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272301},
doi = {10.1109/FPL.2009.5272301},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Parandeh-AfsharBI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PatelKMS09,
author = {Hiren J. Patel and
Yong C. Kim and
Jeffrey Todd McDonald and
LaVern A. Starman},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Increasing stability and distinguishability of the digital fingerprint
in FPGAs through input word analysis},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {391--396},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272253},
doi = {10.1109/FPL.2009.5272253},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PatelKMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PfleidererL09,
author = {Hans{-}J{\"{o}}rg Pfleiderer and
Stefan Lachowicz},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Numerically controlled oscillators using linear approximation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {695--698},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272366},
doi = {10.1109/FPL.2009.5272366},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PfleidererL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PlavecVB09,
author = {Franjo Plavec and
Zvonko G. Vranesic and
Stephen Dean Brown},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Enhancements to {FPGA} design methodology using streaming},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {294--301},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272286},
doi = {10.1109/FPL.2009.5272286},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PlavecVB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PorterSKMS09,
author = {Roy Porter and
Samuel J. Stone and
Yong C. Kim and
Jeffrey Todd McDonald and
LaVern A. Starman},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Dynamic Polymorphic Reconfiguration for anti-tamper circuits},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {493--497},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272469},
doi = {10.1109/FPL.2009.5272469},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PorterSKMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PrakashLSS09,
author = {Alok Prakash and
Siew Kei Lam and
Amit Kumar Singh and
Thambipillai Srikanthan},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Rapid design exploration framework for application-aware customization
of soft core processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {539--542},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272437},
doi = {10.1109/FPL.2009.5272437},
timestamp = {Mon, 14 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PrakashLSS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PrattWCGM09,
author = {Brian H. Pratt and
Michael J. Wirthlin and
Michael P. Caffrey and
Paul S. Graham and
Keith Morgan},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Noise impact of single-event upsets on an FPGA-based digital filter},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {38--43},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272554},
doi = {10.1109/FPL.2009.5272554},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PrattWCGM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PreusserS09,
author = {Thomas B. Preu{\ss}er and
Rainer G. Spallek},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Mapping basic prefix computations to fast carry-chain structures},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {604--608},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272382},
doi = {10.1109/FPL.2009.5272382},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PreusserS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Quiros-OlozabalBC09,
author = {{\'{A}}ngel Quir{\'{o}}s{-}Oloz{\'{a}}bal and
Juan Manuel Barrientos{-}Villar and
Ma de los {\'{A}}ngeles Cifredo Chac{\'{o}}n},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Reconfiguration-based time-to-digital converter for Virtex FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {439--443},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272495},
doi = {10.1109/FPL.2009.5272495},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Quiros-OlozabalBC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RakosiHON09,
author = {Zoltan Endre Rakosi and
Masayuki Hiromoto and
Hiroyuki Ochi and
Yukihiro Nakamura},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Hot-Swapping architecture extension for mitigation of permanent functional
unit faults},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {578--581},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272428},
doi = {10.1109/FPL.2009.5272428},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RakosiHON09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Ramos-LaraGNP09,
author = {Rafael Ramos{-}Lara and
Mariano L{\'{o}}pez{-}Garc{\'{\i}}a and
Enrique F. Cant{\'{o}}{-}Navarro and
Luis Puente{-}Rodriguez},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{SVM} speaker verification system based on a low-cost {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {582--586},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272430},
doi = {10.1109/FPL.2009.5272430},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Ramos-LaraGNP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Romero-XimilD09,
author = {Jose Manuel Romero{-}Ximil and
Arturo Diaz{-}Perez},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An {FPGA} design for evaluating score function in protein energy calculation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {666--669},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272344},
doi = {10.1109/FPL.2009.5272344},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Romero-XimilD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Rose09,
author = {Jonathan Rose},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {The evolution of architecture exploration of programmable devices},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {3},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272566},
doi = {10.1109/FPL.2009.5272566},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Rose09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RozicV09,
author = {Vladimir Rozic and
Ingrid Verbauwhede},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Random numbers generation: Investigation of narrowtransitions suppression
on {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {699--702},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272359},
doi = {10.1109/FPL.2009.5272359},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RozicV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RullmannMHZG09,
author = {Markus Rullmann and
Renate Merker and
Heiko Hinkelmann and
Peter Zipf and
Manfred Glesner},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An integrated tool flow to realize runtime-reconfigurable applications
on a new class of partial multi-context FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {92--98},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272540},
doi = {10.1109/FPL.2009.5272540},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RullmannMHZG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RupnowAFC09,
author = {Kyle Rupnow and
Jacob Adriaens and
Wenyin Fu and
Katherine Compton},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Performance metrics for hybrid multi-tasking systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {547--550},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272416},
doi = {10.1109/FPL.2009.5272416},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RupnowAFC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SabeghiSB09,
author = {Mojtaba Sabeghi and
Vlad Mihai Sima and
Koen Bertels},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Compiler assisted runtime task scheduling on a reconfigurable computer},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {44--50},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272555},
doi = {10.1109/FPL.2009.5272555},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SabeghiSB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SaitoKSHMSKYNMKA09,
author = {Shotaro Saito and
Yoshinori Kohama and
Yasufumi Sugimori and
Yohei Hasegawa and
Hiroki Matsutani and
Toru Sano and
Kazutaka Kasuga and
Yoichi Yoshida and
Kiichi Niitsu and
Noriyuki Miura and
Tadahiro Kuroda and
Hideharu Amano},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {MuCCRA-Cube: {A} 3D dynamically reconfigurable processor with inductive-coupling
link},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {6--11},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272565},
doi = {10.1109/FPL.2009.5272565},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SaitoKSHMSKYNMKA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SanoSKA09,
author = {Toru Sano and
Yoshiki Saito and
Masaru Kato and
Hideharu Amano},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Fine Grain Partial Reconfiguration for energy saving in Dynamically
Reconfigurable Processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {530--533},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272435},
doi = {10.1109/FPL.2009.5272435},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SanoSKA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SantambrogioMNS09,
author = {Marco D. Santambrogio and
Massimo Morandi and
Marco Novati and
Donatella Sciuto},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A runtime relocation based workflow for self dynamic reconfigurable
systems design},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {86--91},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272545},
doi = {10.1109/FPL.2009.5272545},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SantambrogioMNS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SchumacherPP09,
author = {Tobias Schumacher and
Christian Plessl and
Marco Platzner},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {An accelerator for {K-TH} nearest neighbor thinning based on the {IMORC}
infrastructure},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {338--344},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272270},
doi = {10.1109/FPL.2009.5272270},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SchumacherPP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SedcoleSC09,
author = {N. Pete Sedcole and
Edward A. Stott and
Peter Y. K. Cheung},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Compensating for variability in FPGAs by re-mapping and re-placement},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {613--616},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272380},
doi = {10.1109/FPL.2009.5272380},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SedcoleSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SellersHWK09,
author = {Benjamin Sellers and
Jonathan Heiner and
Michael J. Wirthlin and
Jeff Kalb},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Bitstream compression through frame removal and partial reconfiguration},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {476--480},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272502},
doi = {10.1109/FPL.2009.5272502},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SellersHWK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SelowLL09,
author = {Roberto Selow and
Heitor S. Lopes and
Carlos Raimundo Erig Lima},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A comparison of {FPGA} and {FPAA} technologies for a signal processing
application},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {230--235},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272306},
doi = {10.1109/FPL.2009.5272306},
timestamp = {Wed, 10 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SelowLL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SkliarovaS09,
author = {Iouliia Skliarova and
Valery Sklyarov},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Recursion in reconfigurable computing: {A} survey of implementation
approaches},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {224--229},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272304},
doi = {10.1109/FPL.2009.5272304},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SkliarovaS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SmithCC09,
author = {Alastair M. Smith and
George A. Constantinides and
Peter Y. K. Cheung},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Area estimation and optimisation of {FPGA} routing fabrics},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {256--261},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272298},
doi = {10.1109/FPL.2009.5272298},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SmithCC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SotiropoulosP09,
author = {Joannis Sotiropoulos and
Ioannis Papaefstathiou},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A fast parallel matrix multiplication reconfigurable unit utilized
in face recognitions systems},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {276--281},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272287},
doi = {10.1109/FPL.2009.5272287},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SotiropoulosP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SpiteriVN09,
author = {Trevor Spiteri and
George Vafiadis and
Jos{\'{e}} Luis N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A toolset for the analysis and optimization of motion estimation algorithms
and processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {423--428},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272247},
doi = {10.1109/FPL.2009.5272247},
timestamp = {Fri, 09 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SpiteriVN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SutterD09,
author = {Gustavo Sutter and
Jean{-}Pierre Deschamps},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {High speed fixed point dividers for FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {448--452},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272492},
doi = {10.1109/FPL.2009.5272492},
timestamp = {Fri, 02 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SutterD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SyedCHV09,
author = {Rizwan Syed and
Xiaolei Chen and
Yajun Ha and
Bharadwaj Veeravalli},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {sFPGA2 - {A} scalable {GALS} {FPGA} architecture and design methodology},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {314--319},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272278},
doi = {10.1109/FPL.2009.5272278},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SyedCHV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TakagiM09,
author = {Toyokazu Takagi and
Tsutomu Maruyama},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Accelerating {HMMER} search using {FPGA}},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {332--337},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272276},
doi = {10.1109/FPL.2009.5272276},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TakagiM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TanoueIIAKS09,
author = {Shiro Tanoue and
Tomoyuki Ishida and
Yoshihiro Ichinomiya and
Motoki Amagasaki and
Morihiro Kuga and
Toshinori Sueyoshi},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A novel states recovery technique for the {TMR} softcore processor},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {543--546},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272423},
doi = {10.1109/FPL.2009.5272423},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TanoueIIAKS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ThoniS09,
author = {David W. Th{\"{o}}ni and
Alfred Strey},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Novel strategies for hardware acceleration of frequent itemset mining
with the apriori algorithm},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {489--492},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272494},
doi = {10.1109/FPL.2009.5272494},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ThoniS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TrancheroR09,
author = {Maurizio Tranchero and
Leonardo Maria Reyneri},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Exploiting synchronous placement for asynchronous circuits onto commercial
FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {622--625},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272378},
doi = {10.1109/FPL.2009.5272378},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TrancheroR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VanderbauwhedeAM09,
author = {Wim Vanderbauwhede and
Leif Azzopardi and
Mahmoud Moadeli},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {FPGA-accelerated Information Retrieval: High-efficiency document filtering},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {417--422},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272246},
doi = {10.1109/FPL.2009.5272246},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VanderbauwhedeAM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VelegalatiK09,
author = {Rajesh Velegalati and
Jens{-}Peter Kaps},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {{DPA} resistance for light-weight implementations of cryptographic
algorithms on FPGAs},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {385--390},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272260},
doi = {10.1109/FPL.2009.5272260},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VelegalatiK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VillarJB09,
author = {Jose Ignacio Villar and
Jorge Juan and
Manuel J. Bellido},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Efficient techniques and methodologies for embedded system design
usign free hardware and open standards},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {719--720},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272325},
doi = {10.1109/FPL.2009.5272325},
timestamp = {Wed, 20 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VillarJB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WangEZ09,
author = {Dong Wang and
Milos D. Ercegovac and
Nanning Zheng},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A radix-8 complex divider for {FPGA} implementation},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {236--241},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272300},
doi = {10.1109/FPL.2009.5272300},
timestamp = {Sat, 22 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WangEZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WildermannWZT09,
author = {Stefan Wildermann and
Gregor Walla and
Tobias Ziermann and
J{\"{u}}rgen Teich},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Self-organizing multi-cue fusion for FPGA-based embedded imaging},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {132--137},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272523},
doi = {10.1109/FPL.2009.5272523},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WildermannWZT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YallaK09,
author = {Panasayya Yalla and
Jens{-}Peter Kaps},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Compact {FPGA} implementation of Camellia},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {658--661},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272349},
doi = {10.1109/FPL.2009.5272349},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YallaK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YanXCGWLH09,
author = {Jing Yan and
Ningyi Xu and
Xiongfei Cai and
Rui Gao and
Yu Wang and
Rong Luo and
Feng{-}Hsiung Hsu},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {FPGA-based acceleration of neural network for ranking in web search
engine with a streaming architecture},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {662--665},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272343},
doi = {10.1109/FPL.2009.5272343},
timestamp = {Tue, 23 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YanXCGWLH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YiannacourasSR09,
author = {Peter Yiannacouras and
J. Gregory Steffan and
Jonathan Rose},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Data parallel {FPGA} workloads: Software versus hardware},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {51--58},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272551},
doi = {10.1109/FPL.2009.5272551},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YiannacourasSR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YuLHMGZ09,
author = {Haile Yu and
Philip Heng Wai Leong and
Heiko Hinkelmann and
Leandro M{\"{o}}ller and
Manfred Glesner and
Peter Zipf},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Towards a unique FPGA-based identification circuit using process variations},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {397--402},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272255},
doi = {10.1109/FPL.2009.5272255},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/YuLHMGZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ZadnikCMML09,
author = {Martin Z{\'{a}}dn{\'{\i}}k and
Marco Canini and
Andrew W. Moore and
David J. Miller and
Wei Li},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Tracking elephant flows in internet backbone traffic with an FPGA-based
cache},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {640--644},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272387},
doi = {10.1109/FPL.2009.5272387},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ZadnikCMML09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Zain-ul-Abdin09,
author = {Zain{-}ul{-}Abdin},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {High-level programming of coarse-grained reconfigurable architectures},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {713--714},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272337},
doi = {10.1109/FPL.2009.5272337},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Zain-ul-Abdin09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ZhangNMRK09,
author = {Yiwei Zhang and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez and
Joe McGeehan and
Edward Regan and
Stephen Kelly},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {A biophysically accurate floating point somatic neuroprocessor},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {26--31},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272558},
doi = {10.1109/FPL.2009.5272558},
timestamp = {Wed, 17 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ZhangNMRK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/2009,
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
publisher = {{IEEE}},
year = {2009},
url = {https://ieeexplore.ieee.org/xpl/conhome/5247666/proceeding},
isbn = {978-1-4244-3892-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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