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@inproceedings{DBLP:conf/iscas/AftabS94,
author = {Syed A. Aftab and
M. A. Styblinski},
title = {{IC} Variability Minimization using a New Cp and Cpk Based Variability/Performance
Measure},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {149--152},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408777},
doi = {10.1109/ISCAS.1994.408777},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AftabS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AgarwalaB94,
author = {Sanjive Agarwala and
Patrick W. Bosshart},
title = {A Linear Time Algorithm for Timing Directed Circuit Optimizations},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {213--216},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408793},
doi = {10.1109/ISCAS.1994.408793},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AgarwalaB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AguirreCTF94,
author = {Miguel Angel Aguirre Ech{\'{a}}nove and
Jorge Ch{\'{a}}vez Orz{\'{a}}ez and
Antonio Jes{\'{u}}s Torralba Silgado and
Leopoldo Garc{\'{\i}}a Franquelo},
title = {Analog Design optimization by means of a Tabu Search Approach},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {375--378},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408875},
doi = {10.1109/ISCAS.1994.408875},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AguirreCTF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AhmedC94,
author = {Salman Ahmed and
Peter Y. K. Cheung},
title = {Analog Fault Diagnosis - {A} Practical Approach},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {351--354},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408869},
doi = {10.1109/ISCAS.1994.408869},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AhmedC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AmannMPVMM94,
author = {Hans Peter Amann and
Philippe Moeschler and
Fausto Pellandini and
Alain Vachoux and
Charles Munk and
Daniel Mlynek},
title = {High-Level Specification of Behavioural Hardware Models with {MODES}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {387--390},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408879},
doi = {10.1109/ISCAS.1994.408879},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AmannMPVMM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BaakeH94,
author = {Uwe F. Baake and
Sorin A. Huss},
title = {Scheduling of Signal Transition Graphs under Timing Constraints},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {205--208},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408791},
doi = {10.1109/ISCAS.1994.408791},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BaakeH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Bai94,
author = {Ying{-}Wen Bai},
title = {Interval Finite-Difference Methods for Digital {MOS} Circuits Simulation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {423--426},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408829},
doi = {10.1109/ISCAS.1994.408829},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Bai94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BallKM94,
author = {Carsten F. Ball and
Peter V. Kraus and
Dieter A. Mlynski},
title = {Fuzzy Partitioning applied to VLSI-Floorplanning and Placement},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {177--180},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408784},
doi = {10.1109/ISCAS.1994.408784},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BallKM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BandiA94,
author = {Vijaya Gopal Bandi and
Hideki Asai},
title = {Transient Simulation of Coupled Lossy Interconnects by Window Partitioning
Technique},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {419--422},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408828},
doi = {10.1109/ISCAS.1994.408828},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BandiA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BandlerBCG94,
author = {John W. Bandler and
R. M. Biernacki and
S. H. Chen and
P. A. Grobelny},
title = {A {CAD} Environment for Performance and Yield Driven Circuit Design
Employing Electromagnetic Field Simulators},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {145--148},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408776},
doi = {10.1109/ISCAS.1994.408776},
timestamp = {Tue, 29 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/BandlerBCG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BandlerCBM94,
author = {John W. Bandler and
S. H. Chen and
R. M. Biernacki and
Kim Halskov Madsen},
title = {The Huber Concept in Device Modeling, Circuit Diagnosis and Design
Centering},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {129--132},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408772},
doi = {10.1109/ISCAS.1994.408772},
timestamp = {Tue, 29 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/BandlerCBM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BolchiniFS94,
author = {Cristiana Bolchini and
Franco Fummi and
Donatella Sciuto},
title = {Two-Dimensional Sequential Array Architectures: Design for Testability
Approaches},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {81--84},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408760},
doi = {10.1109/ISCAS.1994.408760},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BolchiniFS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BrachtendorfL94,
author = {Hans Georg Brachtendorf and
Rainer Laur},
title = {Modeling of Frequency-dependent Hysteresis with {SPICE}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {343--346},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408866},
doi = {10.1109/ISCAS.1994.408866},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BrachtendorfL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CabodiCQ94,
author = {Gianpiero Cabodi and
Paolo Camurati and
Stefano Quer},
title = {Detecting hard faults with combined approximate forward/backward symbolic
techniques},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {299--302},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408814},
doi = {10.1109/ISCAS.1994.408814},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CabodiCQ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Caruso94,
author = {Giuseppe Caruso},
title = {An Improved Algorithm for Boolean Factoring},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {241--244},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408800},
doi = {10.1109/ISCAS.1994.408800},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Caruso94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CelikOTA94,
author = {Mustafa {\c{C}}elik and
Ogan Ocali and
Mehmet Ali Tan and
Abdullah Atalar},
title = {Improving {AWE} Accuracy Using Multipoint Pad{\'{e}} Approximation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {379--382},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408877},
doi = {10.1109/ISCAS.1994.408877},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/CelikOTA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangS94,
author = {Robert Chen{-}Hao Chang and
Bing J. Sheu},
title = {An Analog {MOS} Model for Circuit Simulation and Benchmark Test Results},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {311--314},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408817},
doi = {10.1109/ISCAS.1994.408817},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChangS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChaoS94,
author = {Liang{-}Fang Chao and
Edwin Hsing{-}Mean Sha},
title = {Retiming and Clock Skew for Synchronous Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {283--286},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408810},
doi = {10.1109/ISCAS.1994.408810},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChaoS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChavezTF94,
author = {Jorge Ch{\'{a}}vez Orz{\'{a}}ez and
Antonio Jes{\'{u}}s Torralba Silgado and
Leopoldo Garc{\'{\i}}a Franquelo},
title = {A Fuzzy-logic based Tool for Topology Selection in Analog Synthesis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {367--370},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408873},
doi = {10.1109/ISCAS.1994.408873},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChavezTF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenT94,
author = {Cheng{-}Hsi Chen and
Ioannis G. Tollis},
title = {A New Approach to Floorplan Area Optimization: To Slice or not to
Slice?},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {161--164},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408780},
doi = {10.1109/ISCAS.1994.408780},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CheonAL94,
author = {Beom{-}Ik Cheon and
Walter Anheier and
Rainer Laur},
title = {A New Strategy for Test Pattern Generation in Sequential Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {77--80},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408759},
doi = {10.1109/ISCAS.1994.408759},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CheonAL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChiangC94,
author = {Hsiao{-}Dong Chiang and
Chia{-}Chi Chu},
title = {A Systematic Search Method for Obtaining Multiple Local Optimal Solutions
of Nonlinear Programming Problems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {447--450},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408835},
doi = {10.1109/ISCAS.1994.408835},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChiangC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChinV94,
author = {P. Chin and
Anthony Vannelli},
title = {Interior Point Methods for Placement},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {169--172},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408782},
doi = {10.1109/ISCAS.1994.408782},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChinV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChoiLR94,
author = {Yhonkyong Choi and
Juhyun Lee and
Chong S. Rim},
title = {Automatic Functional Cell Generation in the Sea-of-Gates Layout Style},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {189--192},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408787},
doi = {10.1109/ISCAS.1994.408787},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChoiLR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CilogluU94,
author = {Tolga {\c{C}}iloglu and
Zafer {\"{U}}nver},
title = {A Novel Method for Discrete Coefficient {FIR} Digital Filter Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {261--264},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408805},
doi = {10.1109/ISCAS.1994.408805},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CilogluU94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DeniziakS94,
author = {Stanislaw Deniziak and
Krzysztof Sapiecha},
title = {Cupland - {A} Behavioral Level Description Compiler for Designing
of PLD/EPLD-Based Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {201--204},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408790},
doi = {10.1109/ISCAS.1994.408790},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DeniziakS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DeokarS94,
author = {Rahul B. Deokar and
Sachin S. Sapatnekar},
title = {A Graph-Theoretic Approach to Clock Skew Optimization},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {407--410},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408825},
doi = {10.1109/ISCAS.1994.408825},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DeokarS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DossisNP94,
author = {Michael F. Dossis and
James M. Noras and
Gary J. Porter},
title = {Synthesis of Customized Hardware from {ADA}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {229--232},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408797},
doi = {10.1109/ISCAS.1994.408797},
timestamp = {Tue, 02 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DossisNP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DuttaNR94,
author = {Santanu Dutta and
Sudip Nag and
Kaushik Roy},
title = {{ASAP:} {A} Transistor Sizing Tool for Speed Area and Power Optimization
of Static {CMOS} Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {61--64},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408755},
doi = {10.1109/ISCAS.1994.408755},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DuttaNR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FalkowskiC94,
author = {Bogdan J. Falkowski and
Chip{-}Hong Chang},
title = {Efficient Algorithms for the Calculation of Arithmetic Spectrum from
{OBDD} {\&} Synthesis of {OBDD} from Arithmetic Spectrum for Incompletely
Specified Boolean Functions},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {197--200},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408789},
doi = {10.1109/ISCAS.1994.408789},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FalkowskiC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FernandezGHKMSV94,
author = {Francisco V. Fern{\'{a}}ndez and
Georges G. E. Gielen and
Lawrence Huelsman and
Agnieszka Konczykowska and
Stefano Manetti and
Willy M. C. Sansen and
Jir{\'{\i}} Vlach},
title = {Pleasures, Perils and Pitfalls of Symbolic Analysis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {451--457},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408836},
doi = {10.1109/ISCAS.1994.408836},
timestamp = {Thu, 15 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FernandezGHKMSV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FernandezWGRS94,
author = {Francisco V. Fern{\'{a}}ndez and
Piet Wambacq and
Georges G. E. Gielen and
{\'{A}}ngel Rodr{\'{\i}}guez{-}V{\'{a}}zquez and
Willy M. C. Sansen},
title = {Symbolic Analysis of Large Analog Integrated Circuits by Approximation
During Expression Generation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {25--28},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408746},
doi = {10.1109/ISCAS.1994.408746},
timestamp = {Thu, 15 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FernandezWGRS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FronYDM94,
author = {J{\'{e}}r{\^{o}}me Fron and
Jerry Chih{-}Yuan Yang and
Maurizio Damiani and
Giovanni De Micheli},
title = {A Synthesis Framework Based on Trace and Automata Theory},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {291--294},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408812},
doi = {10.1109/ISCAS.1994.408812},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FronYDM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FujitaYCZM94,
author = {Masahiro Fujita and
Jerry Chih{-}Yuan Yang and
Edmund M. Clarke and
Xudong Zhao and
Patrick C. McGeer},
title = {Fast Spectrum Computation for Logic Functions using Binary Decision
Diagrams},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {275--278},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408808},
doi = {10.1109/ISCAS.1994.408808},
timestamp = {Tue, 17 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/FujitaYCZM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FujiyoshiKN94,
author = {Kunihiro Fujiyoshi and
Yoji Kajitani and
Hiroshi Niitsu},
title = {Design of Optimum Totally Perfect Connection-Blocks of {FPGA}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {221--224},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408795},
doi = {10.1109/ISCAS.1994.408795},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FujiyoshiKN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GanleyC94,
author = {Joseph L. Ganley and
James P. Cohoon},
title = {Routing a Multi-Terminal Critical Net: Steiner Tree Construction in
the Presence of Obstacles},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {113--116},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408768},
doi = {10.1109/ISCAS.1994.408768},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GanleyC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GreenfieldH94,
author = {Scott E. Greenfield and
Marwan M. Hassoun},
title = {Direct Hierarchical Symbolic Transient Analysis of Linear Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {29--32},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408747},
doi = {10.1109/ISCAS.1994.408747},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GreenfieldH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GyurcsikGB94,
author = {Ronald S. Gyurcsik and
George Gad{-}El{-}Karim and
Griff L. Bilbro},
title = {Sensitivity-Driven Placement of Analog Modules},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {363--366},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408872},
doi = {10.1109/ISCAS.1994.408872},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GyurcsikGB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Halen94,
author = {Paul Van Halen},
title = {A Physical Charge-Based Model for the Space Charge Region of Abrupt
and Linear Semiconductor Junctions},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {403--406},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408824},
doi = {10.1109/ISCAS.1994.408824},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Halen94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HamidaK94,
author = {Naim Ben{-}Hamida and
Bozena Kaminska},
title = {High Level Synthesis with Testability Constraints},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {65--68},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408756},
doi = {10.1109/ISCAS.1994.408756},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HamidaK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HarrisCQDM94,
author = {John Harris and
Mark Chadwick and
Tom Quan and
Norbert Diesing and
Edward MacRobbie},
title = {Mixed Analog-Digital Simulation: The tools are here... is anyone really
using them?},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {269--274},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408807},
doi = {10.1109/ISCAS.1994.408807},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HarrisCQDM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HashizumeTS94,
author = {Masaki Hashizume and
Takeomi Tamesada and
Akio Sakamoto},
title = {A Maximum Clique Derivation Algorithm for Simplification of Incompletely
Specified Machines},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {193--196},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408788},
doi = {10.1109/ISCAS.1994.408788},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HashizumeTS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HeijiligersHTJ94,
author = {M. J. M. Heijiligers and
H. A. Hilderink and
Adwin H. Timmer and
Jochen A. G. Jess},
title = {{NEAT:} An Object Oriented High-Level Synthesis Interface},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {233--236},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408798},
doi = {10.1109/ISCAS.1994.408798},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HeijiligersHTJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HerW94,
author = {T. W. Her and
D. F. Wong},
title = {Over-the-Cell Routing with Cell Orientations Consideration},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {471--474},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408840},
doi = {10.1109/ISCAS.1994.408840},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HerW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HirechFGR94,
author = {Mokhtar Hirech and
Olivier Florent and
Alain Greiner and
El Housseine Rejouan},
title = {A Redefinable Symbolic Simulation Technique to Testability Design
Rules Checking},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {89--92},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408762},
doi = {10.1109/ISCAS.1994.408762},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HirechFGR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HodesMR94,
author = {Todd D. Hodes and
Bernard A. McCoy and
Gabriel Robins},
title = {Dynamically-Wiresized Elmore-Based Routing Constructions},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {463--466},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408838},
doi = {10.1109/ISCAS.1994.408838},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HodesMR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Hoffmann94,
author = {Achim G. Hoffmann},
title = {The Dynamic Locking Heuristic - {A} New Graph Partitioning Algorithm},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {173--176},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408783},
doi = {10.1109/ISCAS.1994.408783},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Hoffmann94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HortaF94,
author = {Nuno C. G. Horta and
Jos{\'{e}} E. Franca},
title = {A Methodology for Automatic Generation of Data Conversion Topologies
from Algorithms},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {371--374},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408874},
doi = {10.1109/ISCAS.1994.408874},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HortaF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuC94,
author = {Yuan Hu and
Bradley S. Carlson},
title = {A Unified Algorithm for Estimation and Scheduling in Data Path Synthesis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {57--60},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408754},
doi = {10.1109/ISCAS.1994.408754},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuC94a,
author = {Yuan Hu and
Bradley S. Carlson},
title = {Improved Lower Bounds for the Scheduling Optimization Problem},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {295--298},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408813},
doi = {10.1109/ISCAS.1994.408813},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuC94a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IshidaHNA94,
author = {Masaki Ishida and
Koichi Hayashi and
Masakatsu Nishigaki and
Hideki Asai},
title = {Iterated Timing Analysis with Dynamic Partitioning Technique for Bipolar
Transistor Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {411--414},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408826},
doi = {10.1109/ISCAS.1994.408826},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IshidaHNA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IsoahoN94,
author = {Jouni Isoaho and
Jari Nurmi},
title = {An Overall {FIR} Filter Optimization Tool for High Granularity Implementation
Technologies},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {265--268},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408806},
doi = {10.1109/ISCAS.1994.408806},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IsoahoN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IstiyantoM94,
author = {Jazi Eko Istiyanto and
Sean Monaghan},
title = {FPGA-Memory Tradeoff in the High-Level Synthesis of FPGA-Based Reconfigurable
Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {209--212},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408792},
doi = {10.1109/ISCAS.1994.408792},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IstiyantoM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JohnstonGT94,
author = {Bruce A. Johnston and
Peter J. W. Graumann and
Laurence E. Turner},
title = {{DSP} System Synthesis Including Variable Data Path Width},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {53--56},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408753},
doi = {10.1109/ISCAS.1994.408753},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JohnstonGT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JokinenV94,
author = {Hannu Jokinen and
Martti Valtonen},
title = {Small-Signal Analysis of Nonideal Switched-Capacitor Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {395--398},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408881},
doi = {10.1109/ISCAS.1994.408881},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JokinenV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JongLLT94,
author = {Ching{-}Chuen Jong and
Y. Y. H. Lam and
S. S. Lim and
T. S. Teng},
title = {Time-Zone: {A} New Algorithm for Register Allocation in Data Path
Synthesis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {37--40},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408749},
doi = {10.1109/ISCAS.1994.408749},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JongLLT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouCC94,
author = {Jer{-}Min Jou and
Shung{-}Chih Chen and
Ren{-}Der Chen},
title = {A Super Fast {\&} Memory Efficient Diagnostic Simulation Algorithm
for Combinatorial Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {85--88},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408761},
doi = {10.1109/ISCAS.1994.408761},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JouCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouCK94,
author = {Jer{-}Min Jou and
Ren{-}Der Chen and
Shiann{-}Rong Kuang},
title = {Multiport Memory Based Data Path Allocation Focusing on Interconnection
Optimization},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {45--48},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408751},
doi = {10.1109/ISCAS.1994.408751},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JouCK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouPSW94,
author = {Shyh{-}Jye Jou and
Mei{-}Fang Perng and
Chauchin Su and
C. K. Wang},
title = {Hierarchical Techniques for Symbolic Analysis of Large Electronic
Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {21--24},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408745},
doi = {10.1109/ISCAS.1994.408745},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JouPSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JungJ94,
author = {Sung Tae Jung and
Chu Shik Jhon},
title = {Direct Synthesis of Efficient Speed-Independent Circuits from Deterministic
Signal Transition Graphs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {307--310},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408816},
doi = {10.1109/ISCAS.1994.408816},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JungJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KanekoS94,
author = {Mineo Kaneko and
Kazuhiro Sakaguchi},
title = {Oscillation Fault Diagnosis for Analog Circuits based on Boundary
Search with Perturbation Model},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {93--96},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408763},
doi = {10.1109/ISCAS.1994.408763},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KanekoS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KayssiS94,
author = {Ayman I. Kayssi and
Karem A. Sakallah},
title = {Macromodel Simplification Using Dimensional Analysis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {335--338},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408864},
doi = {10.1109/ISCAS.1994.408864},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KayssiS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KhanMS94,
author = {Wasim Khan and
Sreekrishna Madhwapathy and
Naveed A. Sherwani},
title = {A Hierarchical Approach to Clock Routing in High Performance Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {467--470},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408839},
doi = {10.1109/ISCAS.1994.408839},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KhanMS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KhordocC94,
author = {Karim Khordoc and
Eduard Cerny},
title = {Modeling Cell Processing Hardware with Action Diagrams},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {245--248},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408801},
doi = {10.1109/ISCAS.1994.408801},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KhordocC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KoideKYWY94,
author = {Tetsushi Koide and
Yoshinori Katsura and
Katsumi Yamatani and
Shin'ichi Wakabayashi and
Noriyoshi Yoshida},
title = {A Floorplanning Method with Topological Constraint Manipulation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {165--168},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408781},
doi = {10.1109/ISCAS.1994.408781},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KoideKYWY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KoleSH94,
author = {M. E. Kole and
J. Smith and
O. E. Herrmann},
title = {Modeling Symmetry in Analog Electronic Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {315--318},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408818},
doi = {10.1109/ISCAS.1994.408818},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KoleSH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KriplaniNH94,
author = {Harish Kriplani and
Farid N. Najm and
Ibrahim N. Hajj},
title = {Improved Delay and Current Models for Estimating Maximum Currents
in {CMOS} {VLSI} Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {435--438},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408832},
doi = {10.1109/ISCAS.1994.408832},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KriplaniNH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lahti94,
author = {Jukka Lahti},
title = {Graphical Specification Methods for Digital Telecommuniation ASICs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {257--260},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408804},
doi = {10.1109/ISCAS.1994.408804},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Lahti94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LaiTS94,
author = {William Y. M. Lai and
C. K. Tse and
C. H. Szeto},
title = {Computer Formulation of Averaged Models for Periodically-Switched
Networks},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {253--256},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408803},
doi = {10.1109/ISCAS.1994.408803},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LaiTS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LallementBM94,
author = {Christophe Lallement and
R. Bouchakour and
T. Maurel},
title = {A {VDMOS} transistor model taking into account the thermoelectrical
interactions},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {327--330},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408821},
doi = {10.1109/ISCAS.1994.408821},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LallementBM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LauKC94,
author = {Jack Lau and
Ping K. Ko and
Philip C. Chan},
title = {On the Modelling of a {CMOS} Magnetic Sensor},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {323--326},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408820},
doi = {10.1109/ISCAS.1994.408820},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LauKC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeH94,
author = {Jai{-}Cheol Lee and
Yu Hen Hu},
title = {{EDLICS:} {A} New Relaxation-Based Electrical Circuit Simulation Technique},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {1--4},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408740},
doi = {10.1109/ISCAS.1994.408740},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeeH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LongM94,
author = {David I. Long and
Saad Sabih Ahmed Medhat},
title = {Behavioural Modelling of Mixed Signal ASICs: {A} new multi-level approach},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {331--334},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408822},
doi = {10.1109/ISCAS.1994.408822},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LongM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuOAS94,
author = {Jin{-}Qin Lu and
Kimihiro Ogawa and
Takehiko Adachi and
Andrzej J. Strojwas},
title = {Stochastic Interpolation Model Scheme for Statistical Circuit Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {125--128},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408771},
doi = {10.1109/ISCAS.1994.408771},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LuOAS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MalowanyRA94,
author = {Morie E. Malowany and
Gordon W. Roberts and
Vinod K. Agarwal},
title = {{VAMP:} {A} Hierarchical Framework for Design for Manufacturability},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {141--144},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408775},
doi = {10.1109/ISCAS.1994.408775},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MalowanyRA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MauritzM94,
author = {H. Mauritz and
Wolfgang Mathis},
title = {Integration System as Adaptive Control System},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {101--104},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408765},
doi = {10.1109/ISCAS.1994.408765},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MauritzM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Miura-MattauschRBFS94,
author = {Mitiko Miura{-}Mattausch and
Alexander Rahm and
Michael Bollu and
Ute Feldmann and
Dominique Savignac},
title = {A Novel Consistent {MOSFET} Model for {CAD} Application with Reduced
Calculation Time},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {391--394},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408880},
doi = {10.1109/ISCAS.1994.408880},
timestamp = {Tue, 02 Jan 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Miura-MattauschRBFS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MoenclaeyK94,
author = {Nicolas Moenclaey and
Andreas Kaiser},
title = {Accurate Modelling of the Non-Linear Settling Behaviour of Current
Memory Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {339--342},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408865},
doi = {10.1109/ISCAS.1994.408865},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MoenclaeyK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MolinM94,
author = {Bengt{-}Arne Molin and
Sven Mattisson},
title = {Concurrent Switch-Level Timing Simulation Based on Waveform Relaxation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {415--418},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408827},
doi = {10.1109/ISCAS.1994.408827},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MolinM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MoreiraW94,
author = {Dilvan de Abreu Moreira and
Les T. Walczowski},
title = {Automated Placement for a Leaf Cell Generator},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {117--120},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408769},
doi = {10.1109/ISCAS.1994.408769},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MoreiraW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Nabavi-LishiR94,
author = {Abdolreza Nabavi{-}Lishi and
Nicholas C. Rumin},
title = {Inverter-based Models for Current Analysis of {CMOS} Logic Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {13--16},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408743},
doi = {10.1109/ISCAS.1994.408743},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Nabavi-LishiR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NagarajKH94,
author = {N. S. Nagaraj and
Paul Krivacek and
Mark Harward},
title = {Approximate Computation of Signal Characteristics of On-chip {RC}
Interconnect Trees},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {109--112},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408767},
doi = {10.1109/ISCAS.1994.408767},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NagarajKH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NishigakiTA94,
author = {Masakatsu Nishigaki and
Nobuyuki Tanaka and
Hideki Asai},
title = {Mixed Mode Circuit Simulator {SPLIT2.1} using Dynamic Network Separation
and Selective Trace},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {9--12},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408742},
doi = {10.1109/ISCAS.1994.408742},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NishigakiTA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OgrodzkiB94,
author = {Jan Ogrodzki and
Dariusz Bukat},
title = {Compact Modelling in Circuit Simulation: the General Purpose Analyser
{OPTIMA-3}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {383--386},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408878},
doi = {10.1109/ISCAS.1994.408878},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/OgrodzkiB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OpalskiW94,
author = {Leszek J. Opalski and
Jacek Wojciechowski},
title = {Application of the Piecewise Ellipsoidal Approximation Technique to
Design Centering},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {137--140},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408774},
doi = {10.1109/ISCAS.1994.408774},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/OpalskiW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PillanS94,
author = {Margherita Pillan and
Donatella Sciuto},
title = {Constraint Generation {\&} Placement for Automatic Layout Design
of Analog Integrated Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {355--358},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408870},
doi = {10.1109/ISCAS.1994.408870},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PillanS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PramanickA94,
author = {Ira Pramanick and
Hyder Ali},
title = {Analysis and Experiments for a Parallel Solution to the All Pairs
Shortest Path Problem},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {479--482},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408842},
doi = {10.1109/ISCAS.1994.408842},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PramanickA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PrietoQRH94,
author = {Juan A. Prieto and
Jos{\'{e}} M. Quintana and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {An Algorithm for the Place-and-Route Problem in the Layout of Analog
Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {491--494},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408845},
doi = {10.1109/ISCAS.1994.408845},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PrietoQRH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/QuS94,
author = {Ming Qu and
M. A. Styblinski},
title = {Statistical Characterization and Modeling of Analog Functional Blocks},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {121--124},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408770},
doi = {10.1109/ISCAS.1994.408770},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/QuS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RamakrishnaB94,
author = {N. A. Ramakrishna and
Magdy A. Bayoumi},
title = {Storage Allocation Strategies for Data Path Synthesis of ACICs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {41--44},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408750},
doi = {10.1109/ISCAS.1994.408750},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RamakrishnaB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RimJ94,
author = {Minjoong Rim and
Rajiv Jain},
title = {Estimating Performance Characteristics of Loop Transformations},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {249--252},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408802},
doi = {10.1109/ISCAS.1994.408802},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RimJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RousseC94,
author = {Chris J. Rousse and
Alison J. Carter},
title = {Exploring Delay/Area Trade-Offs of an {LDI} Filter Using a Natural
Based Algorithm},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {217--220},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408794},
doi = {10.1109/ISCAS.1994.408794},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RousseC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SafirHT94,
author = {Abdelhakim Safir and
Baher Haroun and
Krishnaiyan Thulasiraman},
title = {A Floorplanner driven by Structural {\&} Timing Constraints},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {157--160},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408779},
doi = {10.1109/ISCAS.1994.408779},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SafirHT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Sang-InC94,
author = {Akachai Sang{-}In and
Peter Y. K. Cheung},
title = {A Method of Representative Fault Selection in Digital Circuits for
{ATPG}},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {73--76},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408758},
doi = {10.1109/ISCAS.1994.408758},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Sang-InC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SeghalCA94,
author = {Naresh Kumar Seghal and
C. Y. Roger Chen and
John M. Acken},
title = {A High Performance General Purpose Multi-Point Signal Router},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {475--478},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408841},
doi = {10.1109/ISCAS.1994.408841},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SeghalCA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SenooMA94,
author = {Takeshi Senoo and
Hiroaki Makino and
Hideki Asai},
title = {Relaxation-Based Steady-State Analysis of Single- and Multi-Conductor
Transmission Lines in Frequency Domain},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {5--8},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408741},
doi = {10.1109/ISCAS.1994.408741},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SenooMA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SeoLL94,
author = {Kwangsoo Seo and
Jeongyop Lee and
Moonkey Lee},
title = {Allocation of Multiport Memories in {ASIC} Data Path Synthesis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {49--52},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408752},
doi = {10.1109/ISCAS.1994.408752},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SeoLL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShiJWB94,
author = {Keng{-}Hua Shi and
A. K. Jastrzebski and
Les T. Walczowski and
J. Barnaby},
title = {A Multi-Mode Simulation System for GaAs Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {427--430},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408830},
doi = {10.1109/ISCAS.1994.408830},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShiJWB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SilvaS94,
author = {Jo{\~{a}}o P. Marques Silva and
Karem A. Sakallah},
title = {Efficient and Robust Test Generation-Based Timing Analysis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {303--306},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408815},
doi = {10.1109/ISCAS.1994.408815},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SilvaS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SongC94,
author = {Ning Song and
Malgorzata Chrzanowska{-}Jeske},
title = {Output Column Folding for Cellular-Architecture FPGAs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {237--240},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408799},
doi = {10.1109/ISCAS.1994.408799},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SongC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SpruthJA94,
author = {Henning Spruth and
Frank M. Johannes and
Kurt Antreich},
title = {PHIroute: {A} Parallel Hierarchical Sea-of-Gates Router},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {487--490},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408844},
doi = {10.1109/ISCAS.1994.408844},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SpruthJA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StoyP94,
author = {Erik Stoy and
Zebo Peng},
title = {An Integrated Modelling Technique for Hardware/Software Systems},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {399--402},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408823},
doi = {10.1109/ISCAS.1994.408823},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/StoyP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuMI94,
author = {Hua Su and
Christopher Michael and
Mohammed Ismail},
title = {Statistical Constrained Optimization of Analog {CMOS} Circuits using
Empirical Performance Models},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {133--136},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408773},
doi = {10.1109/ISCAS.1994.408773},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SuMI94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TogawaSO94,
author = {Nozomu Togawa and
Masao Sato and
Tatsuo Ohtsuki},
title = {A Simultaneous Placement and Global Routing Algorithm for FPGAs},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {483--486},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408843},
doi = {10.1109/ISCAS.1994.408843},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TogawaSO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ToyonagaYAS94,
author = {Masahiko Toyonaga and
Shih{-}Tsung Yang and
Toshiro Akino and
Isao Shirakawa},
title = {A New Approach of Fractional-Dimension Based Module Clustering for
{VLSI} Layout},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {185--188},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408786},
doi = {10.1109/ISCAS.1994.408786},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ToyonagaYAS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TsaiM94,
author = {Chien{-}Chung Tsai and
Malgorzata Marek{-}Sadowska},
title = {Detecting Symmetric Variables in Boolean Functions using Generalized
Reel-Muller Forms},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {287--290},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408811},
doi = {10.1109/ISCAS.1994.408811},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TsaiM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/UebelB94,
author = {Lu{\'{\i}}s Felipe Uebel and
Sergio Bampi},
title = {A Timing Model for {VLSI} {CMOS} Circuits Verification and Optimization},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {439--442},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408833},
doi = {10.1109/ISCAS.1994.408833},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/UebelB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/UnaltunaP94,
author = {M. Kemal Unaltuna and
Vijay Pitchumani},
title = {A Stochastic Reward {\&} Punishment Neural Network Algorithm for
Circuit Bipartitioning},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {181--184},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408785},
doi = {10.1109/ISCAS.1994.408785},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/UnaltunaP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VandeventerS94,
author = {Lo{\"{\i}}c Vandeventer and
Jean Fran{\c{c}}ois Santucci},
title = {Using Binary Decision Diagrams to Speed up the Test Pattern Generation
of Behavioral Circuit Descriptions Written in Hardware Description
Languages},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {279--282},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408809},
doi = {10.1109/ISCAS.1994.408809},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/VandeventerS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WakabayashiIKY94,
author = {Shin'ichi Wakabayashi and
Kazunori Isomoto and
Tetsushi Koide and
Noriyoshi Yoshida},
title = {A Systolic Graph Partitioning Algorithm for {VLSI} Design},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {225--228},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408796},
doi = {10.1109/ISCAS.1994.408796},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WakabayashiIKY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WalABH94,
author = {A. B. van der Wal and
Robert G. J. Arendsen and
Aarnout Brombacher and
O. E. Herrmann},
title = {Hierarchical Statistical Verification of Large Full Custom {CMOS}
Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {443--446},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408834},
doi = {10.1109/ISCAS.1994.408834},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WalABH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangGS94,
author = {Zhihua Wang and
Georges G. E. Gielen and
Willy M. C. Sansen},
title = {A Novel Method for the Fault Detection of Analog Integrated Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {347--350},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408868},
doi = {10.1109/ISCAS.1994.408868},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/WangGS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WeeM94,
author = {K. K. Wee and
R. J. Mack},
title = {Towards Expandable and Generalised Analogue Design Automation},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {359--362},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408871},
doi = {10.1109/ISCAS.1994.408871},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WeeM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YanH94,
author = {Jin{-}Tai Yan and
Pei{-}Yung Hsiao},
title = {Region Definition of Minimizing the Number of Switchboxes and Ordering
Assignment},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {105--108},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408766},
doi = {10.1109/ISCAS.1994.408766},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YanH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangMA94,
author = {Kewei Yang and
Richard C. Meitzler and
Andreas G. Andreou},
title = {A Model for {MOS} Effective Channel Mobility with Emphasis in the
Subthreshold and Transition Region},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {431--434},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408831},
doi = {10.1109/ISCAS.1994.408831},
timestamp = {Fri, 28 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/YangMA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZamlynskiO94,
author = {Krzysztof Zamlynski and
Jan Ogrodzki},
title = {Electro-Thermal Analysis of IC's},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {17--20},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408744},
doi = {10.1109/ISCAS.1994.408744},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZamlynskiO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Zhang94,
author = {J. C. Zhang},
title = {Worst Case Design of Digital Integrated Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {153--156},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408778},
doi = {10.1109/ISCAS.1994.408778},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Zhang94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangBMM94,
author = {Shujian Zhang and
Rod Byrne and
Jon C. Muzio and
D. Michael Miller},
title = {Why Cellular Automata are better than LFSRs as Built-in Self-test
Generators for Sequential-type Faults},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {69--72},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408757},
doi = {10.1109/ISCAS.1994.408757},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhangBMM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangN94,
author = {Qi{-}Jun Zhang and
Michel S. Nakhla},
title = {Signal Integrity Analysis and Optimization of {VLSI} Interconnects
using Neural Network Models},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {459--462},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408837},
doi = {10.1109/ISCAS.1994.408837},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhangN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhaoC94,
author = {Dongfeng Zhao and
Ray R. Chen},
title = {{GODPE:} Global Optimization in Small Signal Device Model Parameter
Extraction},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {319--322},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408819},
doi = {10.1109/ISCAS.1994.408819},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhaoC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Ziolko94,
author = {Mariusz Zi{\'{o}}lko},
title = {Optimal Placement of Heat Dissipating Elements},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {97--99},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408764},
doi = {10.1109/ISCAS.1994.408764},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Ziolko94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZuberekKM94,
author = {Wlodzimierz M. Zuberek and
Agnieszka Konczykowska and
D. Martin},
title = {An Approach to Integrated Numerical {\&} Symbolic Circuit Analysis},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {33--36},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408748},
doi = {10.1109/ISCAS.1994.408748},
timestamp = {Mon, 01 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZuberekKM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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