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@inproceedings{DBLP:conf/mtdt/Aitken03,
  author       = {Robert C. Aitken},
  title        = {Applying Defect-Based Test to Embedded Memories in a {COT} Model},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {72},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222364},
  doi          = {10.1109/MTDT.2003.1222364},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Aitken03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Al-ArsG03,
  author       = {Zaid Al{-}Ars and
                  Ad J. van de Goor},
  title        = {Systematic Memory Test Generation for {DRAM} Defects Causing Two Floating
                  Nodes},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {27--32},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222357},
  doi          = {10.1109/MTDT.2003.1222357},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Al-ArsG03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Al-ArsHG03,
  author       = {Zaid Al{-}Ars and
                  Said Hamdioui and
                  Ad J. van de Goor},
  title        = {A Fault Primitive Based Analysis of Linked Faults in RAMs},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {33},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222358},
  doi          = {10.1109/MTDT.2003.1222358},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Al-ArsHG03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Barth03,
  author       = {Roger Barth},
  title        = {{ITRS} Commodity Memory Roadmap},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {61--63},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222362},
  doi          = {10.1109/MTDT.2003.1222362},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Barth03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ChoiPLKP03,
  author       = {Minsu Choi and
                  Nohpill Park and
                  Fabrizio Lombardi and
                  Yong{-}Bin Kim and
                  Vincenzo Piuri},
  title        = {Optimal Spare Utilization in Repairable and Reliable Memory Cores},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {64--71},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222363},
  doi          = {10.1109/MTDT.2003.1222363},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ChoiPLKP03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/CockburnTE03,
  author       = {Bruce F. Cockburn and
                  Jes{\'{u}}s Hern{\'{a}}ndez Tapia and
                  Duncan G. Elliott},
  title        = {A Multilevel {DRAM} with Hierarchical Bitlines and Serial Sensing},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {14--19},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222355},
  doi          = {10.1109/MTDT.2003.1222355},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/CockburnTE03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/DagaPRCSG03,
  author       = {Jean Michel Daga and
                  Caroline Papaix and
                  Emmanuel Racape and
                  Marylene Combe and
                  Vincent Sialelli and
                  Jeanine Guichaoua},
  title        = {A 40ns Random Access Time Low Voltage 2Mbits {EEPROM} Memory for Embedded
                  Applications},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {81--85},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222365},
  doi          = {10.1109/MTDT.2003.1222365},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/DagaPRCSG03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/HuangDWL03,
  author       = {Rei{-}Fu Huang and
                  Li{-}Ming Denq and
                  Cheng{-}Wen Wu and
                  Jin{-}Fu Li},
  title        = {A Testability-Driven Optimizer and Wrapper Generator for Embedded
                  Memories},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {53},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222361},
  doi          = {10.1109/MTDT.2003.1222361},
  timestamp    = {Tue, 17 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/HuangDWL03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Prince03,
  author       = {Betty Prince},
  title        = {Application Specific DRAMs Today},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {7--13},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222354},
  doi          = {10.1109/MTDT.2003.1222354},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Prince03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/SalamonC03,
  author       = {Daniel Salamon and
                  Bruce F. Cockburn},
  title        = {An Electrical Simulation Model for the Chalcogenide Phase-Change Memory
                  Cell},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {86},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222366},
  doi          = {10.1109/MTDT.2003.1222366},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/SalamonC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Vollrath03,
  author       = {J{\"{o}}rg E. Vollrath},
  title        = {Output Timing Measurement Using an Idd Method},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {43--46},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222359},
  doi          = {10.1109/MTDT.2003.1222359},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Vollrath03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/WangYI03,
  author       = {Baosheng Wang and
                  Josh Yang and
                  Andr{\'{e}} Ivanov},
  title        = {Reducing Test Time of Embedded SRAMs},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {47--52},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222360},
  doi          = {10.1109/MTDT.2003.1222360},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/WangYI03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ZendaNF03,
  author       = {Youhei Zenda and
                  Koji Nakamae and
                  Hiromu Fujioka},
  title        = {Cost Optimum Embedded {DRAM} Design by Yield Analysis},
  booktitle    = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  pages        = {20},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/MTDT.2003.1222356},
  doi          = {10.1109/MTDT.2003.1222356},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ZendaNF03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtdt/2003,
  title        = {11th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/8664/proceeding},
  isbn         = {0-7695-2004-9},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/2003.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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