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@inproceedings{DBLP:conf/rsp/AhmadiniaBDMTFV05,
author = {Ali Ahmadinia and
Christophe Bobda and
Ji Ding and
Mateusz Majer and
J{\"{u}}rgen Teich and
S{\'{a}}ndor P. Fekete and
Jan van der Veen},
title = {A Practical Approach for Circuit Routing on Dynamic Reconfigurable
Devices},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {84--90},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.7},
doi = {10.1109/RSP.2005.7},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AhmadiniaBDMTFV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArgarwalAA05,
author = {Deepak Argarwal and
Christopher Robert Anderson and
Peter M. Athanas},
title = {An 8-GHz Ultra Wideband Transceiver Prototyping Testbed},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {121--127},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.12},
doi = {10.1109/RSP.2005.12},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ArgarwalAA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AugustonMS05,
author = {Mikhail Auguston and
James Bret Michael and
Man{-}tak Shing},
title = {Test Automation and Safety Assessment in Rapid Systems Prototyping},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {188--194},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.49},
doi = {10.1109/RSP.2005.49},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AugustonMS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AzevedoAWB05,
author = {Arnaldo Azevedo and
Luciano Volcan Agostini and
Fl{\'{a}}vio Rech Wagner and
Sergio Bampi},
title = {Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined
{VLIW} Units},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {255--257},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.10},
doi = {10.1109/RSP.2005.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AzevedoAWB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BelanovicR05,
author = {Pavle Belanovic and
Markus Rupp},
title = {Automated Floating-Point to Fixed-Point Conversion with the Fixify
Environment},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {172--178},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.15},
doi = {10.1109/RSP.2005.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BelanovicR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BergeronSFD05,
author = {Etienne Bergeron and
Xavier Saint{-}Mleux and
Marc Feeley and
Jean{-}Pierre David},
title = {High Level Synthesis for Data-Driven Applications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {54--60},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.26},
doi = {10.1109/RSP.2005.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BergeronSFD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BieserM05,
author = {Carsten Bieser and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {{COMPASS} - {A} Novel Concept of a Reconfigurable Platform for Automotive
System Development and Test},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {135--140},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.18},
doi = {10.1109/RSP.2005.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BieserM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BouchhimaNAA05,
author = {Faouzi Bouchhima and
Gabriela Nicolescu and
El Mostapha Aboulhamid and
Mohamed Abid},
title = {Discrete-Continuous Simulation Model for Accurate Validation in Component-Based
Heterogeneous SoC Design},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.22},
doi = {10.1109/RSP.2005.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BouchhimaNAA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BriereDMNOG05,
author = {Matthieu Briere and
Emmanuel Drouard and
Fabien Mieyeville and
David Navarro and
Ian O'Connor and
Fr{\'{e}}d{\'{e}}ric Gaffiot},
title = {Heterogeneous Modelling of an Optical Network-on-Chip with SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.25},
doi = {10.1109/RSP.2005.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BriereDMNOG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarterXG05,
author = {John D. Carter and
Ming Xu and
William B. Gardner},
title = {Rapid Prototyping of Embedded Software Using Selective Formalism},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.43},
doi = {10.1109/RSP.2005.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarterXG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CastonguayS05,
author = {Ami Castonguay and
Yvon Savaria},
title = {A HyperTransport Chip-to-Chip Interconnect Tunnel Developed Using
SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {264--266},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.6},
doi = {10.1109/RSP.2005.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CastonguayS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chirila-RusDVSV05,
author = {Adrian Chirila{-}Rus and
Kristof Denolf and
Bart Vanhoof and
Paul R. Schumacher and
Kees A. Vissers},
title = {Communication Primitives Driven Hardware Design and Test Methodology
Applied on Complex Video Applications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {246--249},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.17},
doi = {10.1109/RSP.2005.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Chirila-RusDVSV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChungSK05,
author = {Moo{-}Kyoung Chung and
Heejun Shim and
Chong{-}Min Kyung},
title = {Performance Improvement of Multiprocessor Simulation by Optimizing
Synchronization a Communication},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {158--164},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.38},
doi = {10.1109/RSP.2005.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChungSK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CordesDLG05,
author = {Ben Cordes and
Jennifer G. Dy and
Miriam Leeser and
James Goebel},
title = {Enabling a Real-Time Solution for Neuron Detection with Reconfigurable
Hardware},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {128--134},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.24},
doi = {10.1109/RSP.2005.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CordesDLG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DemoracskiA05,
author = {Luke Demoracski and
Dimiter R. Avresky},
title = {An Approach for Functional Decomposition Applied to State-Based Designs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {243--245},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.13},
doi = {10.1109/RSP.2005.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DemoracskiA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DragoneL05,
author = {Silvio Dragone and
Clemens Lombriser},
title = {The Ordering of Events in a Prototyping Platform},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {211--217},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.51},
doi = {10.1109/RSP.2005.51},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DragoneL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskySD05,
author = {Doron Drusinsky and
Man{-}tak Shing and
Kadir Alpaslan Demir},
title = {Test-Time, Run-Time, and Simulation-Time Temporal Assertions in {RSP}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {105--110},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.50},
doi = {10.1109/RSP.2005.50},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskySD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrassetRJ05,
author = {Arnaud Grasset and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Ahmed Amine Jerraya},
title = {Automatic Generation of Component Wrappers by Composition of Hardware
Library Elements Starting from Communication Service Specification},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {47--53},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.16},
doi = {10.1109/RSP.2005.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrassetRJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HallK05,
author = {Thomas S. Hall and
Kenneth B. Kent},
title = {Thread-Level Parallel Execution in Co-Designed Virtual Machines},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {249--251},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.52},
doi = {10.1109/RSP.2005.52},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HallK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HsuB05,
author = {Chia{-}Jui Hsu and
Shuvra S. Bhattacharyya},
title = {Porting {DSP} Applications across Design Tools Using the Dataflow
Interchange Format},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {40--46},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.39},
doi = {10.1109/RSP.2005.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HsuB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuetCP05,
author = {Sylvain Huet and
Emmanuel Casseau and
Olivier Pasquier},
title = {Design Exploration and {HW/SW} Rapid Prototyping for Real-Time System
Design},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {240--243},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.21},
doi = {10.1109/RSP.2005.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HuetCP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IhmorLH05,
author = {Stefan Ihmor and
Tobias Loke and
Wolfram Hardt},
title = {Synthesis of Communication Structures and Protocols in Distributed
Embedded Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {3--9},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.47},
doi = {10.1109/RSP.2005.47},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IhmorLH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IndrusiakPG05,
author = {Leandro Soares Indrusiak and
Romualdo Begale Prudencio and
Manfred Glesner},
title = {Modeling and Prototyping of Communication Systems Using Java: {A}
Case Study},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {225--231},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.32},
doi = {10.1109/RSP.2005.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IndrusiakPG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IrmanB05,
author = {Martin Irman and
Jan Bajcsy},
title = {A Rapid System Prototyping Platform for Error Control Coding in Optical
{CDMA} Networks},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {232--234},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.8},
doi = {10.1109/RSP.2005.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IrmanB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JeradB05,
author = {Chadlia Jerad and
Kamel Barkaoui},
title = {On the Use of Rewriting Logic for Verification of Distributed Software
Architecture Description Based LfP},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {202--208},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.34},
doi = {10.1109/RSP.2005.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JeradB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KostarasV05,
author = {Rolf Drechsler and
G{\"{o}}rschwin Fey and
Christian Genz and
Daniel Gro{\ss}e},
title = {SyCE: An Integrated Environment for System Design in SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {258--260},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.46},
doi = {10.1109/RSP.2005.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KostarasV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KostarasV05a,
author = {Nikolaos Kostaras and
Haridimos T. Vergos},
title = {KoVer: {A} Sophisticated Residue Arithmetic Core Generator},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {261--263},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.27},
doi = {10.1109/RSP.2005.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KostarasV05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrastevaJTR05,
author = {Yana Esteves Krasteva and
Ana B. Jimeno and
Eduardo de la Torre and
Teresa Riesgo},
title = {Straight Method for Reallocation of Complex Cores by Dynamic Reconfiguration
in Virtex {II} FPGAs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {77--83},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.45},
doi = {10.1109/RSP.2005.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrastevaJTR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LapalmeAN05,
author = {James Lapalme and
El Mostapha Aboulhamid and
Gabriela Nicolescu},
title = {Leveraging Model Representations for System Level Design Tools},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {33--39},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.28},
doi = {10.1109/RSP.2005.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LapalmeAN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LemaireCDLJ05,
author = {Romain Lemaire and
Fabien Clermidy and
Yves Durand and
Didier Lattard and
Ahmed Amine Jerraya},
title = {Performance Evaluation of a NoC-Based Design for {MC-CDMA} Telecommunications
Using {NS-2}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {24--30},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.37},
doi = {10.1109/RSP.2005.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LemaireCDLJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LucioPB05,
author = {Levi Lucio and
Luis Pedro and
Didier Buchs},
title = {A Test Language for {CO-OPN} Specifications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {195--201},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.9},
doi = {10.1109/RSP.2005.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LucioPB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MarconKSC05,
author = {C{\'{e}}sar A. M. Marcon and
M{\'{a}}rcio Eduardo Kreutz and
Altamiro Amadeu Susin and
Ney Laert Vilar Calazans},
title = {Models for Embedded Application Mapping onto NoCs: Timing Analysis},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.33},
doi = {10.1109/RSP.2005.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MarconKSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NajibiSNPS05,
author = {Mehrdad Najibi and
Kamran Saleh and
Mohsen Naderi and
Hossein Pedram and
Mehdi Sedighi},
title = {Prototyping Globally Asynchronous Locally Synchronous Circuits on
Commercial Synchronous FPGAs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {63--69},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.41},
doi = {10.1109/RSP.2005.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NajibiSNPS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkC05,
author = {Sanggyu Park and
Soo{-}Ik Chae},
title = {A C/C++-Based Functional Verification Framework Using the SystemC
Verification Library},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {237--239},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.5},
doi = {10.1109/RSP.2005.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PetkovAH05,
author = {Ivan Petkov and
Paul Amblard and
Marin Hristov},
title = {Systematic Design Flow for Fast Hardware/Software Prototype Generation
from Bus Functional Model for MPSoC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {218--224},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.48},
doi = {10.1109/RSP.2005.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PetkovAH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/QaderJ05,
author = {Ghulam Qader and
M. Younus Javed},
title = {Simulation of Resolution of {CS} Problem for Multiple Common Variables
in Multiprocessor Environment},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {93--98},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.44},
doi = {10.1109/RSP.2005.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/QaderJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchliebuschCWKALM05,
author = {Oliver Schliebusch and
Anupam Chattopadhyay and
Ernst Martin Witte and
David Kammler and
Gerd Ascheid and
Rainer Leupers and
Heinrich Meyr},
title = {Optimization Techniques for ADL-Driven {RTL} Processor Synthesis},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {165--171},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.36},
doi = {10.1109/RSP.2005.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SchliebuschCWKALM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SongZG05,
author = {S. W. Song and
J. D. Zheng and
William B. Gardner},
title = {Prototyping a Residential Gateway Using Xilinx {ISE}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {267--269},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.40},
doi = {10.1109/RSP.2005.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SongZG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ThornbergOO05,
author = {Benny Th{\"{o}}rnberg and
Leif Olsson and
Mattias O'Nils},
title = {Optimization of Memory Allocation for Real-Time Video Processing on
{FPGA}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {141--147},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.35},
doi = {10.1109/RSP.2005.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ThornbergOO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VergmaudHPK05,
author = {Thomas Vergnaud and
J{\'{e}}r{\^{o}}me Hugues and
Laurent Pautet and
Fabrice Kordon},
title = {Rapid Development Methodology for Customized Middleware},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {111--117},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.42},
doi = {10.1109/RSP.2005.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VergmaudHPK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VisariusMSH05,
author = {Markus Visarius and
Andr{\'{e}} Meisel and
Markus Scheithauer and
Wolfram Hardt},
title = {Dynamic Reconfiguration of IP-Based Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {70--76},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.23},
doi = {10.1109/RSP.2005.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VisariusMSH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VivekanandarajahS05,
author = {Kugan Vivekanandarajah and
Thambipillai Srikanthan},
title = {Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {151--157},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.20},
doi = {10.1109/RSP.2005.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VivekanandarajahS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05,
title = {Message from the General Chairs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.29},
doi = {10.1109/RSP.2005.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05a,
title = {Message from the Organizing Chair},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.30},
doi = {10.1109/RSP.2005.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05b,
title = {Message from the Program Chairs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.31},
doi = {10.1109/RSP.2005.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05c,
title = {Conference Committees},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.19},
doi = {10.1109/RSP.2005.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2005,
title = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://ieeexplore.ieee.org/xpl/conhome/10092/proceeding},
isbn = {0-7695-2361-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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