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@article{DBLP:journals/integration/BiverKT89,
  author       = {Marc Biver and
                  Hubert Kaeslin and
                  Carlo Tommasini},
  title        = {Architectural design and realization of a single-chip Viterbi decoder},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {3--16},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90069-2},
  doi          = {10.1016/0167-9260(89)90069-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/BiverKT89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/BouridanePDH89,
  author       = {A. Bouridane and
                  A. Pajayakrit and
                  Satnam Singh Dlay and
                  A. G. J. Holt},
  title        = {{CMOS} {VLSI} circuits of pipeline sections for 32 and 64-point Fermat
                  number transformers},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {51--64},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90072-2},
  doi          = {10.1016/0167-9260(89)90072-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/BouridanePDH89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/ClaesenSDJPM89,
  author       = {Luc J. M. Claesen and
                  J. P. Schupp and
                  P. Das and
                  P. Johannes and
                  S. Perremans and
                  Hugo De Man},
  title        = {Efficient false path elimination algorithms for timing verification
                  by event graph preprocessing},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {173--187},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90047-3},
  doi          = {10.1016/0167-9260(89)90047-3},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/ClaesenSDJPM89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/EvansM89,
  author       = {David J. Evans and
                  Konstantinos G. Margaritis},
  title        = {Systolic block {LU} decompositions},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {65--90},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90073-4},
  doi          = {10.1016/0167-9260(89)90073-4},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/EvansM89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/GonzalezZ89,
  author       = {Teofilo F. Gonzalez and
                  Si{-}Qing Zheng},
  title        = {Stretching and three-layer wiring planar layouts},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {111--141},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90044-8},
  doi          = {10.1016/0167-9260(89)90044-8},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/GonzalezZ89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/GopalakrishnanFAM89,
  author       = {Ganesh Gopalakrishnan and
                  Richard M. Fujimoto and
                  Venkatesh Akella and
                  Narayana Mani},
  title        = {{HOP:} {A} process model for synchronous hardware; semantics and experiments
                  in process composition},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {209--247},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90018-7},
  doi          = {10.1016/0167-9260(89)90018-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/GopalakrishnanFAM89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/HortensiusCM89,
  author       = {Peter D. Hortensius and
                  Howard C. Card and
                  Robert D. McLeod},
  title        = {{VLSI} computing architectures for Ising model simulation},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {155--172},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90046-1},
  doi          = {10.1016/0167-9260(89)90046-1},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/HortensiusCM89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/JenK89,
  author       = {Chein{-}Wei Jen and
                  Ding{-}Ming Kwai},
  title        = {Multi-dimensional parallel computing structures for regular iterative
                  algorithms},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {331--340},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90024-2},
  doi          = {10.1016/0167-9260(89)90024-2},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/JenK89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/JosephP89,
  author       = {Amnon Joseph and
                  Ron Y. Pinter},
  title        = {Feed-through river routing},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {41--50},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90071-0},
  doi          = {10.1016/0167-9260(89)90071-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/JosephP89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/LodiLP89,
  author       = {Elena Lodi and
                  Fabrizio Luccio and
                  Linda Pagli},
  title        = {Channel routing for strictly multiterminal nets},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {143--153},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90045-X},
  doi          = {10.1016/0167-9260(89)90045-X},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/LodiLP89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Lombardi89,
  author       = {Fabrizio Lombardi},
  title        = {On a new class of C-testable systolic arrays},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {269--283},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90020-5},
  doi          = {10.1016/0167-9260(89)90020-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Lombardi89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Lousberg89,
  author       = {G. E. A. Lousberg},
  title        = {Two terminal channel routing using at most density plus two tracks},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {321--330},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90023-0},
  doi          = {10.1016/0167-9260(89)90023-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Lousberg89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/LursinsapG89,
  author       = {Chidchanok Lursinsap and
                  Daniel Gajski},
  title        = {Power routing in channelless floorplan layouts},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {249--268},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90019-9},
  doi          = {10.1016/0167-9260(89)90019-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/LursinsapG89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/McKinneyG89,
  author       = {Brian C. McKinney and
                  Fayez El Guibaly},
  title        = {{VLSI} design of an {FFT} processor network},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {301--320},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90022-9},
  doi          = {10.1016/0167-9260(89)90022-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/McKinneyG89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/PitaksanonkulTL89,
  author       = {Anucha Pitaksanonkul and
                  Suchai Thanawastien and
                  Chidchanok Lursinsap},
  title        = {Bisection trees and half-quad trees: Memory and time efficient data
                  structures for {VLSI} layout editors},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {285--300},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90021-7},
  doi          = {10.1016/0167-9260(89)90021-7},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/PitaksanonkulTL89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/RouzeyreES89,
  author       = {Bruno Rouzeyre and
                  Toufic Ezzedine and
                  Georges Sagnes},
  title        = {Operators allocation in the silicon compiler {SCOOP}},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {99--109},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90043-6},
  doi          = {10.1016/0167-9260(89)90043-6},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/integration/RouzeyreES89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/SchultzHS89,
  author       = {Kenneth J. Schultz and
                  David H. K. Hoe and
                  C. Andr{\'{e}} T. Salama},
  title        = {A microprogrammable processor using single poly {EPROM}},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {189--199},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90048-5},
  doi          = {10.1016/0167-9260(89)90048-5},
  timestamp    = {Mon, 15 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/SchultzHS89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spaanenburg89,
  author       = {Lambert Spaanenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {1},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90068-0},
  doi          = {10.1016/0167-9260(89)90068-0},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spaanenburg89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spaanenburg89a,
  author       = {Lambert Spaanenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {8},
  number       = {3},
  pages        = {207},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90017-5},
  doi          = {10.1016/0167-9260(89)90017-5},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spaanenburg89a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/Spannenburg89,
  author       = {Lambert Spannenburg},
  title        = {Editorial},
  journal      = {Integr.},
  volume       = {8},
  number       = {2},
  pages        = {97},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90042-4},
  doi          = {10.1016/0167-9260(89)90042-4},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/Spannenburg89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/TanT89,
  author       = {Kok{-}Phuang Tan and
                  Tiow Seng Tan},
  title        = {Switchbox routing using score function},
  journal      = {Integr.},
  volume       = {8},
  number       = {1},
  pages        = {17--39},
  year         = {1989},
  url          = {https://doi.org/10.1016/0167-9260(89)90070-9},
  doi          = {10.1016/0167-9260(89)90070-9},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/TanT89.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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