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@article{DBLP:journals/taco/AlbericioTIVL12,
author = {Jorge Albericio and
Ruben Gran Tejero and
Pablo Ib{\'{a}}{\~{n}}ez and
V{\'{\i}}ctor Vi{\~{n}}als and
Jos{\'{e}} Mar{\'{\i}}a Llaber{\'{\i}}a},
title = {{ABS:} {A} low-cost adaptive controller for prefetching in a banked
shared last-level cache},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {19:1--19:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086698},
doi = {10.1145/2086696.2086698},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AlbericioTIVL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BayrakVIB12,
author = {Ali Galip Bayrak and
Nikola Velickovic and
Paolo Ienne and
Wayne P. Burleson},
title = {An architecture-independent instruction shuffler to protect against
side-channel attacks},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {20:1--20:19},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086699},
doi = {10.1145/2086696.2086699},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/BayrakVIB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BogdanskiRSG12,
author = {Bartosz Bogdanski and
Sven{-}Arne Reinemo and
Frank Olaf Sem{-}Jacobsen and
Ernst Gunnar Gran},
title = {sFtree: {A} fully connected and deadlock-free switch-to-switch routing
algorithm for fat-trees},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {55:1--55:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086734},
doi = {10.1145/2086696.2086734},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/BogdanskiRSG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BruintjesWGMS12,
author = {Tom M. Bruintjes and
Karel H. G. Walters and
Sabih H. Gerez and
Bert Molenkamp and
Gerard J. M. Smit},
title = {Sabrewing: {A} lightweight architecture for combined floating-point
and integer arithmetic},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {41:1--41:22},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086720},
doi = {10.1145/2086696.2086720},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/BruintjesWGMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/CleemputCS12,
author = {Jeroen Van Cleemput and
Bart Coppens and
Bjorn De Sutter},
title = {Compiler mitigations for time attacks on modern x86 processors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {23:1--23:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086702},
doi = {10.1145/2086696.2086702},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/CleemputCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DasDU12,
author = {Dibyendu Das and
Beno{\^{\i}}t Dupont de Dinechin and
Ramakrishna Upadrasta},
title = {Efficient liveness computation using merge sets and DJ-graphs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {27:1--27:18},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086706},
doi = {10.1145/2086696.2086706},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DasDU12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DemmeS12,
author = {John Demme and
Simha Sethumadhavan},
title = {Approximate graph clustering for program characterization},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {21:1--21:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086700},
doi = {10.1145/2086696.2086700},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DemmeS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DomnitserJLAP12,
author = {Leonid Domnitser and
Aamer Jaleel and
Jason Loew and
Nael B. Abu{-}Ghazaleh and
Dmitry Ponomarev},
title = {Non-monopolizable caches: Low-complexity mitigation of cache side
channel attacks},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {35:1--35:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086714},
doi = {10.1145/2086696.2086714},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/DomnitserJLAP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DongCPDJ12,
author = {Yaozu Dong and
Yu Chen and
Zhenhao Pan and
Jinquan Dai and
Yunhong Jiang},
title = {ReNIC: Architectural extension to {SR-IOV} {I/O} virtualization for
efficient replication},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {40:1--40:22},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086719},
doi = {10.1145/2086696.2086719},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DongCPDJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/FengLG12,
author = {Min Feng and
Changhui Lin and
Rajiv Gupta},
title = {{PLDS:} Partitioning linked data structures for parallelism},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {38:1--38:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086717},
doi = {10.1145/2086696.2086717},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/FengLG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/Garcia-GuiradoPRG12,
author = {Antonio Garc{\'{\i}}a{-}Guirado and
Ricardo Fern{\'{a}}ndez Pascual and
Alberto Ros and
Jos{\'{e}} M. Garc{\'{\i}}a},
title = {{DAPSCO:} Distance-aware partially shared cache organization},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {25:1--25:19},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086704},
doi = {10.1145/2086696.2086704},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/Garcia-GuiradoPRG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/GilAGHCUHV12,
author = {J. Rub{\'{e}}n Titos Gil and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Tim Harris and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Ibrahim Hur and
Mateo Valero},
title = {Hardware transactional memory with software-defined conflicts},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {31:1--31:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086710},
doi = {10.1145/2086696.2086710},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/GilAGHCUHV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/HasenplaughAJSE12,
author = {William Hasenplaugh and
Pritpal S. Ahuja and
Aamer Jaleel and
Simon C. Steely Jr. and
Joel S. Emer},
title = {The gradient-based cache partitioning algorithm},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {44:1--44:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086723},
doi = {10.1145/2086696.2086723},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/HasenplaughAJSE12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/KichererNBK12,
author = {Mario Kicherer and
Fabian Nowak and
Rainer Buchty and
Wolfgang Karl},
title = {Seamlessly portable applications: Managing the diversity of modern
heterogeneous systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {42:1--42:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086721},
doi = {10.1145/2086696.2086721},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/KichererNBK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/KimLMP12,
author = {Yongjoo Kim and
Jongeun Lee and
Toan X. Mai and
Yunheung Paek},
title = {Improving performance of nested loops on reconfigurable array processors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {32:1--32:23},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086711},
doi = {10.1145/2086696.2086711},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/KimLMP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiraJMG12,
author = {Javier Lira and
Timothy M. Jones and
Carlos Molina and
Antonio Gonz{\'{a}}lez},
title = {The migration prefetcher: Anticipating data promotion in dynamic {NUCA}
caches},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {45:1--45:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086724},
doi = {10.1145/2086696.2086724},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LiraJMG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LyonsHWB12,
author = {Michael J. Lyons and
Mark Hempstead and
Gu{-}Yeon Wei and
David M. Brooks},
title = {The accelerator store: {A} shared memory framework for accelerator-based
systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {48:1--48:22},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086727},
doi = {10.1145/2086696.2086727},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LyonsHWB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/MalitsBKM12,
author = {Roman Malits and
Evgeny Bolotin and
Avinoam Kolodny and
Avi Mendelson},
title = {Exploring the limits of {GPGPU} scheduling in control flow bound applications},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {29:1--29:22},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086708},
doi = {10.1145/2086696.2086708},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/MalitsBKM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/McCandlessG12,
author = {Jason McCandless and
David Gregg},
title = {Compiler techniques to improve dynamic branch prediction for indirect
jump and call instructions},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {24:1--24:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086703},
doi = {10.1145/2086696.2086703},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/McCandlessG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/OrosaAB12,
author = {Lois Orosa and
Elisardo Antelo and
Javier D. Bruguera},
title = {FlexSig: Implementing flexible hardware signatures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {30:1--30:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086709},
doi = {10.1145/2086696.2086709},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/OrosaAB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/OrozcoGKLG12,
author = {Daniel A. Orozco and
Elkin Garcia and
Rishi Khan and
Kelly Livingston and
Guang R. Gao},
title = {Toward high-throughput algorithms on many-core architectures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {49:1--49:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086728},
doi = {10.1145/2086696.2086728},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/OrozcoGKLG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PatsilarasCT12,
author = {George Patsilaras and
Niket K. Choudhary and
James Tuck},
title = {Efficiently exploiting memory level parallelism on asymmetric coupled
cores in the dark silicon era},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {28:1--28:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086707},
doi = {10.1145/2086696.2086707},
timestamp = {Tue, 23 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/PatsilarasCT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PradelleKC12,
author = {Beno{\^{\i}}t Pradelle and
Alain Ketterlin and
Philippe Clauss},
title = {Polyhedral parallelization of binary code},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {39:1--39:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086718},
doi = {10.1145/2086696.2086718},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/PradelleKC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PremillieuS12,
author = {Nathana{\"{e}}l Pr{\'{e}}millieu and
Andr{\'{e}} Seznec},
title = {{SYRANT:} SYmmetric resource allocation on not-taken and taken paths},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {43:1--43:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086722},
doi = {10.1145/2086696.2086722},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/PremillieuS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PricopiM12,
author = {Mihai Pricopi and
Tulika Mitra},
title = {Bahurupi: {A} polymorphic heterogeneous multi-core architecture},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {22:1--22:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086701},
doi = {10.1145/2086696.2086701},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/PricopiM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PurnaprajnaI12,
author = {Madhura Purnaprajna and
Paolo Ienne},
title = {Making wide-issue {VLIW} processors viable on FPGAs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {33:1--33:16},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086712},
doi = {10.1145/2086696.2086712},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/PurnaprajnaI12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/PusukuriGB12,
author = {Kishore Kumar Pusukuri and
Rajiv Gupta and
Laxmi N. Bhuyan},
title = {Thread Tranquilizer: Dynamically reducing performance variation},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {46:1--46:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086725},
doi = {10.1145/2086696.2086725},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/PusukuriGB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/RadojkovicGGQYC12,
author = {Petar Radojkovic and
Sylvain Girbal and
Arnaud Grasset and
Eduardo Qui{\~{n}}ones and
Sami Yehia and
Francisco J. Cazorla},
title = {On the evaluation of the impact of shared resources in multithreaded
{COTS} processors in time-critical environments},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {34:1--34:25},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086713},
doi = {10.1145/2086696.2086713},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/RadojkovicGGQYC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/RicoCVPVERV12,
author = {Alejandro Rico and
Felipe Cabarcas and
Carlos Villavieja and
Milan Pavlovic and
Augusto Vega and
Yoav Etsion and
Alex Ram{\'{\i}}rez and
Mateo Valero},
title = {On the simulation of large-scale architectures using multiple application
abstraction levels},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {36:1--36:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086715},
doi = {10.1145/2086696.2086715},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/RicoCVPVERV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/RyckboschPE12,
author = {Frederick Ryckbosch and
Stijn Polfliet and
Lieven Eeckhout},
title = {VSim: Simulating multi-server setups at near native hardware speed},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {52:1--52:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086731},
doi = {10.1145/2086696.2086731},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/RyckboschPE12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SaidiTLM12,
author = {Selma Saidi and
Pranav Tendulkar and
Thierry Lepley and
Oded Maler},
title = {Optimizing explicit data transfers for data parallel applications
on the cell architecture},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {37:1--37:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086716},
doi = {10.1145/2086696.2086716},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SaidiTLM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/StenstromB12,
author = {Per Stenstr{\"{o}}m and
Koen De Bosschere},
title = {Introduction to the special issue on high-performance and embedded
architectures and compilers},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {18:1--18:2},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086697},
doi = {10.1145/2086696.2086697},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/StenstromB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/StockPS12,
author = {Kevin Stock and
Louis{-}No{\"{e}}l Pouchet and
P. Sadayappan},
title = {Using machine learning to improve automatic vectorization},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {50:1--50:23},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086729},
doi = {10.1145/2086696.2086729},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/StockPS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/TherdsteerasukdiBCCR12,
author = {Kanit Therdsteerasukdi and
Gyungsu Byun and
Jason Cong and
M. Frank Chang and
Glenn Reinman},
title = {Utilizing {RF-I} and intelligent scheduling for better throughput/watt
in a mobile {GPU} memory system},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {51:1--51:19},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086730},
doi = {10.1145/2086696.2086730},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/TherdsteerasukdiBCCR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WangKCS12,
author = {Qingping Wang and
Sameer Kulkarni and
John Cavazos and
Michael F. Spear},
title = {A transactional memory with automatic performance tuning},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {54:1--54:23},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086733},
doi = {10.1145/2086696.2086733},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/WangKCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WangWYLX12,
author = {Zhenjiang Wang and
Chenggang Wu and
Pen{-}Chung Yew and
Jianjun Li and
Di Xu},
title = {On-the-fly structure splitting for heap objects},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {26:1--26:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086705},
doi = {10.1145/2086696.2086705},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/WangWYLX12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ZhangGCWWCJ12,
author = {Dongsong Zhang and
Deke Guo and
Fang{-}Yuan Chen and
Fei Wu and
Tong Wu and
Ting Cao and
Shiyao Jin},
title = {TL-plane-based multi-core energy-efficient real-time scheduling algorithm
for sporadic tasks},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {47:1--47:20},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086726},
doi = {10.1145/2086696.2086726},
timestamp = {Fri, 12 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/ZhangGCWWCJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ZhouDCMM12,
author = {Miao Zhou and
Yu Du and
Bruce R. Childers and
Rami G. Melhem and
Daniel Moss{\'{e}}},
title = {Writeback-aware partitioning and replacement for last-level caches
in phase change main memory systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {53:1--53:21},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086732},
doi = {10.1145/2086696.2086732},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ZhouDCMM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BhattacharjeeCM11,
author = {Abhishek Bhattacharjee and
Gilberto Contreras and
Margaret Martonosi},
title = {Parallelization libraries: Characterizing and reducing overheads},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {1},
pages = {5:1--5:29},
year = {2011},
url = {https://doi.org/10.1145/1952998.1953003},
doi = {10.1145/1952998.1953003},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/BhattacharjeeCM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ChenA11,
author = {Xi E. Chen and
Tor M. Aamodt},
title = {Hybrid analytical modeling of pending cache hits, data prefetching,
and MSHRs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {10:1--10:28},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019609},
doi = {10.1145/2019608.2019609},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ChenA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/CherK11,
author = {Chen{-}Yong Cher and
Eren Kursun},
title = {Exploring the effects of on-chip thermal variation on high-performance
multicore architectures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {1},
pages = {2:1--2:22},
year = {2011},
url = {https://doi.org/10.1145/1952998.1953000},
doi = {10.1145/1952998.1953000},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/CherK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DongXMJ11,
author = {Xiangyu Dong and
Yuan Xie and
Naveen Muralimanohar and
Norman P. Jouppi},
title = {Hybrid checkpointing using emerging nonvolatile memories for future
exascale systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {2},
pages = {6:1--6:29},
year = {2011},
url = {https://doi.org/10.1145/1970386.1970387},
doi = {10.1145/1970386.1970387},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DongXMJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/EyermanE11,
author = {Stijn Eyerman and
Lieven Eeckhout},
title = {Fine-grained {DVFS} using on-chip regulators},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {1},
pages = {1:1--1:24},
year = {2011},
url = {https://doi.org/10.1145/1952998.1952999},
doi = {10.1145/1952998.1952999},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/EyermanE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/FengTLG11,
author = {Min Feng and
Chen Tian and
Changhui Lin and
Rajiv Gupta},
title = {Dynamic access distance driven cache replacement},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {14:1--14:30},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019613},
doi = {10.1145/2019608.2019613},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/FengTLG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/HiserWHDMC11,
author = {Jason Hiser and
Daniel W. Williams and
Wei Hu and
Jack W. Davidson and
Jason Mars and
Bruce R. Childers},
title = {Evaluating indirect branch handling mechanisms in software dynamic
translation systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {2},
pages = {9:1--9:28},
year = {2011},
url = {https://doi.org/10.1145/1970386.1970390},
doi = {10.1145/1970386.1970390},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/HiserWHDMC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/KleanthousS11,
author = {Marios Kleanthous and
Yiannakis Sazeides},
title = {{CATCH:} {A} mechanism for dynamically detecting cache-content-duplication
in instruction caches},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {11:1--11:27},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019610},
doi = {10.1145/2019608.2019610},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/KleanthousS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LeeCC11,
author = {Hyunjin Lee and
Sangyeun Cho and
Bruce R. Childers},
title = {{DEFCAM:} {A} design and evaluation framework for defect-tolerant
cache memories},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {17:1--17:29},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019616},
doi = {10.1145/2019608.2019616},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LeeCC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiWH11,
author = {Jianjun Li and
Chenggang Wu and
Wei{-}Chung Hsu},
title = {Efficient and effective misaligned data access handling in a dynamic
binary translation system},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {2},
pages = {7:1--7:29},
year = {2011},
url = {https://doi.org/10.1145/1970386.1970388},
doi = {10.1145/1970386.1970388},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LiWH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SamihSK11,
author = {Ahmad Samih and
Yan Solihin and
Anil Krishna},
title = {Evaluating placement policies for managing capacity sharing in {CMP}
architectures with private caches},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {15:1--15:23},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019614},
doi = {10.1145/2019608.2019614},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SamihSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/VandierendonckS11,
author = {Hans Vandierendonck and
Andr{\'{e}} Seznec},
title = {Managing {SMT} resource usage through speculative instruction window
weighting},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {12:1--12:20},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019611},
doi = {10.1145/2019608.2019611},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/VandierendonckS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/VenkataramaniHKP11,
author = {Guru Venkataramani and
Christopher J. Hughes and
Sanjeev Kumar and
Milos Prvulovic},
title = {DeFT: Design space exploration for on-the-fly detection of coherence
misses},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {2},
pages = {8:1--8:27},
year = {2011},
url = {https://doi.org/10.1145/1970386.1970389},
doi = {10.1145/1970386.1970389},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/VenkataramaniHKP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/VespaW11,
author = {Lucas Vespa and
Ning Weng},
title = {Deterministic finite automata characterization and optimization for
scalable pattern matching},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {1},
pages = {4:1--4:31},
year = {2011},
url = {https://doi.org/10.1145/1952998.1953002},
doi = {10.1145/1952998.1953002},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/VespaW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WangYCC11,
author = {Po{-}Han Wang and
Chia{-}Lin Yang and
Yen{-}Ming Chen and
Yu{-}Jung Cheng},
title = {Power gating strategies on GPUs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {13:1--13:25},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019612},
doi = {10.1145/2019608.2019612},
timestamp = {Tue, 04 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/WangYCC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WuM11,
author = {Carole{-}Jean Wu and
Margaret Martonosi},
title = {Adaptive timekeeping replacement: Fine-grained capacity management
for shared {CMP} caches},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {1},
pages = {3:1--3:26},
year = {2011},
url = {https://doi.org/10.1145/1952998.1953001},
doi = {10.1145/1952998.1953001},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/WuM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/YehCCY11,
author = {Chang{-}Ching Yeh and
Kuei{-}Chung Chang and
Tien{-}Fu Chen and
Chingwei Yeh},
title = {Maintaining performance on power gating of microprocessor functional
units by using a predictive pre-wakeup strategy},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {16:1--16:27},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019615},
doi = {10.1145/2019608.2019615},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/YehCCY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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