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@inproceedings{DBLP:conf/asscc/BaeJPJ16,
author = {Woo{-}Rham Bae and
Haram Ju and
Kwanseo Park and
Deog{-}Kyoon Jeong},
title = {A 6-to-32 Gb/s voltage-mode transmitter with scalable supply, voltage
swing, and pre-emphasis in 65-nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {241--244},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844180},
doi = {10.1109/ASSCC.2016.7844180},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/asscc/BaeJPJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/BankmanM16,
author = {Daniel Bankman and
Boris Murmann},
title = {An 8-bit, 16 input, 3.2 pJ/op switched-capacitor dot product circuit
in 28-nm {FDSOI} {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {21--24},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844125},
doi = {10.1109/ASSCC.2016.7844125},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/BankmanM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/Chan0HZLUM16,
author = {Chi{-}Hang Chan and
Yan Zhu and
Iok{-}Meng Ho and
Wai{-}Hong Zhang and
Chon{-}Lam Lio and
Seng{-}Pan U and
Rui Paulo Martins},
title = {A 0.011mm\({}^{\mbox{2}}\) 60dB {SNDR} 100MS/s reference error calibrated
{SAR} {ADC} with 3pF decoupling capacitance for reference voltages},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {145--148},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844156},
doi = {10.1109/ASSCC.2016.7844156},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/Chan0HZLUM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChanTFIULRNKZC16,
author = {Kok Lim Chan and
Kee Hian Tan and
Yohan Frans and
Jay Im and
Parag Upadhyaya and
Siok{-}Wei Lim and
Arianne Roldan and
Nakul Narang and
Chin Yang Koay and
Hongyuan Zhao and
Ken Chang},
title = {A 32.75-Gb/s voltage mode transmitter with 3-tap {FFE} in 16nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {233--236},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844178},
doi = {10.1109/ASSCC.2016.7844178},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChanTFIULRNKZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChangH16,
author = {Kwuang{-}Han Chang and
Chih{-}Cheng Hsieh},
title = {A 12 bit 150 MS/s 1.5 mW {SAR} {ADC} with adaptive radix {DAC} in
40 nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {157--160},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844159},
doi = {10.1109/ASSCC.2016.7844159},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChangH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenCHHWS16,
author = {Chi{-}Huan Chen and
Hung{-}Chen Chen and
Yu{-}Shyang Huang and
Ping{-}Hsuan Hsieh and
Ping{-}Hsien Wu and
Yi{-}Chung Shu},
title = {A series-SSHI-Phi interface circuit for piezoelectric energy harvesting
with 163{\%} improvement in extracted power at off-resonance},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {29--32},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844127},
doi = {10.1109/ASSCC.2016.7844127},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChenCHHWS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenGLMB16,
author = {Zhe Chen and
Hao Gao and
Domine M. W. Leenaerts and
Dusan M. Milosevic and
Peter G. M. Baltus},
title = {A 16-43 GHz low-noise amplifer with 2.5-4.0 dB noise figure},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {349--352},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844207},
doi = {10.1109/ASSCC.2016.7844207},
timestamp = {Thu, 17 May 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChenGLMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenM16,
author = {Si Chen and
Boris Murmann},
title = {An 8-bit 1.25GS/s {CMOS} IF-sampling {ADC} with background calibration
for dynamic distortion},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {69--72},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844137},
doi = {10.1109/ASSCC.2016.7844137},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/ChenM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenMM16,
author = {Zhijie Chen and
Masaya Miyahara and
Akira Matsuzawa},
title = {A 2\({}^{\mbox{nd}}\) order fully-passive noise-shaping {SAR} {ADC}
with embedded passive gain},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {309--312},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844197},
doi = {10.1109/ASSCC.2016.7844197},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChenMM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChiangHKL16,
author = {Chi{-}Huan Chiang and
Chang{-}Cheng Huang and
Ting{-}Kuei Kuan and
Shen{-}Iuan Liu},
title = {A digital {MDLL} using switched biasing technique to reduce low-frequency
phase noise},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {101--104},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844145},
doi = {10.1109/ASSCC.2016.7844145},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChiangHKL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChiouHPKH16,
author = {Albert Yen{-}Chih Chiou and
Sung{-}En Hsieh and
Yan{-}Quan Pan and
Chia{-}Chi Kuo and
Chih{-}Cheng Hsieh},
title = {An integrated {CMOS} optical sensing chip for multiple bio-signal
detections},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {197--200},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844169},
doi = {10.1109/ASSCC.2016.7844169},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChiouHPKH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChiuKCYCWLLLC16,
author = {Shao{-}Wei Chiu and
Chun{-}Chieh Kuo and
Kai{-}Cheng Chuang and
Wen{-}Hau Yang and
Ke{-}Horng Chen and
Chin{-}Long Wey and
Ying{-}Hsi Lin and
Jian{-}Ru Lin and
Lsung{-}Yen Lsai and
Jui{-}Lung Chen},
title = {93{\%} Efficiency and 0.99 power factor in pseudo-linear {LED} driver},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {53--56},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844133},
doi = {10.1109/ASSCC.2016.7844133},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChiuKCYCWLLLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChiuZN16,
author = {Pi{-}Feng Chiu and
Brian Zimmer and
Borivoje Nikolic},
title = {A double-tail sense amplifier for low-voltage {SRAM} in 28nm technology},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {181--184},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844165},
doi = {10.1109/ASSCC.2016.7844165},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/ChiuZN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChoiHCKN16,
author = {Seongrim Choi and
Jaemin Hwang and
Suhwan Cho and
Ara Kim and
Byeong{-}Gyu Nam},
title = {A low-power real-time hidden Markov model accelerator for gesture
user interface on wearable devices},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {261--264},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844185},
doi = {10.1109/ASSCC.2016.7844185},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChoiHCKN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChoiPY16,
author = {Sungpill Choi and
Seongwook Park and
Hoi{-}Jun Yoo},
title = {A 34pJ/level pixel depth-estimation processor with shifter-based pipelined
architecture for mobile user interface},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {257--260},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844184},
doi = {10.1109/ASSCC.2016.7844184},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChoiPY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChoiSKSP16,
author = {Young{-}Ho Choi and
Kihwan Seong and
Byungsub Kim and
Jae{-}Yoon Sim and
Hong{-}June Park},
title = {All-synthesizable 6Gbps voltage-mode transmitter for serial link},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {245--248},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844181},
doi = {10.1109/ASSCC.2016.7844181},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChoiSKSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/CochetPKZBCRAN16,
author = {Martin Cochet and
Alberto Puggelli and
Ben Keller and
Brian Zimmer and
Milovan Blagojevic and
Sylvain Clerc and
Philippe Roche and
Jean{-}Luc Autran and
Borivoje Nikolic},
title = {On-chip supply power measurement and waveform reconstruction in a
28nm {FD-SOI} processor SoC},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {125--128},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844151},
doi = {10.1109/ASSCC.2016.7844151},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/CochetPKZBCRAN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/CruzLL16,
author = {Hugo Cruz and
Shuenn{-}Yuh Lee and
Ching{-}Hsing Luo},
title = {A 13.56 MHz, 162 mW magnetically coupled digital rectifier with 94{\%}
VCR, 96{\%} {PCE} over 50-to-5k {\(\Omega\)} load range, and embedded
80 kbps {DBPSK} demodulator for biomedical applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {209--212},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844172},
doi = {10.1109/ASSCC.2016.7844172},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/CruzLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/DasGK16,
author = {Abhik Das and
Yuan Gao and
Tony T. Kim},
title = {An isolated PoR based pulse generator for {TEG} energy harvesting
with minimum startup of 150 mV and maximum series resistance of 600
{\(\Omega\)}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {297--300},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844194},
doi = {10.1109/ASSCC.2016.7844194},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/DasGK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/DeDorigoM16,
author = {Daniel DeDorigo and
Yiannos Manoli},
title = {An {OTA-C} signal processing {FPAA} with 305 MHz {GBW} and integrated
frequency-independent filter tuning},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {61--64},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844135},
doi = {10.1109/ASSCC.2016.7844135},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/DeDorigoM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/DoZK16,
author = {Anh{-}Tuan Do and
Seyed Mohammad Ali Zeinolabedin and
Tony Tae{-}Hyoung Kim},
title = {A 0.3 pJ/access 8T data-aware {SRAM} utilizing column-based data encoding
for ultra-low power applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {173--176},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844163},
doi = {10.1109/ASSCC.2016.7844163},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/DoZK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/DuanGSC16,
author = {Chuhong Duan and
Andreas J. Gotterba and
Mahmut E. Sinangil and
Anantha P. Chandrakasan},
title = {Reconfigurable, conditional pre-charge {SRAM:} Lowering read power
by leveraging data statistics},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {177--180},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844164},
doi = {10.1109/ASSCC.2016.7844164},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/DuanGSC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/DuongKSNKKYP16,
author = {Quoc{-}Hoang Duong and
Jeong{-}Woon Kong and
Hyeon{-}Seok Shin and
Huy{-}Hieu Nguyen and
Pan{-}Jong Kim and
Yu{-}Seok Ko and
Hwa{-}Yeoul Yu and
Ho{-}Jin Park},
title = {Multiple-loop design technique for high-performance low dropout regulator},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {217--220},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844174},
doi = {10.1109/ASSCC.2016.7844174},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/DuongKSNKKYP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/El-HalwagyMH16,
author = {Waleed El{-}Halwagy and
Pedram Mousavi and
Masum Hossain},
title = {A 79dB SNDR, 10MHz BW, 675MS/s open-loop time-based {ADC} employing
a 1.15ps {SAR-TDC}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {321--324},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844200},
doi = {10.1109/ASSCC.2016.7844200},
timestamp = {Fri, 05 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/El-HalwagyMH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/FujiwaraCLWSWLC16,
author = {Hidehiro Fujiwara and
Yen{-}Huei Chen and
Chih{-}Yu Lin and
Wei{-}Cheng Wu and
Dar Sun and
Shin{-}Rung Wu and
Hung{-}Jen Liao and
Jonathan Chang},
title = {A 64-Kb 0.37V 28nm 10T-SRAM with mixed-Vth read-port and boosted {WL}
scheme for IoT applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {185--188},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844166},
doi = {10.1109/ASSCC.2016.7844166},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/FujiwaraCLWSWLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/GuermandiSDDASB16,
author = {Davide Guermandi and
Qixian Shi and
Andy Dewilde and
Veerle Derudder and
Ubaid Ahmad and
Annachiara Spagnolo and
Andr{\'{e}} Bourdoux and
Piet Wambacq and
Wim Van Thillo},
title = {A 79GHz 2{\texttimes}2 {MIMO} {PMCW} radar SoC in 28nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {105--108},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844146},
doi = {10.1109/ASSCC.2016.7844146},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/GuermandiSDDASB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HaY16,
author = {Unsoo Ha and
Hoi{-}Jun Yoo},
title = {An {EEG-NIRS} ear-module SoC for wearable drowsiness monitoring system},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {193--196},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844168},
doi = {10.1109/ASSCC.2016.7844168},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HaY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HossainNEHA16,
author = {Masum Hossain and
Amlan Nag and
Waleed El{-}Halwagy and
A. K. M. Delwar Hossain and
Aurangozeb},
title = {Fractional-N {DPLL} based low power clocking architecture for 1-14
Gb/s multi-standard transmitter},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {89--92},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844142},
doi = {10.1109/ASSCC.2016.7844142},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HossainNEHA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HuCT16,
author = {Yin{-}Jyun Hu and
I{-}Chou Chen and
Tsung{-}Heng Tsai},
title = {A piezoelectric vibration energy harvesting system with improved power
extraction capability},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {305--308},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844196},
doi = {10.1109/ASSCC.2016.7844196},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/HuCT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HuHYWC16,
author = {Yao{-}Sheng Hu and
Po{-}Chao Huang and
Mi{-}Ti Yang and
Shih{-}Wei Wu and
Hsin{-}Shu Chen},
title = {A 0.9V 15fJ/conversion-step 8-bit 1.5GS/s two-step {SAR} {ADC}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {81--84},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844140},
doi = {10.1109/ASSCC.2016.7844140},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HuHYWC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HuLC16,
author = {Yao{-}Sheng Hu and
Kai{-}Yue Lin and
Hsin{-}Shu Chen},
title = {A 12-bit 200kS/s subranging {SAR} {ADC} with an energy-curve reshape
technique},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {149--152},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844157},
doi = {10.1109/ASSCC.2016.7844157},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HuLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HuangLKBVSWPDP16,
author = {Yanxiang Huang and
Chunshu Li and
Khaled Khalaf and
Andr{\'{e}} Bourdoux and
Julien Verschueren and
Qixian Shi and
Piet Wambacq and
Sofie Pollin and
Wim Dehaene and
Liesbet Van der Perre},
title = {A 28 nm {CMOS} 7.04 Gsps polar digital front-end processor for 60
GHz transmitter},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {333--336},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844203},
doi = {10.1109/ASSCC.2016.7844203},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HuangLKBVSWPDP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HungK16,
author = {Tsung{-}Chih Hung and
Tai{-}Haur Kuo},
title = {A 4.86 mW 15-bit 22.5 MS/s pipelined {ADC} with 74 dB {SNDR} in 90
nm {CMOS} using averaging correlated level shifting technique},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {161--164},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844160},
doi = {10.1109/ASSCC.2016.7844160},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HungK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/IizukaKNA16,
author = {Tetsuya Iizuka and
Takehisa Koga and
Toru Nakura and
Kunihiro Asada},
title = {A fine-resolution pulse-shrinking time-to-digital converter with completion
detection utilizing built-in offset pulse},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {313--316},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844198},
doi = {10.1109/ASSCC.2016.7844198},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/IizukaKNA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/IshiiYSMTYSSTN16,
author = {Yuichiro Ishii and
Makoto Yabuuchi and
Yohei Sawada and
Masao Morimoto and
Yasumasa Tsukamoto and
Yuta Yoshida and
Ken Shibata and
Toshiaki Sano and
Shinji Tanaka and
Koji Nii},
title = {A 5.92-Mb/mm\({}^{\mbox{2}}\) 28-nm pseudo 2-read/write dual-port
{SRAM} using double pumping circuitry},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {17--20},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844124},
doi = {10.1109/ASSCC.2016.7844124},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/IshiiYSMTYSSTN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/JalalifarB16,
author = {Majid Jalalifar and
Gyung{-}Su Byun},
title = {A 14.4Gb/s/pin 230fJ/b/pin/mm multi-level RF-interconnect for global
network-on-chip communication},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {97--100},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844144},
doi = {10.1109/ASSCC.2016.7844144},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/JalalifarB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/JiaPCWY16,
author = {Haikun Jia and
Clarissa C. Prawoto and
Baoyong Chi and
Zhihua Wang and
C. Patrick Yue},
title = {A 32.9{\%} PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm {CMOS}
using coupled resonators},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {345--348},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844206},
doi = {10.1109/ASSCC.2016.7844206},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/JiaPCWY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/JiangCRL16,
author = {Bingwei Jiang and
Chixiao Chen and
Junyan Ren and
Howard C. Luong},
title = {A 7.9-GHz transformer-feedback quadrature {VCO} with a noise-shifting
coupling network},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {353--356},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844208},
doi = {10.1109/ASSCC.2016.7844208},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/JiangCRL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/JinKHMS16,
author = {Wei Jin and
Seongjong Kim and
Weifeng He and
Zhigang Mao and
Mingoo Seok},
title = {A 0.35V 1.3pJ/cycle 20MHz 8-bit 8-tap {FIR} core based on wide-pulsed-latch
pipelines},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {129--132},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844152},
doi = {10.1109/ASSCC.2016.7844152},
timestamp = {Mon, 26 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/JinKHMS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KadomotoMAK16,
author = {Junichiro Kadomoto and
Tomoki Miyata and
Hideharu Amano and
Tadahiro Kuroda},
title = {An inductive-coupling bus with collision detection scheme using magnetic
field variation for 3-D network-on-chips},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {41--44},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844130},
doi = {10.1109/ASSCC.2016.7844130},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/KadomotoMAK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KimBS16,
author = {Taehwan Kim and
Pavan Bhargava and
Vladimir Stojanovic},
title = {A model predictive control equalization transmitter for asymmetric
interfaces in 28nm {FDSOI}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {237--240},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844179},
doi = {10.1109/ASSCC.2016.7844179},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/KimBS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KimKKC16,
author = {Sung{-}Geun Kim and
Tongsung Kim and
Dae Hyun Kwon and
Woo{-}Young Choi},
title = {A 5-8 Gb/s low-power transmitter with 2-tap pre-emphasis based on
toggling serialization},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {249--252},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844182},
doi = {10.1109/ASSCC.2016.7844182},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/KimKKC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KooSPKPRYK16,
author = {Jongeun Koo and
Eunwoo Song and
Eunhyeok Park and
Dongyoung Kim and
Junki Park and
Sungju Ryu and
Sungjoo Yoo and
Jae{-}Joon Kim},
title = {Area-efficient one-cycle correction scheme for timing errors in flip-flop
based pipelines},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {137--140},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844154},
doi = {10.1109/ASSCC.2016.7844154},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/KooSPKPRYK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KulkarniLZYWZA16,
author = {Vishal Vinayak Kulkarni and
Wei Yi Lim and
Bin Zhao and
Dan Lei Yan and
Yu{-}Shun Wang and
Jun Zhou and
Muthukumaraswamy Annamalai Arasu},
title = {A 5.1Gb/s 60.3fJ/bit/mm {PVT} tolerant NoC transceiver},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {141--144},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844155},
doi = {10.1109/ASSCC.2016.7844155},
timestamp = {Sat, 18 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/KulkarniLZYWZA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LeeC16,
author = {Hui{-}Hsuan Lee and
Po{-}Hung Chen},
title = {A single-inductor dual-input dual-output {(SIDIDO)} power management
with sequential pulse-skip modulation for battery/PV hybrid systems},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {293--296},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844193},
doi = {10.1109/ASSCC.2016.7844193},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LeeC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LeeKYOPPL16,
author = {Kyoungjin Lee and
Haneul Kim and
Jehyung Yoon and
Hyoung{-}Seok Oh and
Byeong{-}Ha Park and
Ho{-}Jin Park and
Yoonmyung Lee},
title = {A high efficiency wide-load-range asynchronous boost converter with
time-based dual-mode control for {SSD} applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {13--16},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844123},
doi = {10.1109/ASSCC.2016.7844123},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/LeeKYOPPL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LeeKYYJAKKSSPKN16,
author = {Hyunui Lee and
Sukyong Kang and
Hye{-}Seung Yu and
Won{-}Joo Yun and
Jae{-}Hun Jung and
Sungoh Ahn and
Wang{-}Soo Kim and
Beomyong Kil and
Yoo{-}Chang Sung and
Sang{-}Hoon Shin and
Yong{-}Sik Park and
Yong{-}Hwan Kim and
Kyung{-}Woo Nam and
Indal Song and
Kyomin Sohn and
Yong{-}Cheol Bae and
Jung{-}Hwan Choi and
Seong{-}Jin Jang and
Gyo{-}Young Jin},
title = {Design of non-contact 2Gb/s {I/O} test methods for high bandwidth
memory {(HBM)}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {169--172},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844162},
doi = {10.1109/ASSCC.2016.7844162},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LeeKYYJAKKSSPKN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LeeOKLSKKKYHLPL16,
author = {Dong{-}Soo Lee and
SeongJin Oh and
Sung{-}Jin Kim and
CheolHo Lee and
ChangHun Song and
Jungyeon Kim and
WooSeob Kim and
HongJin Kim and
Sang{-}Sun Yoo and
Sukkyun Hong and
Jeong{-}Woo Lee and
YoungGun Pu and
Kang{-}Yoon Lee},
title = {Low power {FSK} transceiver using {ADPLL} with direct modulation and
integrated {SPDT} for {BLE} application},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {113--116},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844148},
doi = {10.1109/ASSCC.2016.7844148},
timestamp = {Mon, 04 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LeeOKLSKKKYHLPL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiSKS16,
author = {Jiangyi Li and
Jae{-}sun Seo and
Ioannis Kymissis and
Mingoo Seok},
title = {Triple-mode photovoltaic power management: Achieving high efficiency
against harvesting and load variability},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {289--292},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844192},
doi = {10.1109/ASSCC.2016.7844192},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LiSKS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LinL16,
author = {Chun{-}Yu Lin and
Tsung{-}Hsien Lin},
title = {A 4-GHz {\(\Delta\)}{\(\Sigma\)} fractional-N frequency synthesizer
with 2-dimensional quantization noise pushing and fractional spur
elimination techniques},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {93--96},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844143},
doi = {10.1109/ASSCC.2016.7844143},
timestamp = {Thu, 05 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LinL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LinLCCL16,
author = {Chia{-}Lung Lin and
Rong{-}Jie Liu and
Chih{-}Lung Chen and
Hsie{-}Chia Chang and
Chen{-}Yi Lee},
title = {A 7.72 Gb/s {LDPC-CC} decoder with overlapped architecture for pre-5G
wireless communications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {337--340},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844204},
doi = {10.1109/ASSCC.2016.7844204},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LinLCCL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiuBMM16,
author = {Jun Liu and
Troy Bryant and
Nima Maghari and
Jeffery Morroni},
title = {A 90nA quiescent current 1.5V-5V 50mA asynchronous folding {LDO} using
dual loop control},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {221--224},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844175},
doi = {10.1109/ASSCC.2016.7844175},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LiuBMM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiuCRL16,
author = {Xiaolong Liu and
Chixiao Chen and
Junyan Ren and
Howard C. Luong},
title = {Transformer-based varactor-less 96GHz-110GHz {VCO} and 89GHz-101GHz
{QVCO} in 65nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {357--360},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844209},
doi = {10.1109/ASSCC.2016.7844209},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LiuCRL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiuHLC16,
author = {Kuan{-}Lin Liu and
Chih{-}Cheng Hsieh and
Sheng{-}Yeh Lai and
Chin{-}Fong Chiu},
title = {A time delay multiple integration linear {CMOS} image sensor for multispectral
satellite telemetry},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {37--40},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844129},
doi = {10.1109/ASSCC.2016.7844129},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/LiuHLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LuZP16,
author = {Shengshuo Lu and
Zhengya Zhang and
Marios C. Papaefthymiou},
title = {A 5.5GHz 0.84TOPS/mm\({}^{\mbox{2}}\) neural network engine with stream
architecture and resonant clock mesh},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {133--136},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844153},
doi = {10.1109/ASSCC.2016.7844153},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/LuZP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MaddoxCCKSF16,
author = {Mark Maddox and
Baozhen Chen and
Michael C. W. Coln and
Ron Kapusta and
Junhua Shen and
Lalinda Fernando},
title = {A 16 bit linear passive-charge-sharing {SAR} {ADC} in 55nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {153--156},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844158},
doi = {10.1109/ASSCC.2016.7844158},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/MaddoxCCKSF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MikiON16,
author = {Takuji Miki and
Toshiaki Ozeki and
Jun{-}ichi Naka},
title = {A 2GS/s 8b time-interleaved {SAR} {ADC} for millimeter-wave pulsed
radar baseband SoC},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {5--8},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844121},
doi = {10.1109/ASSCC.2016.7844121},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/MikiON16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MiyashitaKSD16,
author = {Daisuke Miyashita and
Shouhei Kousai and
Tomoya Suzuki and
Jun Deguchi},
title = {Time-domain neural network: {A} 48.5 TSOp/s/W neuromorphic chip optimized
for deep learning and {CMOS} technology},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {25--28},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844126},
doi = {10.1109/ASSCC.2016.7844126},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/MiyashitaKSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MohammadiALNR16,
author = {Babak Mohammadi and
Oskar Andersson and
Xiao Luo and
Masoud Nouripayam and
Joachim Neves Rodrigues},
title = {An area efficient single-cycle xVDD sub-Vth on-chip boost scheme in
28 nm {FD-SOI}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {229--232},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844177},
doi = {10.1109/ASSCC.2016.7844177},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/MohammadiALNR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/OshiroMTTWKOTYS16,
author = {Masayoshi Oshiro and
Tatsuhiko Maruyama and
Takashi Tokairin and
Yuki Tuda and
Tong Wang and
Naotaka Koide and
Yosuke Ogasawara and
Tuan Thanh Ta and
Hiroshi Yoshida and
Kenichi Sami},
title = {A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {1--4},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844120},
doi = {10.1109/ASSCC.2016.7844120},
timestamp = {Tue, 04 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/OshiroMTTWKOTYS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/OzakiHAKN16,
author = {Toshihiro Ozaki and
Tetsuya Hirose and
Hiroki Asano and
Nobutaka Kuroki and
Masahiro Numa},
title = {A 0.38-{\(\mu\)}W stand-by power, 50-nA-to-1-mA load current range
{DC-DC} converter with self-biased linear regulator for ultra-low
power battery management},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {225--228},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844176},
doi = {10.1109/ASSCC.2016.7844176},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/OzakiHAKN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/PiniMC16,
author = {Giacomo Pini and
Danilo Manstretta and
Rinaldo Castello},
title = {Highly linear {TIA} for SAW-less {FDD} receivers},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {117--120},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844149},
doi = {10.1109/ASSCC.2016.7844149},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/PiniMC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/PrinzieSLCM16,
author = {Jeffrey Prinzie and
Michiel Steyaert and
Paul Leroux and
Jorgen Christiansen and
Paulo Moreira},
title = {A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter {PLL}
with triple-modular redundant phase detector in 65 nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {285--288},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844191},
doi = {10.1109/ASSCC.2016.7844191},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/PrinzieSLCM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/QiuTZSZU16,
author = {Lei Qiu and
Kai Tang and
Yan Zhu and
Liter Siek and
Yuanjin Zheng and
Seng{-}Pan U},
title = {A 10-bit 1GS/s 4-way {TI} {SAR} {ADC} with tap-interpolated {FIR}
filter based time skew calibration},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {77--80},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844139},
doi = {10.1109/ASSCC.2016.7844139},
timestamp = {Tue, 11 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/QiuTZSZU16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/RenSLWUM16,
author = {Yuan Ren and
Sai{-}Weng Sin and
Chi{-}Seng Lam and
Man{-}Chung Wong and
Seng{-}Pan U and
Rui Paulo Martins},
title = {A high {DR} multi-channel stage-shared hybrid front-end for integrated
power electronics controller},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {57--60},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844134},
doi = {10.1109/ASSCC.2016.7844134},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/RenSLWUM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/SaadehAAY16,
author = {Wala Saadeh and
Haneen Alsuradi and
Muhammad Awais Bin Altaf and
Jerald Yoo},
title = {A 1.1mW hybrid {OFDM} ground effect-resilient body coupled communication
transceiver for head and body area network},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {201--204},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844170},
doi = {10.1109/ASSCC.2016.7844170},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/SaadehAAY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/SatpathyMSACKAH16,
author = {Sudhir Satpathy and
Sanu Mathew and
Vikram B. Suresh and
Mark A. Anders and
Gregory K. Chen and
Himanshu Kaul and
Amit Agarwal and
Steven Hsu and
Ram Krishnamurthy and
Vivek De},
title = {A 305mV-850mV 400{\(\mu\)}W 45GSamples/J reconfigurable compressive
sensing engine with early-termination for ultra-low energy target
detection in 14nm tri-gate {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {253--256},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844183},
doi = {10.1109/ASSCC.2016.7844183},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/SatpathyMSACKAH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/SomeyaMMST16,
author = {Teruki Someya and
Kenichi Matsunaga and
Hiroki Morimura and
Takayasu Sakurai and
Makoto Takamiya},
title = {56-Level programmable voltage detector in steps of 50mV for battery
management},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {49--52},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844132},
doi = {10.1109/ASSCC.2016.7844132},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/SomeyaMMST16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/SongRTS16,
author = {Jeonggoo Song and
Kareem Ragab and
Xiyuan Tang and
Nan Sun},
title = {A 10-b 800MS/s time-interleaved {SAR} {ADC} with fast timing-skew
calibration},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {73--76},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844138},
doi = {10.1109/ASSCC.2016.7844138},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/SongRTS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/SunMLSHM16,
author = {Hyuk Sun and
Jason Muhlestein and
Spencer Leuenberger and
Kazuki Sobue and
Koichi Hamashita and
Un{-}Ku Moon},
title = {A 50 MHz bandwidth 54.2 dB {SNDR} reference-free stochastic {ADC}
using VCO-based quantizers},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {325--328},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844201},
doi = {10.1109/ASSCC.2016.7844201},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/SunMLSHM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TamuraI16,
author = {Masato Tamura and
Makoto Ikeda},
title = {1.68{\(\mu\)}J/signature-generation 256-bit {ECDSA} over GF(p) signature
generator for IoT devices},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {341--344},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844205},
doi = {10.1109/ASSCC.2016.7844205},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/TamuraI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TangCWLLT16,
author = {Chen{-}Fan Tang and
Ke{-}Horng Chen and
Chin{-}Long Wey and
Ying{-}Hsi Lin and
Jian{-}Ru Lin and
Tsung{-}Yen Tsai},
title = {Ultra-low voltage ripple in {DC-DC} boost converter by the pumping
capacitor and wire inductance technique},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {301--304},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844195},
doi = {10.1109/ASSCC.2016.7844195},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/TangCWLLT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TanzawaMKTMD16,
author = {Toru Tanzawa and
T. Murakoshi and
T. Kamijo and
Tomoharu Tanaka and
J. J. McNeil and
K. Duesman},
title = {Design challenge in 3D {NAND} technology: {A} 4.8X area- and 1.3X
power-efficient 20V charge pump using tier capacitors},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {165--168},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844161},
doi = {10.1109/ASSCC.2016.7844161},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/TanzawaMKTMD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TillakASRLY16,
author = {Judyta Tillak and
Sina Akhbari and
Nimesh Shah and
Ljubomir Radakovic and
Liwei Lin and
Jerald Yoo},
title = {A 2.34{\(\mu\)}J/scan acoustic power scalable charge-redistribution
pMUT interface system with on-chip aberration compensation for portable
ultrasonic applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {189--192},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844167},
doi = {10.1109/ASSCC.2016.7844167},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/TillakASRLY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ToyamaOUI16,
author = {Yosuke Toyama and
Taichi Ogawa and
Takeshi Ueno and
Tetsuro Itakura},
title = {20 mV input, 4.2 {V} output {SIDO} boost converter with low-power
controller and adaptive switch size selector for thermoelectric energy
harvesting},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {9--12},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844122},
doi = {10.1109/ASSCC.2016.7844122},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ToyamaOUI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TsaiYWL16,
author = {Chang{-}Hung Tsai and
Wan{-}Ju Yu and
Wing Hung Wong and
Chen{-}Yi Lee},
title = {A 41.3pJ/26.7pJ per neuron weight {RBM} processor for on-chip learning/inference
applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {265--268},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844186},
doi = {10.1109/ASSCC.2016.7844186},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/TsaiYWL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TuCWL16,
author = {Chih{-}Chan Tu and
Kuan{-}Chung Chen and
Tsung{-}Yu Wu and
Tsung{-}Hsien Lin},
title = {An area-efficient wideband {CMOS} hall sensor system for camera autofocus
systems},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {33--36},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844128},
doi = {10.1109/ASSCC.2016.7844128},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/TuCWL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/TuWL16,
author = {Chih{-}Chan Tu and
Yu{-}Kai Wang and
Tsung{-}Hsien Lin},
title = {A 40-nV/VHz 0.0145-mm\({}^{\mbox{2}}\) sensor readout circuit with
chopped VCO-based {CTDSM} in 40-nm {CMOS}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {45--48},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844131},
doi = {10.1109/ASSCC.2016.7844131},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/TuWL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/WangL16,
author = {Chun{-}Ping Wang and
Tai{-}Cheng Lee},
title = {A technique for in-band phase noise reduction in fractional-N frequency
synthesizers},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {273--276},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844188},
doi = {10.1109/ASSCC.2016.7844188},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/WangL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/WangZZLTZC16,
author = {Chao Wang and
Jianmin Zhang and
Jun Zhou and
Xin Liu and
Ru San Tan and
Liang Zhong and
Kevin T. C. Chai},
title = {A 65-nm 0.35-V 7.1-{\(\mu\)}W memory-less adaptive {PCG} processor
for wearable long-term cardiac monitoring},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {329--332},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844202},
doi = {10.1109/ASSCC.2016.7844202},
timestamp = {Wed, 13 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/WangZZLTZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/WuPSKKSKUFTYMMO16,
author = {Rui Wu and
Jian Pang and
Yuuki Seo and
Kento Kimura and
Seitaro Kawai and
Shinji Sato and
Satoshi Kondo and
Tomohiro Ueno and
Nurul Fajri and
Yasuaki Takeuchi and
Tatsuya Yamaguchi and
Ahmed Musa and
Masaya Miyahara and
Kenichi Okada and
Akira Matsuzawa},
title = {An LO-buffer-less 60-GHz {CMOS} transmitter with oscillator pulling
mitigation},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {109--112},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844147},
doi = {10.1109/ASSCC.2016.7844147},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/WuPSKKSKUFTYMMO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YamadaTMYF16,
author = {Manabu Yamada and
Nam Binh Tran and
Takayuki Miyazaki and
Yoshiaki Yoshihara and
Ryuichi Fujimoto},
title = {All-digital single-inductor multiple-output {DC-DC} converter with
over 65.3{\%} efficiency in 1 uW to 50 mW load range and 86.3{\%}
peak efficiency},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {213--216},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844173},
doi = {10.1109/ASSCC.2016.7844173},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/YamadaTMYF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YangCWLLT16,
author = {Shang{-}Hsien Yang and
Ke{-}Horng Chen and
Chin{-}Long Wey and
Ying{-}Hsi Lin and
Jian{-}Ru Lin and
Tsung{-}Yen Tsai},
title = {Lossless inductor current control in envelope tracking supply modulator
with self-allocation of energy for optimzation of efficiency and {EVM}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {281--284},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844190},
doi = {10.1109/ASSCC.2016.7844190},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/YangCWLLT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YangGWZLL16,
author = {Fan Yang and
Hangyan Guo and
Runhua Wang and
Zherui Zhang and
Junhua Liu and
Huailin Liao},
title = {A low-power calibration-free fractional-N digital {PLL} with high
linear phase interpolator},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {269--272},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844187},
doi = {10.1109/ASSCC.2016.7844187},
timestamp = {Wed, 27 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/YangGWZLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YaoDG16,
author = {Lei Yao and
I. Made Darmayuda and
Yuan Gao},
title = {A 83{\%} peak efficiency 1.65 {V} to 11.4V dynamic voltage scaling
supply for electrical stimulation applications in standard 0.18{\(\mu\)}m
{CMOS} process},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {205--208},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844171},
doi = {10.1109/ASSCC.2016.7844171},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/YaoDG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YuMM16,
author = {Lilan Yu and
Masaya Miyahara and
Akira Matsuzawa},
title = {A 9-bit 500-MS/s 6.0-mW dynamic pipelined {ADC} using time-domain
linearized dynamic amplifiers},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {65--68},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844136},
doi = {10.1109/ASSCC.2016.7844136},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/YuMM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhangDLW16,
author = {Beichen Zhang and
Runjiang Dou and
Liyuan Liu and
Nanjian Wu},
title = {A 91.2dB {SNDR} 66.2fJ/conv. dynamic amplifier based 24kHz {\(\Delta\)}{\(\Sigma\)}
modulator},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {317--320},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844199},
doi = {10.1109/ASSCC.2016.7844199},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZhangDLW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhangZRW16,
author = {Yining Zhang and
Ranran Zhou and
Woogeun Rhee and
Zhihua Wang},
title = {A 1.9mW 750kb/s 2.4GHz {F-OOK} transmitter with symmetric {FM} template
and high-point modulation {PLL}},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {277--280},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844189},
doi = {10.1109/ASSCC.2016.7844189},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZhangZRW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhengZYZYWLW16,
author = {Xuqiang Zheng and
Chun Zhang and
Shuai Yuan and
Feng Zhao and
Shigang Yue and
Ziqiang Wang and
Fule Li and
Zhihua Wang},
title = {An improved 40 Gb/s {CDR} with jitter-suppression filters and phase-compensating
interpolators},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {85--88},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844141},
doi = {10.1109/ASSCC.2016.7844141},
timestamp = {Thu, 27 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZhengZYZYWLW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZimmerCNA16,
author = {Brian Zimmer and
Pi{-}Feng Chiu and
Borivoje Nikolic and
Krste Asanovic},
title = {Reprogrammable redundancy for cache Vmin reduction in a 28nm {RISC-V}
processor},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
pages = {121--124},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASSCC.2016.7844150},
doi = {10.1109/ASSCC.2016.7844150},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZimmerCNA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asscc/2016,
title = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
Japan, November 7-9, 2016},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7833314/proceeding},
isbn = {978-1-5090-3699-8},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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