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@inproceedings{DBLP:conf/vdat/AbburiETA12, author = {Kiran Kumar Abburi and Siva Subrahmanya Evani and Sajeev Thomas and Anup Aprem}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Reusable and Scalable Verification Environment for Memory Controllers}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {209--216}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_24}, doi = {10.1007/978-3-642-31494-0\_24}, timestamp = {Tue, 22 Oct 2019 15:21:19 +0200}, biburl = {https://dblp.org/rec/conf/vdat/AbburiETA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/AlamAD12, author = {Naushad Alam and Bulusu Anand and Sudeb Dasgupta}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {357--359}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_43}, doi = {10.1007/978-3-642-31494-0\_43}, timestamp = {Mon, 05 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/AlamAD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/BabuKBM12, author = {Gunti Nagendra Babu and Brajesh Kumar Kaushik and Anand Bulusu and Manoj Kumar Majumder}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Low Complexity Encoder for Crosstalk Reduction in {RLC} Modeled Interconnects}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {40--45}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_5}, doi = {10.1007/978-3-642-31494-0\_5}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/BabuKBM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/BandyopadhyayBSM12, author = {Soumyadip Bandyopadhyay and Kunal Banerjee and Dipankar Sarkar and Chittaranjan A. Mandal}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Translation Validation for {PRES+} Models of Parallel Behaviours via an {FSMD} Equivalence Checker}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {69--78}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_9}, doi = {10.1007/978-3-642-31494-0\_9}, timestamp = {Mon, 08 Mar 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/BandyopadhyayBSM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/BurmanPCMS12, author = {Sanjay Burman and Ayan Palchaudhuri and Rajat Subhra Chakraborty and Debdeep Mukhopadhyay and Pranav Singh}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Effect of Malicious Hardware Logic on Circuit Reliability}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {190--197}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_22}, doi = {10.1007/978-3-642-31494-0\_22}, timestamp = {Sat, 09 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/BurmanPCMS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/ChakiG12, author = {Sanga Chaki and Chandan Giri}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Test Data Compression for NoC Based SoCs Using Binary Arithmetic Operations}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {337--342}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_38}, doi = {10.1007/978-3-642-31494-0\_38}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ChakiG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/ChatterjeeS12, author = {Ayantika Chatterjee and Indranil Sengupta}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {High-Speed Unified Elliptic Curve Cryptosystem on FPGAs Using Binary Huff Curves}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {243--251}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_28}, doi = {10.1007/978-3-642-31494-0\_28}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ChatterjeeS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/ChoudhuryP12, author = {Priyanka Choudhury and Sambhu Nath Pradhan}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Power Modeling of Power Gated {FSM} and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {19--29}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_3}, doi = {10.1007/978-3-642-31494-0\_3}, timestamp = {Sat, 09 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ChoudhuryP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DaluiS12, author = {Mamata Dalui and Biplab K. Sikdar}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {An Efficient Test Design for CMPs Cache Coherence Realizing {MESI} Protocol}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {89--98}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_11}, doi = {10.1007/978-3-642-31494-0\_11}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DaluiS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DasDS12, author = {Subrata Das and Parthasarathi Dasgupta and Samar Sen{-}Sarma}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Arithmetic Algorithms for Ternary Number System}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {111--120}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_13}, doi = {10.1007/978-3-642-31494-0\_13}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DasDS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DasR12, author = {Debaprasad Das and Hafizur Rahaman}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Delay Uncertainty in Single- and Multi-Wall Carbon Nanotube Interconnects}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {289--299}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_33}, doi = {10.1007/978-3-642-31494-0\_33}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DasR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DasRR12, author = {Debaprasad Das and Avishek Sinha Roy and Hafizur Rahaman}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design of Content Addressable Memory Architecture Using Carbon Nanotube Field Effect Transistors}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {233--242}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_27}, doi = {10.1007/978-3-642-31494-0\_27}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DasRR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DasguptaSSCS12, author = {Rituparna Dasgupta and Dipankar Saha and Jagannath Samanta and Sayan Chatterjee and Chandan Kumar Sarkar}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {156--165}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_18}, doi = {10.1007/978-3-642-31494-0\_18}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/DasguptaSSCS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DobriyalGDM12, author = {Arun Dobriyal and Rahul Gonnabattula and Pallab Dasgupta and Chittaranjan A. Mandal}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Workload Driven Power Domain Partitioning}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {147--155}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_17}, doi = {10.1007/978-3-642-31494-0\_17}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DobriyalGDM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/DrechslerW12, author = {Rolf Drechsler and Robert Wille}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Reversible Circuits: Recent Accomplishments and Future Challenges for an Emerging Technology - (Invited Paper)}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {383--392}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_53}, doi = {10.1007/978-3-642-31494-0\_53}, timestamp = {Sun, 02 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/DrechslerW12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GhosalD12, author = {Prasun Ghosal and Tuhin Subhra Das}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Routing in NoC on Diametrical 2D Mesh Architecture}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {381--382}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_52}, doi = {10.1007/978-3-642-31494-0\_52}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GhosalD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GhoshTMCRM12, author = {Sudip Ghosh and Somsubhra Talapatra and Debasish Mondal and Navonil Chatterjee and Hafizur Rahaman and Santi P. Maity}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {{VLSI} Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {375--376}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_49}, doi = {10.1007/978-3-642-31494-0\_49}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GhoshTMCRM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GhoshalKSC12, author = {Bibhas Ghoshal and Subhadip Kundu and Indranil Sengupta and Santanu Chattopadhyay}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Particle Swarm Optimization Based {BIST} Design for Memory Cores in Mesh Based Network-on-Chip}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {343--349}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_39}, doi = {10.1007/978-3-642-31494-0\_39}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GhoshalKSC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GovindarajSC12, author = {Rekha Govindaraj and Indranil Sengupta and Santanu Chattopadhyay}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {An Efficient Technique for Longest Prefix Matching in Network Routers}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {317--326}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_36}, doi = {10.1007/978-3-642-31494-0\_36}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GovindarajSC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GuptaKRD12, author = {Partha Sarathi Gupta and Sayan Kanungo and Hafizur Rahaman and Parthasarathi Dasgupta}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {379--380}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_51}, doi = {10.1007/978-3-642-31494-0\_51}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GuptaKRD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/GuptaS12, author = {Anu Gupta and Subhrojyoti Sarkar}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {An Efficient High Frequency and Low Power Analog Multiplier in Current Domain}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {1--9}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_1}, doi = {10.1007/978-3-642-31494-0\_1}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/GuptaS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/HalderBNB12, author = {Santanu Halder and Debotosh Bhattacharjee and Mita Nasipuri and Dipak Kumar Basu}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Fast {FPGA} Based Architecture for Sobel Edge Detection}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {300--306}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_34}, doi = {10.1007/978-3-642-31494-0\_34}, timestamp = {Mon, 05 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/HalderBNB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/HatiB12, author = {Manas Kumar Hati and Tarun Kanti Bhattacharyya}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A High Speed, Low Jitter and Fast Acquisition {CMOS} Phase Frequency Detector for Charge Pump {PLL}}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {166--171}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_19}, doi = {10.1007/978-3-642-31494-0\_19}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/HatiB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/JamalPMB12, author = {Lafifa Jamal and Md. Masbaul Alam Polash and M. A. Mottalib and Hafiz Md. Hasan Babu}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {On the Compact Designs of Low Power Reversible Decoders and Sequential Circuits}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {281--288}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_32}, doi = {10.1007/978-3-642-31494-0\_32}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/JamalPMB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/JayagowriG12, author = {R. Jayagowri and K. S. Gurumurthy}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Implementation of Gating Technique with Modified Scan Flip-Flop for Low Power Testing of {VLSI} Chips}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {52--58}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_7}, doi = {10.1007/978-3-642-31494-0\_7}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/JayagowriG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/JunejaKCS12, author = {Dushyant Juneja and Sougata Kumar Kar and Procheta Chatterjee and Siddhartha Sen}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {{SOI} {MEMS} Based Over-Sampling Accelerometer Design with {\(\Delta\)}{\(\Sigma\)} Output}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {121--128}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_14}, doi = {10.1007/978-3-642-31494-0\_14}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/JunejaKCS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/KalyaniR12, author = {K. Kalyani and S. Rajaram}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Novel Symbol Estimation Algorithm for {LTE} Standard}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {354--356}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_42}, doi = {10.1007/978-3-642-31494-0\_42}, timestamp = {Sun, 17 Dec 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/KalyaniR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/KarSRM12, author = {Bapi Kar and Susmita Sur{-}Kolay and Sridhar H. Rangarajan and Chittaranjan A. Mandal}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Faster Hierarchical Balanced Bipartitioner for {VLSI} Floorplans Using Monotone Staircase Cuts}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {327--336}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_37}, doi = {10.1007/978-3-642-31494-0\_37}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/KarSRM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/KaushikKKM12, author = {Naveen Kaushik and Brajesh Kumar Kaushik and Davinder Kaur and Manoj Kumar Majumder}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Independent Gate {SRAM} Based on Asymmetric Gate to Source/Drain Overlap-Underlap Device FinFET}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {373--374}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_48}, doi = {10.1007/978-3-642-31494-0\_48}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/KaushikKKM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/KumarappanR12, author = {Arun Kumarappan and P. V. Ramakrishna}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Speech Processor Design for Cochlear Implants}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {307--316}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_35}, doi = {10.1007/978-3-642-31494-0\_35}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/KumarappanR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/KushwahV12, author = {Chandrabhan Kushwah and Santosh Kumar Vishvakarma}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Ultra-Low Power Sub-threshold {SRAM} Cell Design to Improve Read Static Noise Margin}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {139--146}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_16}, doi = {10.1007/978-3-642-31494-0\_16}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/KushwahV12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/MaityM12, author = {Biswajit Maity and Pradip Mandal}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design of Push-Pull Dynamic Leaker Circuit for a Low Power Embedded Voltage Regulator}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {10--18}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_2}, doi = {10.1007/978-3-642-31494-0\_2}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/MaityM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/MandalCS12, author = {Sudhindu Bikash Mandal and Amlan Chakrabarti and Susmita Sur{-}Kolay}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Synthesis Method for Quaternary Quantum Logic Circuits}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {270--280}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_31}, doi = {10.1007/978-3-642-31494-0\_31}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/MandalCS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/MondalGDC12, author = {Arpan Mondal and Santosh Ghosh and Abhijit Das and Dipanwita Roy Chowdhury}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Efficient {FPGA} Implementation of Montgomery Multiplier Using {DSP} Blocks}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {370--372}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_47}, doi = {10.1007/978-3-642-31494-0\_47}, timestamp = {Wed, 20 Dec 2017 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/MondalGDC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/MukherjeeD12, author = {Atin Mukherjee and Anindya Sundar Dhar}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design of a Fault-Tolerant Conditional Sum Adder}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {217--222}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_25}, doi = {10.1007/978-3-642-31494-0\_25}, timestamp = {Mon, 05 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/MukherjeeD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/NandiSD12, author = {Ashutosh Nandi and Ashok K. Saxena and Sudeb Dasgupta}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {46--51}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_6}, doi = {10.1007/978-3-642-31494-0\_6}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/NandiSD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/PatraCC12, author = {Biswajit Patra and Sanatan Chattopadhyay and Amlan Chakrabarti}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {360--363}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_44}, doi = {10.1007/978-3-642-31494-0\_44}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/PatraCC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/PoddarGMSR12, author = {Soumyajit Poddar and Prasun Ghosal and Priyajit Mukherjee and Suman Samui and Hafizur Rahaman}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Photonic Network on Chip with {CDMA} Links}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {377--378}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_50}, doi = {10.1007/978-3-642-31494-0\_50}, timestamp = {Fri, 27 Dec 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/PoddarGMSR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/RahamanMJP12, author = {Hafizur Rahaman and Jimson Mathew and Abusaleh M. Jabir and Dhiraj K. Pradhan}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {{VLSI} Architecture for Bit Parallel Systolic Multipliers for Special Class of {GF(2} m )Using Dual Bases}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {258--269}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_30}, doi = {10.1007/978-3-642-31494-0\_30}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/RahamanMJP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/RanaLC12, author = {Goutam Rana and Samir Kumar Lahiri and Chirasree Roy Chaudhuri}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design Optimization of a Wide Band {MEMS} Resonator for Efficient Energy Harvesting}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {129--138}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_15}, doi = {10.1007/978-3-642-31494-0\_15}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/RanaLC12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/RashidA12, author = {Farhana Rashid and Vishwani D. Agrawal}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Power Problems in {VLSI} Circuit Testing}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {393--405}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_54}, doi = {10.1007/978-3-642-31494-0\_54}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/RashidA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/RoyM12, author = {Debapriya Basu Roy and Debdeep Mukhopadhyay}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {An Efficient High Speed Implementation of Flexible Characteristic-2 Multipliers on FPGAs}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {99--110}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_12}, doi = {10.1007/978-3-642-31494-0\_12}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/RoyM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/RoyRGR12, author = {Surajit Kumar Roy and Dona Roy and Chandan Giri and Hafizur Rahaman}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Post-bond Stack Testing for 3D Stacked {IC}}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {59--68}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_8}, doi = {10.1007/978-3-642-31494-0\_8}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/RoyRGR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SahaBDB12, author = {Prabir Saha and Arindam Banerjee and Anup Dandapat and Partha Bhattacharyya}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design of High Speed Vedic Multiplier for Decimal Number System}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {79--88}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_10}, doi = {10.1007/978-3-642-31494-0\_10}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SahaBDB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SahooA12, author = {Manodipan Sahoo and Bharadwaj Amrutur}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Comparison of OpAmp Based and Comparator Based Switched Capacitor Filter}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {180--189}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_21}, doi = {10.1007/978-3-642-31494-0\_21}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SahooA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SahooM12, author = {Sauvagya Ranjan Sahoo and Kamala Kanta Mahapatra}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design of Combinational and Sequential Circuits Using Novel Feedthrough Logic}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {367--369}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_46}, doi = {10.1007/978-3-642-31494-0\_46}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SahooM12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SakareSG12, author = {Mahendra Sakare and Mohit Singh and Shalabh Gupta}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A 4 {\texttimes} 20 Gb/s 29-1 {PRBS} Generator for Testing a High-Speed {DAC} in 90nm {CMOS} Technology}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {252--257}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_29}, doi = {10.1007/978-3-642-31494-0\_29}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vdat/SakareSG12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SaravananCCSK12, author = {P. Saravanan and P. Chandrasekar and Livya Chandran and Nikilla Sriram and P. Kalpana}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {364--366}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_45}, doi = {10.1007/978-3-642-31494-0\_45}, timestamp = {Mon, 09 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SaravananCCSK12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SaunCA12, author = {Vikram Singh Saun and Suman Chatterjee and Anand Arunachalam}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Integrated Placement and Optimization Flow for Structured and Regular Logic}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {352--353}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_41}, doi = {10.1007/978-3-642-31494-0\_41}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SaunCA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SenDSS12, author = {Bibhash Sen and Manojit Dutta and Divyam Saran and Biplab K. Sikdar}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {An Efficient Multiplexer in Quantum-dot Cellular Automata}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {350--351}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_40}, doi = {10.1007/978-3-642-31494-0\_40}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SenDSS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/ShayanSSF12, author = {Mohammed Shayan and Virendra Singh and Adit D. Singh and Masahiro Fujita}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {{SEU} Tolerant Robust Latch Design}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {223--232}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_26}, doi = {10.1007/978-3-642-31494-0\_26}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ShayanSSF12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/ShresthaP12, author = {Rahul Shrestha and Roy P. Paily}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Design and Implementation of a Linear Feedback Shift Register Interleaver for Turbo Decoding}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {30--39}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_4}, doi = {10.1007/978-3-642-31494-0\_4}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ShresthaP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/SruthiD12, author = {P. R. Sruthi and M. Nirmala Devi}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {A Modified Scheme for Simultaneous Reduction of Test Data Volume and Testing Power}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {198--208}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_23}, doi = {10.1007/978-3-642-31494-0\_23}, timestamp = {Wed, 28 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/SruthiD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vdat/TuduMS12, author = {Jaynarayan T. Tudu and Deepak Malani and Virendra Singh}, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {{ILP} Based Approach for Input Vector Controlled {(IVC)} Toggle Maximization in Combinational Circuits}, booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, pages = {172--179}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0\_20}, doi = {10.1007/978-3-642-31494-0\_20}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/TuduMS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/vdat/2012, editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay}, title = {Progress in {VLSI} Design and Test - 16th International Symposium, {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {7373}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-3-642-31494-0}, doi = {10.1007/978-3-642-31494-0}, isbn = {978-3-642-31493-3}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vdat/2012.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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