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@inproceedings{DBLP:conf/vlsic/0002YSBS16,
author = {Yiqun Zhang and
Kaiyuan Yang and
Mehdi Saligane and
David T. Blaauw and
Dennis Sylvester},
title = {A compact 446 Gbps/W {AES} accelerator for mobile SoC and IoT in 40nm},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573553},
doi = {10.1109/VLSIC.2016.7573553},
timestamp = {Tue, 02 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/0002YSBS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AgarwalHAMCKSK16,
author = {Amit Agarwal and
Steven Hsu and
Mark A. Anders and
Sanu Mathew and
Gregory K. Chen and
Himanshu Kaul and
Sudhir Satpathy and
Ram Krishnamurthy},
title = {A 350mV-900mV 2.1GHz 0.011mm\({}^{\mbox{2}}\) regular expression matching
accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate
{CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573514},
doi = {10.1109/VLSIC.2016.7573514},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/AgarwalHAMCKSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AliDBPMZYDGLMMB16,
author = {Ahmed M. A. Ali and
H{\"{u}}seyin Dinc and
Paritosh Bhoraskar and
Scott Puckett and
Andy Morgan and
Ning Zhu and
Qicheng Yu and
Christopher Dillon and
Bryce Gray and
Jonathan Lanford and
Matthew McShea and
Ushma Mehta and
Scott Bardsley and
Peter R. Derounian and
Ryan Bunch and
Ralph Moore and
Gerry Taylor},
title = {A 14-bit 2.5GS/s and 5GS/s {RF} sampling {ADC} with background calibration
and dither},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573537},
doi = {10.1109/VLSIC.2016.7573537},
timestamp = {Wed, 10 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AliDBPMZYDGLMMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BhavnagarwalaIN16,
author = {Azeez Bhavnagarwala and
Imran Iqbal and
An Nguyen and
David Ondricek and
Vikas Chandra and
Robert C. Aitken},
title = {A 400mV active VMIN, 200mV retention VMIN, 2.8 GHz 64Kb {SRAM} with
a 0.09 um\({}^{\mbox{2}}\) 6T bitcell in a 16nm FinFET {CMOS} process},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573513},
doi = {10.1109/VLSIC.2016.7573513},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BhavnagarwalaIN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BlagojevicCKFVN16,
author = {Milovan Blagojevic and
Martin Cochet and
Ben Keller and
Philippe Flatresse and
Andrei Vladimirescu and
Borivoje Nikolic},
title = {A fast, flexible, positive and negative adaptive body-bias generator
in 28nm {FDSOI}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573479},
doi = {10.1109/VLSIC.2016.7573479},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/BlagojevicCKFVN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BlutmanKMMESWFG16,
author = {Kristof Blutman and
Ajay Kapoor and
Arjun Majumdar and
Jacinto Garcia Martinez and
Juan Diego Echeverri and
Leo Sevat and
Arnoud P. van der Wel and
Hamed Fatemi and
Jos{\'{e}} Pineda de Gyvez and
Kofi A. A. Makinwa},
title = {A microcontroller with 96{\%} power-conversion efficiency using stacked
voltage domains},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573478},
doi = {10.1109/VLSIC.2016.7573478},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BlutmanKMMESWFG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BoeschZM16,
author = {Ryan Boesch and
Kevin Zheng and
Boris Murmann},
title = {A 0.003 mm\({}^{\mbox{2}}\) 5.2 mW/tap 20 GBd inductor-less 5-tap
analog {RX-FFE}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573522},
doi = {10.1109/VLSIC.2016.7573522},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/BoeschZM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BohnenstiehlSPA16,
author = {Brent Bohnenstiehl and
Aaron Stillmaker and
Jon J. Pimentel and
Timothy Andreas and
Bin Liu and
Anh Tran and
Emmanuel Adeagbo and
Bevan M. Baas},
title = {A 5.8 pJ/Op 115 billion ops/sec, to 1.78 trillion ops/sec 32nm 1000-processor
array},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573511},
doi = {10.1109/VLSIC.2016.7573511},
timestamp = {Wed, 10 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BohnenstiehlSPA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/BuhlerMLFF16,
author = {Fred N. Buhler and
Adam E. Mendrela and
Yong Lim and
Jeffrey A. Fredenburg and
Michael P. Flynn},
title = {A 16-channel noise-shaping machine learning analog-digital interface},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573509},
doi = {10.1109/VLSIC.2016.7573509},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/BuhlerMLFF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenCBRSNCPPVBV16,
author = {Chao Chen and
Zhao Chen and
Deep Bera and
Shreyas B. Raghunathan and
Maysam Shabanimotlagh and
Emile Noothout and
Zu{-}yao Chang and
Jacco Ponte and
Christian Prins and
Hendrik J. Vos and
Johan G. Bosch and
Martin D. Verweij and
Nico de Jong and
Michiel A. P. Pertijs},
title = {A front-end {ASIC} with receive sub-array beamforming integrated with
a 32 {\texttimes} 32 {PZT} matrix transducer for 3-D transesophageal
echocardiography},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573470},
doi = {10.1109/VLSIC.2016.7573470},
timestamp = {Fri, 13 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenCBRSNCPPVBV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenKDBZ16,
author = {Zhanping Chen and
Sarvesh H. Kulkarni and
Vincent E. Dorgan and
Uddalak Bhattacharya and
Kevin Zhang},
title = {A 0.9um\({}^{\mbox{2}}\) 1T1R bit cell in 14nm SoC process for metal-fuse
{OTP} array with hierarchical bitline, bit level redundancy, and power
gating},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573506},
doi = {10.1109/VLSIC.2016.7573506},
timestamp = {Fri, 26 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenKDBZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenLKHWC16,
author = {Zuow{-}Zun Chen and
Yilei Li and
Yen{-}Cheng Kuan and
Boyu Hu and
Chien{-}Heng Wong and
Mau{-}Chung Frank Chang},
title = {Digital {PLL} for phase noise cancellation in ring oscillator-based
{I/Q} receivers},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573500},
doi = {10.1109/VLSIC.2016.7573500},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenLKHWC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenLWCLLC16,
author = {Yen{-}Huei Chen and
Kao{-}Cheng Lin and
Ching{-}Wei Wu and
Wei{-}Min Chan and
Jhon{-}Jhy Liaw and
Hung{-}Jen Liao and
Jonathan Chang},
title = {A 16nm dual-port {SRAM} with partial suppressed word-line, dummy read
recovery and negative bit-line circuitries for low {VMIN} applications},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573459},
doi = {10.1109/VLSIC.2016.7573459},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChenLWCLLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChoTKTKD16,
author = {Minki Cho and
Carlos Tokunaga and
Stephen T. Kim and
James W. Tschanz and
Muhammad M. Khellah and
Vivek De},
title = {Adaptive clocking with dynamic power gating for mitigating energy
efficiency {\&} performance impacts of fast voltage droop in a
22nm graphics execution core},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573529},
doi = {10.1109/VLSIC.2016.7573529},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChoTKTKD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChoiLBLK16,
author = {Yunju Choi and
Yoontaek Lee and
Seung{-}Heon Baek and
Sung{-}Joon Lee and
Jaeha Kim},
title = {A field-programmable mixed-signal {IC} with time-domain configurable
analog blocks},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573510},
doi = {10.1109/VLSIC.2016.7573510},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ChoiLBLK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DongYBS16,
author = {Qing Dong and
Kaiyuan Yang and
David T. Blaauw and
Dennis Sylvester},
title = {A 114-pW PMOS-only, trim-free voltage reference with 0.26{\%} within-wafer
inaccuracy for nW systems},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573494},
doi = {10.1109/VLSIC.2016.7573494},
timestamp = {Tue, 02 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/DongYBS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DorranceM16,
author = {Richard Dorrance and
Dejan Markovic},
title = {A 190GFLOPS/W {DSP} for energy-efficient sparse-BLAS in embedded IoT},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573527},
doi = {10.1109/VLSIC.2016.7573527},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/DorranceM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DuCLWDHKCLC16,
author = {Yuan Du and
Wei{-}Han Cho and
Yilei Li and
Chien{-}Heng Wong and
Jieqiong Du and
Po{-}Tsang Huang and
Yanghyo Kim and
Zuow{-}Zun Chen and
Sheau Jiung Lee and
Mau{-}Chung Frank Chang},
title = {A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded
clock to enable {PAM-16} / 256-QAM and channel response detection
in 28 nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573523},
doi = {10.1109/VLSIC.2016.7573523},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/DuCLWDHKCLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/EberleinY16,
author = {Matthias Eberlein and
Idan Yahav},
title = {A 28nm {CMOS} ultra-compact thermal sensor in current-mode technique},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573532},
doi = {10.1109/VLSIC.2016.7573532},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/EberleinY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/FransEHIKPSUZAB16,
author = {Yohan Frans and
Mohamed Elzeftawi and
Hiva Hedayati and
Jay Im and
Vassili Kireev and
Toan Pham and
Jaewook Shin and
Parag Upadhyaya and
Lei Zhou and
Santiago Asuncion and
Chris Borrelli and
Geoff Zhang and
Hongtao Zhang and
Ken Chang},
title = {A 56Gb/s {PAM4} wireline transceiver using a 32-way time-interleaved
{SAR} {ADC} in 16nm FinFET},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573474},
doi = {10.1109/VLSIC.2016.7573474},
timestamp = {Thu, 30 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/FransEHIKPSUZAB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/GealowM16,
author = {Jeffrey C. Gealow and
Masato Motomura},
title = {Foreword},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573455},
doi = {10.1109/VLSIC.2016.7573455},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/GealowM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/GillV16,
author = {Patrick R. Gill and
Thomas Vogelsang},
title = {Lensless Smart Sensors: Optical and thermal sensing for the Internet
of Things},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573486},
doi = {10.1109/VLSIC.2016.7573486},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/GillV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HongWGGY16,
author = {Yan Hong and
Yong Wang and
Wang Ling Goh and
Yuan Gao and
Lei Yao},
title = {A 9.84-73.2 nJ, 0.048 mm\({}^{\mbox{2}}\) time-domain impedance sensor
that provides values of resistance and capacitance},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573534},
doi = {10.1109/VLSIC.2016.7573534},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/HongWGGY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HossainAMH16,
author = {A. K. M. Delwar Hossain and
Aurangozeb and
Maruf Mohammad and
Masum Hossain},
title = {A 35 mW 10 Gb/s {ADC-DSP} less direct digital sequence detector and
equalizer in 65nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573520},
doi = {10.1109/VLSIC.2016.7573520},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HossainAMH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HsiehH16,
author = {Sung{-}En Hsieh and
Chih{-}Cheng Hsieh},
title = {A 0.44fJ/conversion-step 11b 600KS/s {SAR} {ADC} with semi-resting
{DAC}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573519},
doi = {10.1109/VLSIC.2016.7573519},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HsiehH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HuangKI16,
author = {Cheng Huang and
Toru Kawajiri and
Hiroki Ishikuro},
title = {A wireless power transfer system with enhanced response and efficiency
by fully-integrated fast-tracking wireless constant-idle-time control
for implants},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573491},
doi = {10.1109/VLSIC.2016.7573491},
timestamp = {Mon, 26 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/HuangKI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HwangCYLKCKGJSC16,
author = {Gunpil Hwang and
JongKwan Choi and
Jaehyeok Yang and
Sungmin Lim and
Jae{-}Myoung Kim and
MinGyu Choi and
Dae{-}Shik Kim and
Kiuk Gwak and
Jinwoo Jeon and
Hee Sup Shin and
Il{-}Hwan Choi and
Sol Park and
Hyeon{-}Min Bae},
title = {A 2.048 Mb/s full-duplex free-space optical transceiver {IC} for a
real-time in vivo neurofeedback mouse experiment under social interaction},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573560},
doi = {10.1109/VLSIC.2016.7573560},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HwangCYLKCKGJSC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HwangMSK16,
author = {Sewook Hwang and
Sungjun Moon and
Junyoung Song and
Chulwoo Kim},
title = {A 32 Gb/s Rx only equalization transceiver with 1-tap speculative
{FIR} and 2-tap direct {IIR} {DFE}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573473},
doi = {10.1109/VLSIC.2016.7573473},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HwangMSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/IkedaIKIONKJHRD16,
author = {Sho Ikeda and
Hiroyuki Ito and
Akifumi Kasamatsu and
Yosuke Ishikawa and
Takayoshi Obara and
Naoki Noguchi and
Koji Kamisuki and
Yao Jiyang and
Shinsuke Hara and
Ruibing Dong and
Shiro Dosho and
Noboru Ishihara and
Kazuya Masu},
title = {An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based
cascaded fractional-N {PLL} with sub-ppb-order channel adjusting technique},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573548},
doi = {10.1109/VLSIC.2016.7573548},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/IkedaIKIONKJHRD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JainP16,
author = {Ankesh Jain and
Shanthi Pavan},
title = {A 13.3 mW 60 MHz bandwidth, 76 dB {DR} 6 GS/s CT{\(\Delta\)}{\(\Sigma\)}M
with time interleaved {FIR} feedback},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573466},
doi = {10.1109/VLSIC.2016.7573466},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JainP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JhaAKCLYMO16,
author = {Amit Jha and
Ali Ahmadi and
Sandeep Kshattry and
T. Cao and
K. Liao and
Geoffrey Yeap and
Yiorgos Makris and
Kenneth K. O},
title = {-197dBc/Hz {FOM} 4.3-GHz {VCO} Using an addressable array of minimum-sized
nmos cross-coupled transistor pairs in 65-nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573540},
doi = {10.1109/VLSIC.2016.7573540},
timestamp = {Thu, 07 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JhaAKCLYMO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JiPLH16,
author = {Suyao Ji and
Jing Pu and
ByongChan Lim and
Mark Horowitz},
title = {A 220pJ/pixel/frame {CMOS} image sensor with partial settling readout
architecture},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573545},
doi = {10.1109/VLSIC.2016.7573545},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JiPLH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/JiangCKWS16,
author = {Zhewei Jiang and
Joao Pedro Cerqueira and
Seongjong Kim and
Qi Wang and
Mingoo Seok},
title = {1.74-{\(\mathrm{\mu}\)}W/ch, 95.3{\%}-accurate spike-sorting hardware
based on Bayesian decision},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573468},
doi = {10.1109/VLSIC.2016.7573468},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/JiangCKWS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimCS16,
author = {Seongjong Kim and
Joao Pedro Cerqueira and
Mingoo Seok},
title = {A 450mV timing-margin-free waveform sorter based on body swapping
error correction},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573561},
doi = {10.1109/VLSIC.2016.7573561},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimCS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimPAHKWMC16,
author = {Chul Kim and
Jiwoong Park and
Abraham Akinin and
Sohmyung Ha and
Rajkumar Kubendran and
Hui Wang and
Patrick P. Mercier and
Gert Cauwenberghs},
title = {A fully integrated 144 MHz wireless-power-receiver-on-chip with an
adaptive buck-boost regulating rectifier and low-loss H-Tree signal
distribution},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573492},
doi = {10.1109/VLSIC.2016.7573492},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimPAHKWMC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimPKYHL16,
author = {Seong Joong Kim and
Chang Soon Park and
Youngkyu Kim and
Seok{-}Ju Yun and
Young{-}Jun Hong and
Sang{-}Gug Lee},
title = {A 2.4GHz ternary sequence spread spectrum {OOK} transceiver with harmonic
spur suppression and dual-mode detection architecture for {ULP} wearable
devices},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573483},
doi = {10.1109/VLSIC.2016.7573483},
timestamp = {Wed, 02 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KimPKYHL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KnagLZ16,
author = {Phil Knag and
Chester Liu and
Zhengya Zhang},
title = {A 1.40mm\({}^{\mbox{2}}\) 141mW 898GOPS sparse neuromorphic processor
in 40nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573526},
doi = {10.1109/VLSIC.2016.7573526},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/KnagLZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KobayashiTT16,
author = {Atsuro Kobayashi and
Tsukasa Tokutomi and
Ken Takeuchi},
title = {Versatile {TLC} {NAND} flash memory control to reduce read disturb
errors by 85{\%} and extend read cycles by 6.7-times of Read-Hot and
Cold data for cloud data centers},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573505},
doi = {10.1109/VLSIC.2016.7573505},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KobayashiTT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KongR16,
author = {Long Kong and
Behzad Razavi},
title = {A 2.4-GHz 6.4-mW fractional-N inductorless {RF} synthesizer},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573549},
doi = {10.1109/VLSIC.2016.7573549},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KongR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KuoFBCCJHHMTS16,
author = {Feng{-}Wei Kuo and
Sandro Binsfeld Ferreira and
Masoud Babaie and
Huan{-}Neng Ron Chen and
Lan{-}chou Cho and
Chewnpu Jou and
Fu{-}Lung Hsueh and
Guanzhong Huang and
Iman Madadi and
Massoud Tohidian and
Robert Bogdan Staszewski},
title = {A Bluetooth low-energy {(BLE)} transceiver with {TX/RX} switchable
on-chip matching network, 2.75mW high-IF discrete-time receiver, and
3.6mW all-digital transmitter},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573480},
doi = {10.1109/VLSIC.2016.7573480},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KuoFBCCJHHMTS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeSSWCKKKKJKH16,
author = {Sangheon Lee and
Jeonghwan Song and
Changhyuk Seong and
Jiyong Woo and
Jong{-}Moon Choi and
Soon{-}Chan Kwon and
Ho{-}Joon Kim and
Hyun{-}Suk Kang and
Soo Gil Kim and
Hoe Gwon Jung and
Kee{-}Won Kwon and
Hyunsang Hwang},
title = {Full chip integration of 3-d cross-point ReRAM with leakage-compensating
write driver and disturbance-aware sense amplifier},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573503},
doi = {10.1109/VLSIC.2016.7573503},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeSSWCKKKKJKH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LeeYKC16,
author = {Yongsun Lee and
Heein Yoon and
Mina Kim and
Jaehyouk Choi},
title = {A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked
clock multiplier using a voltage-domain period-calibrating loop},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573550},
doi = {10.1109/VLSIC.2016.7573550},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LeeYKC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiCCWL16,
author = {Alvin Li and
Yue Chao and
Xuan Chen and
Liang Wu and
Howard C. Luong},
title = {An inductor-less fractional-N injection-locked {PLL} with a spur-and-phase-noise
filtering technique},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573547},
doi = {10.1109/VLSIC.2016.7573547},
timestamp = {Fri, 15 Dec 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/LiCCWL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiTYLCHLLKHCXS16,
author = {Chao{-}Chieh Li and
Tsung{-}Hsien Tsai and
Min{-}Shueh Yuan and
Chia{-}Chun Liao and
Chih{-}Hsien Chang and
Tien{-}Chien Huang and
Hsien{-}Yuan Liao and
Chung{-}Ting Lu and
Hung{-}Yi Kuo and
Kenny Hsieh and
Mark Chen and
Augusto Ronchini Ximenes and
Robert Bogdan Staszewski},
title = {A 0.034mm\({}^{\mbox{2}}\), 725fs {RMS} jitter, 1.8{\%}/V frequency-pushing,
10.8-19.3GHz transformer-based fractional-N all-digital {PLL} in 10nm
FinFET {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573551},
doi = {10.1109/VLSIC.2016.7573551},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/LiTYLCHLLKHCXS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Lien16,
author = {Yuan{-}Ching Lien},
title = {A 14.6mW 12b 800MS/s 4{\texttimes}time-interleaved pipelined {SAR}
{ADC} achieving 60.8dB {SNDR} with Nyquist input and sampling timing
skew of 60fsrms without calibration},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573517},
doi = {10.1109/VLSIC.2016.7573517},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Lien16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LimJLKSB16,
author = {Wootaek Lim and
Tae{-}Kwang Jang and
Inhee Lee and
Hun{-}Seok Kim and
Dennis Sylvester and
David T. Blaauw},
title = {A 380pW dual mode optical wake-up receiver with ambient noise cancellation},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573481},
doi = {10.1109/VLSIC.2016.7573481},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/LimJLKSB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LinTTL16,
author = {Ying{-}Zu Lin and
Chih{-}Hou Tsai and
Shan{-}Chih Tsou and
Chao{-}Hsin Lu},
title = {A 8.2-mW 10-b 1.6-GS/s 4{\texttimes} {TI} {SAR} {ADC} with fast reference
charge neutralization and background timing-skew calibration in 16-nm
{CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573536},
doi = {10.1109/VLSIC.2016.7573536},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LinTTL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiuHM16,
author = {Xun Liu and
Cheng Huang and
Philip K. T. Mok},
title = {A 50MHz 5V 3W 90{\%} efficiency 3-level buck converter with real-time
calibration and wide output range for fast-DVS in 65nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573475},
doi = {10.1109/VLSIC.2016.7573475},
timestamp = {Mon, 26 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/LiuHM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/MathewSSAKAHCKD16,
author = {Sanu Mathew and
Sudhir Satpathy and
Vikram B. Suresh and
Mark A. Anders and
Himanshu Kaul and
Amit Agarwal and
Steven Hsu and
Gregory K. Chen and
Ram Krishnamurthy and
Vivek De},
title = {A 4fJ/bit delay-hardened physically unclonable function circuit with
selective bit destabilization in 14nm tri-gate {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573554},
doi = {10.1109/VLSIC.2016.7573554},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/MathewSSAKAHCKD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/MeisterICSBMPSS16,
author = {Tilo Meister and
Koichi Ishida and
Corrado Carta and
Reza Shabanpour and
Bahman Kheradmand Boroujeni and
Niko M{\"{u}}nzenrieder and
Luisa Petti and
Giovanni A. Salvatore and
G. Schmidt and
Pol Ghesqui{\`{e}}re and
Stefan Kiefl and
G. De Toma and
T. Faetti and
Arved C. H{\"{u}}bler and
Gerhard Tr{\"{o}}ster and
Frank Ellinger},
title = {3.5mW 1MHz {AM} detector and digitally-controlled tuner in a-IGZO
{TFT} for wireless communications in a fully integrated flexible system
for audio bag},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573508},
doi = {10.1109/VLSIC.2016.7573508},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/MeisterICSBMPSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/MiyaokaTKKMSKSD16,
author = {Hiroki Miyaoka and
Futoshi Terasawa and
Masahiro Kudo and
Hideki Kano and
Atsushi Matsuda and
Noriaki Shirai and
Shigeaki Kawai and
Takayuki Shibasaki and
Takumi Danjo and
Yuuki Ogata and
Yasufumi Sakai and
Hisakatsu Yamaguchi and
Toshihiko Mori and
Yoichi Koyanagi and
Hirotaka Tamura and
Yutaka Ide and
Kazuhiro Terashima and
Hirohito Higashi and
Tomokazu Higuchi and
Naoaki Naka},
title = {A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling
phase adaptation in 28 nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573472},
doi = {10.1109/VLSIC.2016.7573472},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/MiyaokaTKKMSKSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/MoonsV16,
author = {Bert Moons and
Marian Verhelst},
title = {A 0.3-2.6 {TOPS/W} precision-scalable processor for real-time large-scale
ConvNets},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573525},
doi = {10.1109/VLSIC.2016.7573525},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/MoonsV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Moscatelli16,
author = {Alessandro Moscatelli},
title = {Innovative system on chip platform for Smart Grids and internet of
energy applications},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573498},
doi = {10.1109/VLSIC.2016.7573498},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Moscatelli16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/NamHZC16,
author = {Jae{-}Won Nam and
Mohsen Hassanpourghadi and
Aoyang Zhang and
Mike Shuo{-}Wei Chen},
title = {A 12-bit 1.6 GS/s interleaved {SAR} {ADC} with dual reference shifting
and interpolation achieving 17.8 fJ/conv-step in 65nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573516},
doi = {10.1109/VLSIC.2016.7573516},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/NamHZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/NomotoOW16,
author = {Tetsuo Nomoto and
Yusuke Oike and
Hayato Wakabayashi},
title = {Accelerating the Sensing world through imaging evolution},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--4},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573458},
doi = {10.1109/VLSIC.2016.7573458},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/NomotoOW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ObataMMTS16,
author = {Koji Obata and
Kazuo Matsukawa and
Takuji Miki and
Yusuke Tsukamoto and
Koji Sushihara},
title = {A 97.99 dB SNDR, 2 kHz BW, 37.1 {\(\mathrm{\mu}\)}W noise-shaping
{SAR} {ADC} with dynamic element matching and modulation dither effect},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573463},
doi = {10.1109/VLSIC.2016.7573463},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ObataMMTS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OgasawaraSFS16,
author = {Yosuke Ogasawara and
Hiroki Sakurai and
Ryuichi Fujimoto and
Kenichi Sami},
title = {An 18 {\(\mathrm{\mu}\)}W spur canceled clock generator for recovering
receiver sensitivity in wireless SoCs},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573484},
doi = {10.1109/VLSIC.2016.7573484},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OgasawaraSFS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OhBBJBKS16,
author = {Sechang Oh and
Ngoc Le Ba and
Suyoung Bang and
Junwon Jeong and
David T. Blaauw and
Tony T. Kim and
Dennis Sylvester},
title = {A 260{\(\mathrm{\mu}\)}W infrared gesture recognition system-on-chip
for smart devices},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573546},
doi = {10.1109/VLSIC.2016.7573546},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OhBBJBKS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OikeAHNKSKNSSKN16,
author = {Yusuke Oike and
Kentaro Akiyama and
Luong D. Hung and
Wataru Niitsuma and
Akihiko Kato and
Mamoru Sato and
Yuri Kato and
Wataru Nakamura and
Hiroshi Shiroshita and
Yorito Sakano and
Yoshiaki Kitano and
Takuya Nakamura and
Takayuki Toyama and
Hayato Iwamoto and
Takayuki Ezaki},
title = {An 8.3M-pixel 480fps global-shutter {CMOS} image sensor with gain-adaptive
column ADCs and 2-on-1 stacked device structure},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573543},
doi = {10.1109/VLSIC.2016.7573543},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OikeAHNKSKNSSKN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OmranAAS16,
author = {Hesham Omran and
Abdulaziz Alhoshany and
Hamzah Alahmadi and
Khaled N. Salama},
title = {A 35fJ/Step differential successive approximation capacitive sensor
readout circuit with quasi-dynamic operation},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573533},
doi = {10.1109/VLSIC.2016.7573533},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/OmranAAS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/OnukiUTIAOKYLWS16,
author = {Tatsuya Onuki and
Wataru Uesugi and
Hikaru Tamura and
Atsuo Isobe and
Yoshinori Ando and
Satoru Okamoto and
Kiyoshi Kato and
Tri Rung Yew and
Chen Bin Lin and
J. Y. Wu and
Chi Chang Shuai and
Shao Hui Wu and
James Myers and
Klaus Doppler and
Masahiro Fujita and
Shunpei Yamazaki},
title = {Embedded memory and {ARM} Cortex-M0 core using 60-nm C-axis aligned
crystalline indium-gallium-zinc oxide {FET} integrated with 65-nm
Si {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573504},
doi = {10.1109/VLSIC.2016.7573504},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/OnukiUTIAOKYLWS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ParkCSZSCSW16,
author = {Jong Seok Park and
Taiyun Chi and
Amy Su and
Chengjie Zhu and
Jung Hoon Sung and
Hee Cheol Cho and
Mark P. Styczynski and
Hua Wang},
title = {A high-density {CMOS} multi-modality joint sensor/stimulator array
with 1024 pixels for holistic real-time cellular characterization},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573469},
doi = {10.1109/VLSIC.2016.7573469},
timestamp = {Wed, 28 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ParkCSZSCSW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/PaulHKMAGSMJVTD16,
author = {Somnath Paul and
Vinayak Honkote and
Ryan Gary Kim and
Turbo Majumder and
Paolo A. Aseron and
Vaughn Grossnickle and
Robert Sankman and
Debendra Mallik and
Sandeep Jain and
Sriram R. Vangal and
James W. Tschanz and
Vivek De},
title = {An energy harvesting wireless sensor node for IoT systems featuring
a near-threshold voltage {IA-32} microcontroller in 14nm tri-gate
{CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573485},
doi = {10.1109/VLSIC.2016.7573485},
timestamp = {Wed, 15 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/PaulHKMAGSMJVTD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RaghavanVRPYHCK16,
author = {Bharath Raghavan and
Aida Varzaghani and
Lakshmi P. Rao and
Henry Park and
Xiaochen Yang and
Zhi Huang and
Yu Chen and
Rama Kattamuri and
Chunhui Wu and
Bo Zhang and
Jun Cao and
Afshin Momtaz and
Namik Kocaman},
title = {A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit
ADC/5-tap {DFE} receiver and a 4-tap {FFE} transmitter in 28 nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573521},
doi = {10.1109/VLSIC.2016.7573521},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/RaghavanVRPYHCK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RajUFC16,
author = {Mayank Raj and
Parag Upadhyaya and
Yohan Frans and
Ken Chang},
title = {A 7-to-18.3GHz compact transformer based {VCO} in 16nm FinFET},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573539},
doi = {10.1109/VLSIC.2016.7573539},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RajUFC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RamakrishnanCPA16,
author = {Sameet Ramakrishnan and
Lucas Calderin and
Antonio Puglielli and
Elad Alon and
Ali M. Niknejad and
Borivoje Nikolic},
title = {A 65nm {CMOS} transceiver with integrated active cancellation supporting
{FDD} from 1GHz to 1.8GHz at +12.6dBm {TX} power leakage},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573499},
doi = {10.1109/VLSIC.2016.7573499},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/RamakrishnanCPA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RanicaPHWNCGNMI16,
author = {Rossella Ranica and
Nicolas Planes and
Vincent Huard and
Olivier Weber and
Daniel Noblet and
Damien Croain and
Fabien Giner and
Sylvie Naudet and
P. Mergault and
S. Ibars and
A. Villaret and
Maryline Parra and
S{\'{e}}bastien Haendler and
M. Quoirin and
Florian Cacho and
C. Julien and
F. Terrier and
Lorenzo Ciampolini and
David Turgis and
Christophe Lecocq and
Franck Arnaud},
title = {28nm {FDSOI} technology sub-0.6V {SRAM} Vmin assessment for ultra
low voltage applications},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573512},
doi = {10.1109/VLSIC.2016.7573512},
timestamp = {Thu, 29 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RanicaPHWNCGNMI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/RavinuthulaBWMK16,
author = {Vishnu Ravinuthula and
William Bright and
Mark Weaver and
Kenneth Maclean and
Scott Kaylor and
Sidharth Balasubramanian and
Jesse Coulon and
Robert Keller and
Bao Nguyen and
Ebenezer Dwobeng},
title = {A 14-bit 8.9GS/s {RF} {DAC} in 40nm {CMOS} achieving {\textgreater}71dBc
{LTE} {ACPR} at 2.9GHz},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573538},
doi = {10.1109/VLSIC.2016.7573538},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/RavinuthulaBWMK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SaeediE16,
author = {Saman Saeedi and
Azita Emami},
title = {A 10Gb/s, 342fJ/bit micro-ring modulator transmitter with switched-capacitor
pre-emphasis and monolithic temperature sensor in 65nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573541},
doi = {10.1109/VLSIC.2016.7573541},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SaeediE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SanyalS16,
author = {Arindam Sanyal and
Nan Sun},
title = {A 18.5-fJ/step VCO-based 0-1 {MASH} {\(\Delta\)}{\(\Sigma\)} {ADC}
with digital background calibration},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573465},
doi = {10.1109/VLSIC.2016.7573465},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/SanyalS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SatpathyMSAKAHC16,
author = {Sudhir Satpathy and
Sanu Mathew and
Vikram B. Suresh and
Mark A. Anders and
Himanshu Kaul and
Amit Agarwal and
Steven Hsu and
Gregory K. Chen and
Ram Krishnamurthy},
title = {250mV-950mV 1.1Tbps/W double-affine mapped Sbox based composite-field
{SMS4} encrypt/decrypt accelerator in 14nm tri-gate {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573552},
doi = {10.1109/VLSIC.2016.7573552},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SatpathyMSAKAHC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShalmanyDM16,
author = {Saleh Heidary Shalmany and
Dieter Draxelmayr and
Kofi A. A. Makinwa},
title = {A {\(\pm\)} 36A integrated current-sensing system with 0.3{\%} gain
error and 400{\(\mathrm{\mu}\)}A offset from -55{\textdegree}C to
+85{\textdegree}C},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573493},
doi = {10.1109/VLSIC.2016.7573493},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShalmanyDM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SharmaLPNLSR16,
author = {Ajit Sharma and
Seung Bae Lee and
Arup Polley and
Sriram Narayanan and
Wen Li and
Terry Sculley and
Srinath Ramaswamy},
title = {Multi-modal smart bio-sensing SoC platform with {\textgreater}80dB
{SNR} 35{\(\mathrm{\mu}\)}A {PPG} {RX} chain},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573488},
doi = {10.1109/VLSIC.2016.7573488},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/SharmaLPNLSR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShimJMBKSBJ16,
author = {Minseob Shim and
Seokhyeon Jeong and
Paul D. Myers and
Suyoung Bang and
Chulwoo Kim and
Dennis Sylvester and
David T. Blaauw and
Wanyeong Jung},
title = {An oscillator collapse-based comparator with application in a 74.1dB
SNDR, 20KS/s 15b {SAR} {ADC}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573518},
doi = {10.1109/VLSIC.2016.7573518},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShimJMBKSBJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShimizuTMSYTMBW16,
author = {Takashi Shimizu and
Yasumoto Tomita and
Hidetoshi Matsumura and
Masahiko Sugimura and
Hironobu Yamasaki and
David Thach and
Takashi Miyoshi and
Takayuki Baba and
Yasuhiro Watanabe and
Atsushi Ike},
title = {An FPGA-accelerated partial image matching engine for massive media
data searching systems},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573489},
doi = {10.1109/VLSIC.2016.7573489},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShimizuTMSYTMBW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShinJKPHSPBBCJC16,
author = {Se{-}un Shin and
Min{-}Yong Jung and
Kiduk Kim and
Sang{-}Hui Park and
Yeunhee Huh and
Changsik Shin and
Se{-}Hong Park and
Jun{-}Suk Bang and
Jong{-}Beom Baek and
Sung{-}Won Choi and
Yong{-}Min Ju and
Gyu{-}Hyeong Cho},
title = {A reconfigurable {SIMO} system with 10-output dual-bus {DC-DC} converter
using the load balancing function in group allocator for diversified
load condition},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573477},
doi = {10.1109/VLSIC.2016.7573477},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShinJKPHSPBBCJC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ShoaranSFASSBLE16,
author = {Mahsa Shoaran and
Masoud Shahshahani and
Masoud Farivar and
Joyel Almajano and
Amirhossein Shahshahani and
Alexandre Schmid and
Anatol Bragin and
Yusuf Leblebici and
Azita Emami},
title = {A 16-channel 1.1mm\({}^{\mbox{2}}\) implantable seizure control SoC
with sub-{\(\mu\)}W/channel consumption and closed-loop stimulation
in 0.18{\(\mathrm{\mu}\)}m {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573557},
doi = {10.1109/VLSIC.2016.7573557},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShoaranSFASSBLE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SongXYRFBZWNBNB16,
author = {Seung Chul Song and
J. Xu and
D. Yang and
K. Rim and
P. Feng and
Jerry Bao and
J. Zhu and
Joseph Wang and
G. Nallapati and
Mustafa Badaroglu and
P. Narayanasetti and
B. Bucki and
Jeff Fischer and
Geoffrey Yeap},
title = {Unified Technology Optimization Platform using Integrated Analysis
{(UTOPIA)} for holistic technology, design and system co-optimization
at {\textless}= 7nm nodes},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573515},
doi = {10.1109/VLSIC.2016.7573515},
timestamp = {Fri, 01 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/SongXYRFBZWNBNB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/StreelSGDFB16,
author = {Guerric de Streel and
Fran{\c{c}}ois Stas and
Thibaut Gurne and
Fran{\c{c}}ois Durant and
Charlotte Frenkel and
David Bol},
title = {SleepTalker: {A} 28nm {FDSOI} {ULV} 802.15.4a {IR-UWB} transmitter
SoC achieving 14pJ/bit at 27Mb/s with adaptive-FBB-based channel selection
and programmable pulse shape},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573482},
doi = {10.1109/VLSIC.2016.7573482},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/StreelSGDFB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SugoWKYSWCHS16,
author = {Hidetake Sugo and
Shunichi Wakashima and
Rihito Kuroda and
Yuichiro Yamashita and
Hirofumi Sumi and
Tzu{-}Jui Wang and
Po{-}Sheng Chou and
Ming{-}Chieh Hsu and
Shigetoshi Sugawa},
title = {A dead-time free global shutter {CMOS} image sensor with in-pixel
{LOFIC} and {ADC} using pixel-wis e connections},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573544},
doi = {10.1109/VLSIC.2016.7573544},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/SugoWKYSWCHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/SuleimanZS16,
author = {Amr Suleiman and
Zhengdong Zhang and
Vivienne Sze},
title = {A 58.6mW real-time programmable object detector with multi-scale multi-object
support using deformable parts model on 1920{\texttimes}1080 video
at 30fps},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573528},
doi = {10.1109/VLSIC.2016.7573528},
timestamp = {Wed, 11 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/SuleimanZS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TakemotoMYLAAKI16,
author = {Takashi Takemoto and
Yasunobu Matsuoka and
Hiroki Yamashita and
Yong Lee and
Kenichi Akita and
Hideo Arimoto and
Masaru Kokubo and
Tatemi Ido},
title = {A 50.6-Gb/s 7.8-mW/Gb/s -7.4-dBm sensitivity optical receiver based
on 0.18-{\(\mathrm{\mu}\)}m SiGe BiCMOS technology},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573542},
doi = {10.1109/VLSIC.2016.7573542},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/TakemotoMYLAAKI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TangCZ16,
author = {Wei Tang and
Chia{-}Hsiang Chen and
Zhengya Zhang},
title = {A 0.58mm\({}^{\mbox{2}}\) 2.76Gb/s 79.8pJ/b 256-QAM massive {MIMO}
message-passing detector},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573555},
doi = {10.1109/VLSIC.2016.7573555},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/TangCZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Temam16,
author = {Olivier Temam},
title = {Enabling future progress in machine-learning},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--3},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573457},
doi = {10.1109/VLSIC.2016.7573457},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Temam16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TerasawaSOO16,
author = {Yasuo Terasawa and
Kenzo Shodo and
Koji Osawa and
Jun Ohta},
title = {Features of retinal prosthesis using suprachoroidal transretinal stimulation
from an electrical circuit perspective},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573487},
doi = {10.1109/VLSIC.2016.7573487},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/TerasawaSOO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/Tessarolo16,
author = {Alexander Tessarolo},
title = {Motor Control used to be boring},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573495},
doi = {10.1109/VLSIC.2016.7573495},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/Tessarolo16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TsujiBMMNSTBOIH16,
author = {Yukihide Tsuji and
Xu Bai and
Ayuka Morioka and
Makoto Miyamura and
Ryusuke Nebashi and
Toshitsugu Sakamoto and
Munehiro Tada and
Naoki Banno and
Koichiro Okamoto and
Noriyuki Iguchi and
Hiromitsu Hada and
Tadahiko Sugibayashi},
title = {A 2{\texttimes} logic density Programmable Logic array using atom
switch fully implemented with logic transistors at 40nm-node and beyond},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573461},
doi = {10.1109/VLSIC.2016.7573461},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/TsujiBMMNSTBOIH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/UjitaKUMKTIU16,
author = {Shinji Ujita and
Yusuke Kinoshita and
Hidekazu Umeda and
Tatsuo Morita and
Kazuhiro Kaibara and
Satoshi Tamura and
Masahiro Ishida and
Tetsuzo Ueda},
title = {A fully integrated GaN-based power {IC} including gate drivers for
high-efficiency {DC-DC} Converters},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573496},
doi = {10.1109/VLSIC.2016.7573496},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/UjitaKUMKTIU16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/UpadhyayaBMZICT16,
author = {Parag Upadhyaya and
Ade Bekele and
Didem Turkur Melek and
Haibing Zhao and
Jay Im and
Junho Cho and
Kee Hian Tan and
Scott McLeod and
Stanley Chen and
Wenfeng Zhang and
Yohan Frans and
Ken Chang},
title = {A fully-adaptive wideband 0.5-32.75Gb/s {FPGA} transceiver in 16nm
FinFET {CMOS} technology},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573471},
doi = {10.1109/VLSIC.2016.7573471},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/UpadhyayaBMZICT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ViraraghavanLJC16,
author = {Janakiraman Viraraghavan and
Derek Leu and
Balaji Jayaraman and
Alberto Cestero and
Robert Kilker and
Ming Yin and
John Golz and
Rajesh Reddy Tummuru and
Ramesh Raghavan and
Dan Moy and
Thejas Kempanna and
Faraz Khan and
Toshiaki Kirihata and
Subramanian S. Iyer},
title = {80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable
Memory scalable to 14nm {FIN} with no added process complexity},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573462},
doi = {10.1109/VLSIC.2016.7573462},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ViraraghavanLJC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/WuSJYLSB16,
author = {Xiao Wu and
Yao Shi and
Supreet Jeloka and
Kaiyuan Yang and
Inhee Lee and
Dennis Sylvester and
David T. Blaauw},
title = {A 66pW discontinuous switch-capacitor energy harvester for self-sustaining
sensor applications},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573490},
doi = {10.1109/VLSIC.2016.7573490},
timestamp = {Mon, 08 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/WuSJYLSB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/XiaoGXCCSPWCUHC16,
author = {Jianhong Xiao and
Weinan Gao and
Xiaojing Xu and
Dave S.{-}H. Chang and
Jiang Cao and
Runhua Sun and
Vijay Periasamy and
Ning{-}Yi Wang and
Xi Chen and
Greg Unruh and
Takayuki Hayashi and
Tai{-}Hong Chih and
Lakshminarasimhan Krishnan and
Kuo{-}Ken Huang and
Sunny Raj Dommaraju and
Guowen Wei and
Bo Shen and
Ardie G. Venes and
Dongsoo Koh and
James Y. C. Chang},
title = {A 180 mW multistandard {TV} tuner in 28 nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573502},
doi = {10.1109/VLSIC.2016.7573502},
timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/XiaoGXCCSPWCUHC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/XuK16,
author = {Yang Xu and
Peter R. Kinget},
title = {A chopping switched-capacitor {RF} receiver with integrated blocker
detection, +31dBm OB-IIP3, and +15dBm OB-B1dB},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573501},
doi = {10.1109/VLSIC.2016.7573501},
timestamp = {Fri, 30 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/XuK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/XuLVM16,
author = {Yang Xu and
Spencer Leuenberger and
Praveen Kumar Venkatachala and
Un{-}Ku Moon},
title = {A 0.6mW 31MHz 4\({}^{\mbox{th}}\)-order low-pass filter with +29dBm
{IIP3} using self-coupled source follower based biquads in 0.18{\(\mathrm{\mu}\)}m
{CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573507},
doi = {10.1109/VLSIC.2016.7573507},
timestamp = {Tue, 12 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/XuLVM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/XuZC16,
author = {Benwei Xu and
Yuan Zhou and
Yun Chiu},
title = {A 23mW 24GS/s 6b Time-interleaved hybrid two-step {ADC} in 28nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573535},
doi = {10.1109/VLSIC.2016.7573535},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/XuZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YabuuchiSSITTN16,
author = {Makoto Yabuuchi and
Yohei Sawada and
Toshiaki Sano and
Yuichiro Ishii and
Shinji Tanaka and
Miki Tanaka and
Koji Nii},
title = {A 6.05-Mb/mm\({}^{\mbox{2}}\) 16-nm FinFET double pumping 1W1R 2-port
{SRAM} with 313 ps read access time},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573460},
doi = {10.1109/VLSIC.2016.7573460},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YabuuchiSSITTN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YangLCWLLTC16,
author = {Wen{-}Hau Yang and
Chiun{-}He Lin and
Ke{-}Horng Chen and
Chin{-}Long Wey and
Ying{-}Hsi Lin and
Jian{-}Ru Lin and
Tsung{-}Yen Tsai and
Jui{-}Lung Chen},
title = {95{\%} light-load efficiency single-inductor dual-output {DC-DC} buck
converter with synthesized waveform control technique for {USB} type-C},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573476},
doi = {10.1109/VLSIC.2016.7573476},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YangLCWLLTC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YiBCLJCSCJKSP16,
author = {Il{-}Min Yi and
Seung{-}Jun Bae and
Min{-}Kyun Chae and
Soo{-}Min Lee and
Young Jae Jang and
Young{-}Chul Cho and
Young{-}Soo Sohn and
Jung{-}Hwan Choi and
Seong{-}Jin Jang and
Byungsub Kim and
Jae{-}Yoon Sim and
Hong{-}June Park},
title = {A low-EMI four-bit four-wire single-ended {DRAM} interface by using
a three-level balanced coding scheme},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573524},
doi = {10.1109/VLSIC.2016.7573524},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YiBCLJCSCJKSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YousefzadehSM16,
author = {Bahman Yousefzadeh and
Saleh Heidary Shalmany and
Kofi A. A. Makinwa},
title = {A BJT-based temperature-to-digital converter with {\(\pm\)}60mK (3{\(\sigma\)})
inaccuracy from -70{\textdegree}C to 125{\textdegree}C in 160nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573531},
doi = {10.1109/VLSIC.2016.7573531},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YousefzadehSM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YuanKJDBCSHF16,
author = {Xinyue Yuan and
S. Kim and
J. Juyon and
M. D'Urbino and
T. Bullmann and
Y. Chen and
Alexander Stettler and
Andreas Hierlemann and
Urs Frey},
title = {A microelectrode array with 8, 640 electrodes enabling simultaneous
full-frame readout at 6.5 kfps and 112-channel switch-matrix readout
at 20 kS/s},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573558},
doi = {10.1109/VLSIC.2016.7573558},
timestamp = {Wed, 28 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/YuanKJDBCSHF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YunSGC16,
author = {Ruida Yun and
James Sun and
Eric Gaalaas and
Baoxing Chen},
title = {A transformer-based digital isolator with 20kVPK surge capability
and {\textgreater} 200kV/{\(\mathrm{\mu}\)}S Common Mode Transient
Immunity},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573497},
doi = {10.1109/VLSIC.2016.7573497},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YunSGC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZeinolabedinDJS16,
author = {Seyed Mohammad Ali Zeinolabedin and
Anh{-}Tuan Do and
Dongsuk Jeon and
Dennis Sylvester and
Tony Tae{-}Hyoung Kim},
title = {A 128-channel spike sorting processor featuring 0.175 {\(\mathrm{\mu}\)}W
and 0.0033 mm\({}^{\mbox{2}}\) per channel in 65-nm {CMOS}},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573467},
doi = {10.1109/VLSIC.2016.7573467},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ZeinolabedinDJS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhangCHT16,
author = {Yi Zhang and
Chia{-}Hung Chen and
Tao He and
Gabor C. Temes},
title = {A 35{\(\mathrm{\mu}\)}W 96.8dB {SNDR} 1 kHz {BW} multi-step incremental
{ADC} using multi-slope extended counting with a single integrator},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573464},
doi = {10.1109/VLSIC.2016.7573464},
timestamp = {Wed, 10 Jan 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ZhangCHT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhangWV16,
author = {Jintao Zhang and
Zhuo Wang and
Naveen Verma},
title = {A machine-learning classifier implemented in a standard 6T {SRAM}
array},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573556},
doi = {10.1109/VLSIC.2016.7573556},
timestamp = {Wed, 22 Nov 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/ZhangWV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhaoWZXQSX16,
author = {Jian Zhao and
Xi Wang and
Yang Zhao and
Guo Ming Xia and
An Ping Qiu and
Yan Su and
Yong Ping Xu},
title = {A 0.23 {\(\mathrm{\mu}\)}g bias instability and 1.6 {\(\mathrm{\mu}\)}g/Hz\({}^{\mbox{1/2}}\)
resolution silicon oscillating accelerometer with build-in {\(\Sigma\)}-{\(\Delta\)}
frequency-to-digital converter},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573530},
doi = {10.1109/VLSIC.2016.7573530},
timestamp = {Fri, 03 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhaoWZXQSX16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZhouLKMKK16,
author = {Xiong Zhou and
Qiang Li and
Soren Kilsgaard and
Farshad Moradi and
Simon Lind Kappel and
Preben Kidmose},
title = {A wearable ear-EEG recording system based on dry-contact active electrodes},
booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
pages = {1--2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/VLSIC.2016.7573559},
doi = {10.1109/VLSIC.2016.7573559},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ZhouLKMKK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsic/2016,
title = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
HI, USA, June 15-17, 2016},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7569797/proceeding},
isbn = {978-1-5090-0635-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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