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@article{DBLP:journals/cal/AjdariPKKK18,
author = {Mohammadamin Ajdari and
Pyeongsu Park and
Dongup Kwon and
Joonsung Kim and
Jangwoo Kim},
title = {A Scalable HW-Based Inline Deduplication for {SSD} Arrays},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {47--50},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2753258},
doi = {10.1109/LCA.2017.2753258},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AjdariPKKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlBarakatGJ18,
author = {Laith M. AlBarakat and
Paul V. Gratz and
Daniel A. Jim{\'{e}}nez},
title = {MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {175--178},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2847345},
doi = {10.1109/LCA.2018.2847345},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AlBarakatGJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlmatroodS18,
author = {Amjad F. Almatrood and
Harpreet Singh},
title = {Design of Generalized Pipeline Cellular Array in Quantum-Dot Cellular
Automata},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {29--32},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2719021},
doi = {10.1109/LCA.2017.2719021},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AlmatroodS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AngstadtWDXKWSS18,
author = {Kevin Angstadt and
Jack Wadden and
Vinh Dang and
Ted Xie and
Dan Kramp and
Westley Weimer and
Mircea Stan and
Kevin Skadron},
title = {MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research
and Execution Ecosystem},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {84--87},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2780105},
doi = {10.1109/LCA.2017.2780105},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AngstadtWDXKWSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BasakHLOX18,
author = {Abanti Basak and
Xing Hu and
Shuangchen Li and
Sang Min Oh and
Yuan Xie},
title = {Exploring Core and Cache Hierarchy Bottlenecks in Graph Processing
Workloads},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {197--200},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2864964},
doi = {10.1109/LCA.2018.2864964},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BasakHLOX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoukseEA18,
author = {Esha Choukse and
Mattan Erez and
Alaa R. Alameldeen},
title = {CompressPoints: An Evaluation Methodology for Compressed Memory Systems},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {126--129},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2821163},
doi = {10.1109/LCA.2018.2821163},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ChoukseEA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChowdhuryHKZLLS18,
author = {Zamshed I. Chowdhury and
Jonathan D. Harms and
S. Karen Khatamifard and
Masoud Zabihi and
Yang Lv and
Andrew Lyle and
Sachin S. Sapatnekar and
Ulya R. Karpuzcu and
Jianping Wang},
title = {Efficient In-Memory Processing Using Spintronics},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {42--46},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2751042},
doi = {10.1109/LCA.2017.2751042},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/ChowdhuryHKZLLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChristoforidisX18,
author = {Eleftherios{-}Iordanis Christoforidis and
Sotirios Xydis and
Dimitrios Soudris},
title = {{CF-TUNE:} Collaborative Filtering Auto-Tuning for Energy Efficient
Many-Core Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {25--28},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2716919},
doi = {10.1109/LCA.2017.2716919},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ChristoforidisX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DelshadtehraniE18,
author = {Leila Delshadtehrani and
Schuyler Eldridge and
Sadullah Canakci and
Manuel Egele and
Ajay Joshi},
title = {Nile: {A} Programmable Monitoring Coprocessor},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {92--95},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2784416},
doi = {10.1109/LCA.2017.2784416},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/DelshadtehraniE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DoD18,
author = {Sang Wook Stephen Do and
Michel Dubois},
title = {Core Reliability: Leveraging Hardware Transactional Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {105--108},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2791433},
doi = {10.1109/LCA.2018.2791433},
timestamp = {Sat, 04 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/DoD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DurkovicC18,
author = {Srdjan Durkovic and
Zoran Cica},
title = {Birkhoff-Von Neumann Switch Based on Greedy Scheduling},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {13--16},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2707082},
doi = {10.1109/LCA.2017.2707082},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/DurkovicC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EyermanHBH18,
author = {Stijn Eyerman and
Wim Heirman and
Kristof Du Bois and
Ibrahim Hur},
title = {Multi-Stage {CPI} Stacks},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {55--58},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2761751},
doi = {10.1109/LCA.2017.2761751},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/EyermanHBH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GanD18,
author = {Yu Gan and
Christina Delimitrou},
title = {The Architectural Implications of Cloud Microservices},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {155--158},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2839189},
doi = {10.1109/LCA.2018.2839189},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/GanD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HadjilambrouDAS18,
author = {Zacharias Hadjilambrou and
Shidhartha Das and
Marco A. Antoniades and
Yiannakis Sazeides},
title = {Sensing {CPU} Voltage Noise Through Electromagnetic Emanations},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {68--71},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2766221},
doi = {10.1109/LCA.2017.2766221},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/HadjilambrouDAS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Hoseinzadeh18,
author = {Morteza Hoseinzadeh},
title = {Flow-Based Simulation Methodology},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {51--54},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2756051},
doi = {10.1109/LCA.2017.2756051},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/Hoseinzadeh18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IliakisXS18,
author = {Konstantinos Iliakis and
Sotirios Xydis and
Dimitrios Soudris},
title = {Decoupled MapReduce for Shared-Memory Multi-Core Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {143--146},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2827929},
doi = {10.1109/LCA.2018.2827929},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/IliakisXS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IpekLXY18,
author = {Engin Ipek and
Florian Longnos and
Shihai Xiao and
Wei Yang},
title = {Bit-Level Load Balancing: {A} New Technique for Improving the Write
Throughput of Deeply Scaled {STT-MRAM}},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {139--142},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2819979},
doi = {10.1109/LCA.2018.2819979},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/IpekLXY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IpekLXY18a,
author = {Engin Ipek and
Florian Longnos and
Shihai Xiao and
Wei Yang},
title = {Vertical Writes: Closing the Throughput Gap between Deeply Scaled
{STT-MRAM} and {DRAM}},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {151--154},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2820027},
doi = {10.1109/LCA.2018.2820027},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/IpekLXY18a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonPC18,
author = {Dong{-}Ik Jeon and
Kyeong{-}Bin Park and
Ki{-}Seok Chung},
title = {{HMC-MAC:} Processing-in Memory Architecture for Multiply-Accumulate
Operations with Hybrid Memory Cube},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {5--8},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2700298},
doi = {10.1109/LCA.2017.2700298},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/JeonPC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungLRA18,
author = {Daejin Jung and
Sunjung Lee and
Wonjong Rhee and
Jung Ho Ahn},
title = {Partitioning Compute Units in {CNN} Acceleration for Statistical Memory
Traffic Shaping},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {72--75},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2773055},
doi = {10.1109/LCA.2017.2773055},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/JungLRA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungZAKSSKK18,
author = {Myoungsoo Jung and
Jie Zhang and
Ahmed H. M. O. Abulila and
Miryeong Kwon and
Narges Shahidi and
John Shalf and
Nam Sung Kim and
Mahmut T. Kandemir},
title = {SimpleSSD: Modeling Solid State Drives for Holistic System Simulation},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {37--41},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2750658},
doi = {10.1109/LCA.2017.2750658},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/JungZAKSSKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KaliorakisCPG18,
author = {Manolis Kaliorakis and
Athanasios Chatzidimitriou and
George Papadimitriou and
Dimitris Gizopoulos},
title = {Statistical Analysis of Multicore CPUs Operation in Scaled Voltage
Conditions},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {109--112},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2798604},
doi = {10.1109/LCA.2018.2798604},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KaliorakisCPG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhatamifardNGKL18,
author = {S. Karen Khatamifard and
M. Hassan Najafi and
Ali Ghoreyshi and
Ulya R. Karpuzcu and
David J. Lilja},
title = {On Memory System Design for Stochastic Computing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {117--121},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2804926},
doi = {10.1109/LCA.2018.2804926},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KhatamifardNGKL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhatamifardWKK18,
author = {S. Karen Khatamifard and
Longfei Wang and
Sel{\c{c}}uk K{\"{o}}se and
Ulya R. Karpuzcu},
title = {A New Class of Covert Channels Exploiting Power Management Vulnerabilities},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {201--204},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2860006},
doi = {10.1109/LCA.2018.2860006},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KhatamifardWKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhoramZL18,
author = {Soroosh Khoram and
Yue Zha and
Jing Li},
title = {An Alternative Analytical Approach to Associative Processing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {113--116},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2789424},
doi = {10.1109/LCA.2018.2789424},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KhoramZL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKKH18,
author = {Seikwon Kim and
Wonsang Kwak and
Changdae Kim and
Jaehyuk Huh},
title = {Zebra Refresh: Value Transformation for Zero-Aware {DRAM} Refresh
Reduction},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {130--133},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2822808},
doi = {10.1109/LCA.2018.2822808},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KimKKH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKPKK18,
author = {Jihun Kim and
Joonsung Kim and
Pyeongsu Park and
Jong Kim and
Jangwoo Kim},
title = {{SSD} Performance Modeling Using Bottleneck Analysis},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {80--83},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2779122},
doi = {10.1109/LCA.2017.2779122},
timestamp = {Thu, 28 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KimKPKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimL18,
author = {Chinam Kim and
Hyukjun Lee},
title = {A High-Bandwidth PCM-Based Memory System for Highly Available {IP}
Routing Table Lookup},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {246--249},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2883461},
doi = {10.1109/LCA.2018.2883461},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KimL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KlineMJ18,
author = {Donald Kline Jr. and
Rami G. Melhem and
Alex K. Jones},
title = {Counter Advance for Reliable Encryption in Phase Change Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {209--212},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2861012},
doi = {10.1109/LCA.2018.2861012},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KlineMJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KondguliH18,
author = {Sushant Kondguli and
Michael C. Huang},
title = {Bootstrapping: Using {SMT} Hardware to Improve Single-Thread Performance},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {205--208},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2859945},
doi = {10.1109/LCA.2018.2859945},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KondguliH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KulkarniQD18,
author = {Neeraj Kulkarni and
Feng Qi and
Christina Delimitrou},
title = {Leveraging Approximation to Improve Datacenter Resource Efficiency},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {171--174},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2845841},
doi = {10.1109/LCA.2018.2845841},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KulkarniQD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KwonR18,
author = {Youngeun Kwon and
Minsoo Rhu},
title = {A Case for Memory-Centric {HPC} System Architecture for Training Deep
Neural Networks},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {134--138},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2823302},
doi = {10.1109/LCA.2018.2823302},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/KwonR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeLSA18,
author = {Eojin Lee and
Sukhan Lee and
G. Edward Suh and
Jung Ho Ahn},
title = {TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {96--99},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2787674},
doi = {10.1109/LCA.2017.2787674},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/LeeLSA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiLDYW18,
author = {Zhaoshi Li and
Leibo Liu and
Yangdong Deng and
Shouyi Yin and
Shaojun Wei},
title = {Breaking the Synchronization Bottleneck with Reconfigurable Transactional
Execution},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {147--150},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2828402},
doi = {10.1109/LCA.2018.2828402},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/LiLDYW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LouJ18,
author = {Qian Lou and
Lei Jiang},
title = {{BRAWL:} {A} Spintronics-Based Portable Basecalling-in-Memory Architecture
for Nanopore Genome Sequencing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {241--244},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2882384},
doi = {10.1109/LCA.2018.2882384},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/LouJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MashimoSI18,
author = {Susumu Mashimo and
Ryota Shioya and
Koji Inoue},
title = {{VMOR:} Microarchitectural Support for Operand Access in an Interpreter},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {217--220},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2866243},
doi = {10.1109/LCA.2018.2866243},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MashimoSI18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MiguelGBJ18,
author = {Joshua San Miguel and
Karthik Ganesan and
Mario Badr and
Natalie D. Enright Jerger},
title = {The {EH} Model: Analytical Exploration of Energy-Harvesting Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {76--79},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2777834},
doi = {10.1109/LCA.2017.2777834},
timestamp = {Thu, 10 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MiguelGBJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MinAHK18,
author = {Seungwon Min and
Mohammad Alian and
Wen{-}Mei Hwu and
Nam Sung Kim},
title = {Semi-Coherent {DMA:} An Alternative {I/O} Coherency Management for
Embedded Systems},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {221--224},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2866568},
doi = {10.1109/LCA.2018.2866568},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/MinAHK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MinPAWLPK18,
author = {Donghyun Min and
DongGyu Park and
Jinwoo Ahn and
Ryan Walker and
Junghee Lee and
Sungyong Park and
Youngjae Kim},
title = {Amoeba: An Autonomous Backup and Recovery {SSD} for Ransomware Attack
Defense},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {245--248},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2883431},
doi = {10.1109/LCA.2018.2883431},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MinPAWLPK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MourisTM18,
author = {Dimitris Mouris and
Nektarios Georgios Tsoutsos and
Michail Maniatakos},
title = {TERMinator Suite: Benchmarking Privacy-Preserving Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {122--125},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2812814},
doi = {10.1109/LCA.2018.2812814},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/MourisTM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NematollahiSFBS18,
author = {Negin Nematollahi and
Mohammad Sadrosadati and
Hajar Falahati and
Marzieh Barkhordar and
Hamid Sarbazi{-}Azad},
title = {Neda: Supporting Direct Inter-Core Neighbor Data Exchange in GPUs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {225--229},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2873679},
doi = {10.1109/LCA.2018.2873679},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/NematollahiSFBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OmarDKK18,
author = {Hamza Omar and
Halit Dogan and
Brian Kahne and
Omer Khan},
title = {Multicore Resource Isolation for Deterministic, Resilient and Secure
Concurrent Execution of Safety-Critical Applications},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {230--234},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2874216},
doi = {10.1109/LCA.2018.2874216},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/OmarDKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PestelSAE18,
author = {Sander De Pestel and
Sam Van den Steen and
Shoaib Akram and
Lieven Eeckhout},
title = {{RPPM:} Rapid Performance Prediction of Multithreaded Applications
on Multicore Hardware},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {183--186},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2849983},
doi = {10.1109/LCA.2018.2849983},
timestamp = {Mon, 22 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/PestelSAE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PhamHBC18,
author = {Binh Pham and
Derek Hower and
Abhishek Bhattacharjee and
Trey Cain},
title = {{TLB} Shootdown Mitigation for Low-Power Many-Core Servers with {L1}
Virtual Caches},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {17--20},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2712140},
doi = {10.1109/LCA.2017.2712140},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/PhamHBC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RakshitM18,
author = {Joydeep Rakshit and
Kartik Mohanram},
title = {{LEO:} Low Overhead Encryption {ORAM} for Non-Volatile Memories},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {100--104},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2795621},
doi = {10.1109/LCA.2018.2795621},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/RakshitM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SahooSSM18,
author = {Debiprasanna Sahoo and
Swaraj Sha and
Manoranjan Satpathy and
Madhu Mutyam},
title = {ReDRAM: {A} Reconfigurable {DRAM} Cache for GPGPUs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {213--216},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2865552},
doi = {10.1109/LCA.2018.2865552},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SahooSSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SciontiMZ18,
author = {Alberto Scionti and
Somnath Mazumdar and
St{\'{e}}phane Zuckerman},
title = {Enabling Massive Multi-Threading with Fast Hashing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {1--4},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2697863},
doi = {10.1109/LCA.2017.2697863},
timestamp = {Tue, 22 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/SciontiMZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShwartzB18,
author = {Ofir Shwartz and
Yitzhak Birk},
title = {Distributed Memory Integrity Trees},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {159--162},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2822705},
doi = {10.1109/LCA.2018.2822705},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ShwartzB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SteenE18,
author = {Sam Van den Steen and
Lieven Eeckhout},
title = {Modeling Superscalar Processor Memory-Level Parallelism},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {9--12},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2701370},
doi = {10.1109/LCA.2017.2701370},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SteenE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SwamiM18,
author = {Shivam Swami and
Kartik Mohanram},
title = {{ARSENAL:} Architecture for Secure Non-Volatile Memories},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {192--196},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2863281},
doi = {10.1109/LCA.2018.2863281},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/SwamiM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Vakil-GhahaniML18,
author = {Armin Vakil{-}Ghahani and
Sara Mahdizadeh{-}Shahri and
Mohammad{-}Reza Lotfi{-}Namin and
Mohammad Bakhshalipour and
Pejman Lotfi{-}Kamran and
Hamid Sarbazi{-}Azad},
title = {Cache Replacement Policy Based on Expected Hit Count},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {64--67},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2762660},
doi = {10.1109/LCA.2017.2762660},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/Vakil-GhahaniML18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VijayaraghavanR18,
author = {Thiruvengadam Vijayaraghavan and
Amit Rajesh and
Karthikeyan Sankaralingam},
title = {{MPU-BWM:} Accelerating Sequence Alignment},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {179--182},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2849064},
doi = {10.1109/LCA.2018.2849064},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/VijayaraghavanR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsG18,
author = {Leonid Yavits and
Ran Ginosar},
title = {Accelerator for Sparse Machine Learning},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {21--24},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2714667},
doi = {10.1109/LCA.2017.2714667},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/YavitsG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YunYKBK18,
author = {Jitae Yun and
Su{-}Kyung Yoon and
Jeong{-}Geun Kim and
Bernd Burgstaller and
Shin{-}Dug Kim},
title = {Regression Prefetcher with Preprocessing for {DRAM-PCM} Hybrid Main
Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {163--166},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2841835},
doi = {10.1109/LCA.2018.2841835},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/YunYKBK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaL18,
author = {Yue Zha and
Jing Li},
title = {{CMA:} {A} Reconfigurable Complex Matching Accelerator for Wire-Speed
Network Intrusion Detection},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {33--36},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2719023},
doi = {10.1109/LCA.2017.2719023},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhaL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangKFMJ18,
author = {Jiangwei Zhang and
Donald Kline Jr. and
Liang Fang and
Rami G. Melhem and
Alex K. Jones},
title = {{RETROFIT:} Fault-Aware Wear Leveling},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {167--170},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2840137},
doi = {10.1109/LCA.2018.2840137},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhangKFMJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangS18,
author = {Guowei Zhang and
Daniel S{\'{a}}nchez},
title = {Leveraging Hardware Caches for Memoization},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {59--63},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2762308},
doi = {10.1109/LCA.2017.2762308},
timestamp = {Tue, 11 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/ZhangS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaoCG18,
author = {Wenyi Zhao and
Quan Chen and
Minyi Guo},
title = {{KSM:} Online Application-Level Performance Slowdown Prediction for
Spatial Multitasking {GPGPU}},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {187--191},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2851207},
doi = {10.1109/LCA.2018.2851207},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhaoCG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhengL18,
author = {Hao Zheng and
Ahmed Louri},
title = {EZ-Pass: An Energy {\&} Performance-Efficient Power-Gating Router
Architecture for Scalable NoCs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {88--91},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2783918},
doi = {10.1109/LCA.2017.2783918},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZhengL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZokaeeZJ18,
author = {Farzaneh Zokaee and
Hamid R. Zarandi and
Lei Jiang},
title = {AligneR: {A} Process-in-Memory Architecture for Short Read Alignment
in ReRAMs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {2},
pages = {237--240},
year = {2018},
url = {https://doi.org/10.1109/LCA.2018.2854700},
doi = {10.1109/LCA.2018.2854700},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ZokaeeZJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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