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@article{DBLP:journals/vlsisp/BandyopadhyayJS94,
  author       = {Subir Bandyopadhyay and
                  Graham A. Jullien and
                  Abhijit Sengupta},
  title        = {A fast {VLSI} systolic array for large modulus residue addition},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {305--318},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106454},
  doi          = {10.1007/BF02106454},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/BandyopadhyayJS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/CardSS94,
  author       = {Howard C. Card and
                  Christian R. Schneider and
                  Roland S. Schneider},
  title        = {Learning capacitive weights in analog {CMOS} neural networks},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {209--225},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106447},
  doi          = {10.1007/BF02106447},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/CardSS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/DaviesAS94,
  author       = {T. C. Davies and
                  Dhamin Al{-}Khalili and
                  Valek Szwarc},
  title        = {A floating-point systolic array processing element with serial communication
                  and built-in self-test},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {241--251},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106449},
  doi          = {10.1007/BF02106449},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/DaviesAS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Fitzpatrick94,
  author       = {Patrick Fitzpatrick},
  title        = {On fault tolerant matrix decomposition},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {293--303},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106453},
  doi          = {10.1007/BF02106453},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Fitzpatrick94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/FowlerG94,
  author       = {Boyd Fowler and
                  Abbas El Gamal},
  title        = {Pulse-modulated analog neuron circuits},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {45--51},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407109},
  doi          = {10.1007/BF02407109},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/FowlerG94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Godfrey94,
  author       = {Michael D. Godfrey},
  title        = {Guest editor's introduction},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {7},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407106},
  doi          = {10.1007/BF02407106},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Godfrey94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/GowdaSH94,
  author       = {Sudhir M. Gowda and
                  Bing J. Sheu and
                  Wen{-}Jay Hsu},
  title        = {Testing of programmable analog neural network chips},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {267--282},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106451},
  doi          = {10.1007/BF02106451},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/GowdaSH94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Grundy94,
  author       = {D. L. Grundy},
  title        = {A computational approach to {VLSI} analog design},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {53--60},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407110},
  doi          = {10.1007/BF02407110},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Grundy94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/HoangR94,
  author       = {Phu Hoang and
                  Jan M. Rabaey},
  title        = {A {CAD} environment for Real-time {DSP} implementations on multiprocessors},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {131--150},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109381},
  doi          = {10.1007/BF02109381},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/HoangR94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/JoeressenVM94,
  author       = {Olaf J. Joeressen and
                  Martin Vaupel and
                  Heinrich Meyr},
  title        = {High-speed {VLSI} architectures for soft-output viterbi decoding},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {169--181},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109383},
  doi          = {10.1007/BF02109383},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/JoeressenVM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Jullien94,
  author       = {Graham A. Jullien},
  title        = {Guest editor's introduction},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {207--208},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106446},
  doi          = {10.1007/BF02106446},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Jullien94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/KnightCTP94,
  author       = {Stan Knight and
                  Danny Chin and
                  Herb Taylor and
                  Joseph E. Peters},
  title        = {The sarnoff engine: {A} massively parallel computer for high definition
                  system simulation},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {183--199},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109384},
  doi          = {10.1007/BF02109384},
  timestamp    = {Fri, 09 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/KnightCTP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/McQuillanM94,
  author       = {Stephen E. McQuillan and
                  John V. McCanny},
  title        = {Fast {VLSI} algorithms for division and square root},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {151--168},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109382},
  doi          = {10.1007/BF02109382},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/McQuillanM94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Mead94,
  author       = {Carver Mead},
  title        = {Scaling of {MOS} technology to submicrometer feature sizes},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {9--25},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407107},
  doi          = {10.1007/BF02407107},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Mead94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Moonen94,
  author       = {Marc Moonen},
  title        = {Implementing the square-root information Kalman filter on a Jacobi-type
                  systolic array},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {283--291},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106452},
  doi          = {10.1007/BF02106452},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Moonen94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/PavasovicAW94,
  author       = {Aleksandra Pavasovic and
                  Andreas G. Andreou and
                  Charles R. Westgate},
  title        = {Characterization of subthreshold {MOS} mismatch in transistors for
                  {VLSI} systems},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {75--85},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407112},
  doi          = {10.1007/BF02407112},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/PavasovicAW94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/PlettC94,
  author       = {Calvin Plett and
                  Miles A. Copeland},
  title        = {Self-tuned continuous-time notch filters},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {227--240},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106448},
  doi          = {10.1007/BF02106448},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/PlettC94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/PotkonjakR94,
  author       = {Miodrag Potkonjak and
                  Jan M. Rabaey},
  title        = {Optimizing throughput and resource utilization using pipelining: Transformation
                  based approach},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {117--130},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109380},
  doi          = {10.1007/BF02109380},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/PotkonjakR94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/PrakashP94,
  author       = {Shiv Prakash and
                  Alice C. Parker},
  title        = {Synthesis of application-specific multiprocessor systems including
                  memory components},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {97--116},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109379},
  doi          = {10.1007/BF02109379},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/PrakashP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/StanBCG94,
  author       = {Mircea R. Stan and
                  Wayne P. Burleson and
                  Christopher I. Connolly and
                  Roderic A. Grupen},
  title        = {Analog {VLSI} for robot path planning},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {61--73},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407111},
  doi          = {10.1007/BF02407111},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/StanBCG94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Swartzlander94,
  author       = {Earl E. Swartzlander Jr.},
  title        = {Editorial},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {5},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407105},
  doi          = {10.1007/BF02407105},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Swartzlander94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/SzwarcDWYCK94,
  author       = {Valek Szwarc and
                  Luc Desormeaux and
                  Wilson Wong and
                  Clifford P. S. Yeung and
                  Chong H. Chan and
                  Tad A. Kwasniewski},
  title        = {A chip set for pipeline and parallel pipeline {FFT} architectures},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {3},
  pages        = {253--265},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02106450},
  doi          = {10.1007/BF02106450},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/SzwarcDWYCK94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/ThieleC94,
  author       = {Lothar Thiele and
                  Edward Chow},
  title        = {Guest editors' introduction},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {2},
  pages        = {95},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02109377},
  doi          = {10.1007/BF02109377},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/ThieleC94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/Vittoz94,
  author       = {Eric A. Vittoz},
  title        = {Analog {VLSI} signal processing: Why, where, and how?},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {8},
  number       = {1},
  pages        = {27--44},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02407108},
  doi          = {10.1007/BF02407108},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/Vittoz94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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