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@article{DBLP:journals/amco/WangWSHH24,
  author       = {Lih{-}Chung Wang and
                  Tzer{-}jen Wei and
                  Jian{-}Ming Shih and
                  Yuh{-}Hua Hu and
                  Chih{-}Cheng Hsieh},
  title        = {An algorithm for solving over-determined multivariate quadratic systems
                  over finite fields},
  journal      = {Adv. Math. Commun.},
  volume       = {18},
  number       = {1},
  pages        = {55--90},
  year         = {2024},
  url          = {https://doi.org/10.3934/amc.2022001},
  doi          = {10.3934/AMC.2022001},
  timestamp    = {Mon, 01 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/amco/WangWSHH24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuWHKLJCCLLTHCCC24,
  author       = {Hung{-}Hsi Hsu and
                  Tai{-}Hao Wen and
                  Wei{-}Hsing Huang and
                  Win{-}San Khwa and
                  Yun{-}Chen Lo and
                  Chuan{-}Jia Jhang and
                  Yu{-}Hsiang Chin and
                  Yu{-}Chiao Chen and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Kea{-}Tiong Tang and
                  Chih{-}Cheng Hsieh and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A Nonvolatile AI-Edge Processor With {SLC-MLC} Hybrid ReRAM Compute-in-Memory
                  Macro Using Current-Voltage-Hybrid Readout Scheme},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {59},
  number       = {1},
  pages        = {116--127},
  year         = {2024},
  url          = {https://doi.org/10.1109/JSSC.2023.3314433},
  doi          = {10.1109/JSSC.2023.3314433},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/HsuWHKLJCCLLTHCCC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WuSCHRCWCLHLSCLWLLHTC24,
  author       = {Ping{-}Chun Wu and
                  Jian{-}Wei Su and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Fu{-}Chun Chang and
                  Yuan Wu and
                  Ho{-}Yu Chen and
                  Chen{-}Hsun Lin and
                  Hsu{-}Ming Hsiao and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Shih{-}Chieh Chang and
                  Wei{-}Chung Lo and
                  Chih{-}I Wu and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {An 8b-Precision 6T {SRAM} Computing-in-Memory Macro Using Time-Domain
                  Incremental Accumulation for {AI} Edge Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {59},
  number       = {7},
  pages        = {2297--2309},
  year         = {2024},
  url          = {https://doi.org/10.1109/JSSC.2023.3343669},
  doi          = {10.1109/JSSC.2023.3343669},
  timestamp    = {Fri, 19 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/WuSCHRCWCLHLSCLWLLHTC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WuSHRCCKHLSLCLLHTC24,
  author       = {Ping{-}Chun Wu and
                  Jian{-}Wei Su and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Chih{-}Han Chien and
                  Ho{-}Yu Chen and
                  Chao{-}En Ke and
                  Hsu{-}Ming Hsiao and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Shih{-}Chieh Chang and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A Floating-Point 6T {SRAM} In-Memory-Compute Macro Using Hybrid-Domain
                  Structure for Advanced {AI} Edge Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {59},
  number       = {1},
  pages        = {196--207},
  year         = {2024},
  url          = {https://doi.org/10.1109/JSSC.2023.3309966},
  doi          = {10.1109/JSSC.2023.3309966},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/WuSHRCCKHLSLCLLHTC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YouCKLHCLLHTCCC24,
  author       = {De{-}Qi You and
                  Yen{-}Cheng Chiu and
                  Win{-}San Khwa and
                  Chung{-}Yuan Li and
                  Fang{-}Ling Hsieh and
                  Yu{-}An Chien and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {An 8b-Precision 8-Mb {STT-MRAM} Near-Memory-Compute Macro Using Weight-Feature
                  and Input-Sparsity Aware Schemes for Energy-Efficient Edge {AI} Devices},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {59},
  number       = {1},
  pages        = {219--230},
  year         = {2024},
  url          = {https://doi.org/10.1109/JSSC.2023.3324335},
  doi          = {10.1109/JSSC.2023.3324335},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/YouCKLHCLLHTCCC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/make/HsiehLNNSOJM24,
  author       = {Chihcheng Hsieh and
                  Andr{\'{e}} Lu{\'{\i}}s and
                  Jos{\'{e}} Neves and
                  Isabel Blanco Nobre and
                  Sandra Costa Sousa and
                  Chun Ouyang and
                  Joaquim Jorge and
                  Catarina Moreira},
  title        = {EyeXNet: Enhancing Abnormality Detection and Diagnosis via Eye-Tracking
                  and X-ray Fusion},
  journal      = {Mach. Learn. Knowl. Extr.},
  volume       = {6},
  number       = {2},
  pages        = {1055--1071},
  year         = {2024},
  url          = {https://doi.org/10.3390/make6020048},
  doi          = {10.3390/MAKE6020048},
  timestamp    = {Wed, 07 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/make/HsiehLNNSOJM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/SuLWCLCHRHCMLSLCHLLHTC24,
  author       = {Jian{-}Wei Su and
                  Pei{-}Jung Lu and
                  Ping{-}Chun Wu and
                  Yen{-}Chi Chou and
                  Ta{-}Wei Liu and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hung and
                  Jin{-}Sheng Ren and
                  Wei{-}Hsing Huang and
                  Chih{-}Han Chien and
                  Peng{-}I Mei and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Shih{-}Chieh Chang and
                  Hao{-}Chiao Hong and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {8-Bit Precision 6T {SRAM} Compute-in-Memory Macro Using Global Bitline-Combining
                  Scheme for Edge {AI} Chips},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {71},
  number       = {4},
  pages        = {2304--2308},
  year         = {2024},
  url          = {https://doi.org/10.1109/TCSII.2023.3331375},
  doi          = {10.1109/TCSII.2023.3331375},
  timestamp    = {Mon, 15 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasII/SuLWCLCHRHCMLSLCHLLHTC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KhwaWWSCKCHCCLLHTC24,
  author       = {Win{-}San Khwa and
                  Ping{-}Chun Wu and
                  Jui{-}Jen Wu and
                  Jian{-}Wei Su and
                  Ho{-}Yu Chen and
                  Zhao{-}En Ke and
                  Ting{-}Chien Chiu and
                  Jun{-}Ming Hsu and
                  Chiao{-}Yen Cheng and
                  Yu{-}Chen Chen and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {34.2 {A} 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-Cell-Computing-in-Memory
                  Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge
                  Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
                  San Francisco, CA, USA, February 18-22, 2024},
  pages        = {568--570},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/ISSCC49657.2024.10454447},
  doi          = {10.1109/ISSCC49657.2024.10454447},
  timestamp    = {Tue, 19 Mar 2024 09:04:31 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/KhwaWWSCKCHCCLLHTC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ShihHTLTCLCHNWKXJFMCHJCLWCJ24,
  author       = {Ming{-}En Shih and
                  Shih{-}Wei Hsieh and
                  Ping{-}Yuan Tsai and
                  Ming{-}Hung Lin and
                  Pei{-}Kuei Tsung and
                  En{-}Jui Chang and
                  Jenwei Liang and
                  Shu{-}Hsin Chang and
                  Chung{-}Lun Huang and
                  You{-}Yu Nian and
                  Zhe Wan and
                  Sushil Kumar and
                  Cheng{-}Xin Xue and
                  Gajanan Jedhe and
                  Hidehiro Fujiwara and
                  Haruki Mori and
                  Chih{-}Wei Chen and
                  Po{-}Hua Huang and
                  Chih{-}Feng Juan and
                  Chung{-}Yi Chen and
                  Tsung{-}Yao Lin and
                  Ch Wang and
                  Chih{-}Cheng Chen and
                  Kevin Jou},
  title        = {20.1 {NVE:} {A} 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine
                  for High-Resolution Visual-Quality Enhancement on Smart Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
                  San Francisco, CA, USA, February 18-22, 2024},
  pages        = {360--362},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/ISSCC49657.2024.10454482},
  doi          = {10.1109/ISSCC49657.2024.10454482},
  timestamp    = {Tue, 19 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/ShihHTLTCLCHNWKXJFMCHJCLWCJ24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WenHKHKCWCHLLHTTCCCC24,
  author       = {Tai{-}Hao Wen and
                  Hung{-}Hsi Hsu and
                  Win{-}San Khwa and
                  Wei{-}Hsing Huang and
                  Zhao{-}En Ke and
                  Yu{-}Hsiang Chin and
                  Hua{-}Jin Wen and
                  Yu{-}Chen Chang and
                  Wei{-}Ting Hsu and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Shih{-}Hsih Teng and
                  Chung{-}Cheng Chou and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {34.8 {A} 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with
                  31.2TFLOPS/W for {AI} Edge Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
                  San Francisco, CA, USA, February 18-22, 2024},
  pages        = {580--582},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/ISSCC49657.2024.10454468},
  doi          = {10.1109/ISSCC49657.2024.10454468},
  timestamp    = {Tue, 19 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/WenHKHKCWCHLLHTTCCCC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2407-08227,
  author       = {Chihcheng Hsieh and
                  Catarina Moreira and
                  Isabel Blanco Nobre and
                  Sandra Costa Sousa and
                  Chun Ouyang and
                  Margot Brereton and
                  Joaquim Jorge and
                  Jacinto C. Nascimento},
  title        = {{DALL-M:} Context-Aware Clinical Data Augmentation with LLMs},
  journal      = {CoRR},
  volume       = {abs/2407.08227},
  year         = {2024},
  url          = {https://doi.org/10.48550/arXiv.2407.08227},
  doi          = {10.48550/ARXIV.2407.08227},
  eprinttype    = {arXiv},
  eprint       = {2407.08227},
  timestamp    = {Sun, 18 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2407-08227.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChenHMH23,
  author       = {Chih{-}Cheng Chen and
                  Yu{-}Hsiang Huang and
                  John Carl Joel Salao Marquez and
                  Chih{-}Cheng Hsieh},
  title        = {A 12-ENOB Second-Order Noise-Shaping {SAR} {ADC} With PVT-Insensitive
                  Voltage- Time-Voltage Converter},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {10},
  pages        = {2897--2906},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2023.3273311},
  doi          = {10.1109/JSSC.2023.3273311},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChenHMH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChiuCHLLTCH23,
  author       = {Min{-}Yang Chiu and
                  Guan{-}Cheng Chen and
                  Tzu{-}Hsiang Hsu and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A Multimode Vision Sensor With Temporal Contrast Pixel and Column-Parallel
                  Local Binary Pattern Extraction for Dynamic Depth Sensing Using Stereo
                  Vision},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {10},
  pages        = {2767--2777},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2023.3292051},
  doi          = {10.1109/JSSC.2023.3292051},
  timestamp    = {Sat, 14 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChiuCHLLTCH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuCCLLTCH23,
  author       = {Tzu{-}Hsiang Hsu and
                  Guan{-}Cheng Chen and
                  Yi{-}Ren Chen and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.8 {V} Intelligent Vision Sensor With Tiny Convolutional Neural
                  Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor
                  Technique for Image Classification},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {11},
  pages        = {3266--3274},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2023.3285734},
  doi          = {10.1109/JSSC.2023.3285734},
  timestamp    = {Thu, 09 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/HsuCCLLTCH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HungWHHCSKLLHTC23,
  author       = {Je{-}Min Hung and
                  Tai{-}Hao Wen and
                  Yen{-}Hsiang Huang and
                  Sheng{-}Po Huang and
                  Fu{-}Chun Chang and
                  Chin{-}I Su and
                  Win{-}San Khwa and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free
                  Time-Domain Readout Scheme for {AI} Edge Devices},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {1},
  pages        = {303--315},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2022.3200515},
  doi          = {10.1109/JSSC.2022.3200515},
  timestamp    = {Sun, 15 Jan 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/HungWHHCSKLLHTC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SuCLLLWCHRPJHCMLSCLWSLLHTC23,
  author       = {Jian{-}Wei Su and
                  Yen{-}Chi Chou and
                  Ruhui Liu and
                  Ta{-}Wei Liu and
                  Pei{-}Jung Lu and
                  Ping{-}Chun Wu and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Tianlong Pan and
                  Chuan{-}Jia Jhang and
                  Wei{-}Hsing Huang and
                  Chih{-}Han Chien and
                  Peng{-}I Mei and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Shih{-}Chieh Chang and
                  Wei{-}Chung Lo and
                  Chih{-}I Wu and
                  Xin Si and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 8-b-Precision 6T {SRAM} Computing-in-Memory Macro Using Segmented-Bitline
                  Charge-Sharing Scheme for {AI} Edge Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {58},
  number       = {3},
  pages        = {877--892},
  year         = {2023},
  url          = {https://doi.org/10.1109/JSSC.2022.3199077},
  doi          = {10.1109/JSSC.2022.3199077},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SuCLLLWCHRPJHCMLSCLWSLLHTC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcai/Hsieh23,
  author       = {Chihcheng Hsieh},
  title        = {Human-Centred Multimodal Deep Learning Models for Chest X-Ray Diagnosis},
  booktitle    = {Proceedings of the Thirty-Second International Joint Conference on
                  Artificial Intelligence, {IJCAI} 2023, 19th-25th August 2023, Macao,
                  SAR, China},
  pages        = {7085--7086},
  publisher    = {ijcai.org},
  year         = {2023},
  url          = {https://doi.org/10.24963/ijcai.2023/817},
  doi          = {10.24963/IJCAI.2023/817},
  timestamp    = {Mon, 28 Aug 2023 17:23:07 +0200},
  biburl       = {https://dblp.org/rec/conf/ijcai/Hsieh23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChiuKLHCLCPYCLLLHTCCC23,
  author       = {Yen{-}Cheng Chiu and
                  Win{-}San Khwa and
                  Chung{-}Yuan Li and
                  Fang{-}Ling Hsieh and
                  Yu{-}An Chien and
                  Guan{-}Yi Lin and
                  Po{-}Jung Chen and
                  Tsen{-}Hsiang Pan and
                  De{-}Qi You and
                  Fang{-}Yi Chen and
                  Andrew Lee and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A 22nm 8Mb {STT-MRAM} Near-Memory-Computing Macro with 8b-Precision
                  and 46.4-160.1TOPS/W for Edge-AI Devices},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
                  San Francisco, CA, USA, February 19-23, 2023},
  pages        = {496--497},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ISSCC42615.2023.10067563},
  doi          = {10.1109/ISSCC42615.2023.10067563},
  timestamp    = {Wed, 29 Mar 2023 15:53:39 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChiuKLHCLCPYCLLLHTCCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HuangWHKLJHCCLLTHCCC23,
  author       = {Wei{-}Hsing Huang and
                  Tai{-}Hao Wen and
                  Je{-}Min Hung and
                  Win{-}San Khwa and
                  Yun{-}Chen Lo and
                  Chuan{-}Jia Jhang and
                  Hung{-}Hsi Hsu and
                  Yu{-}Hsiang Chin and
                  Yu{-}Chiao Chen and
                  Chuna{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Kea{-}Tiong Tang and
                  Chih{-}Cheng Hsieh and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A Nonvolatile Al-Edge Processor with 4MB {SLC-MLC} Hybrid-Mode ReRAM
                  Compute-in-Memory Macro and 51.4-251TOPS/W},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
                  San Francisco, CA, USA, February 19-23, 2023},
  pages        = {258--259},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ISSCC42615.2023.10067610},
  doi          = {10.1109/ISSCC42615.2023.10067610},
  timestamp    = {Mon, 08 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/HuangWHKLJHCCLLTHCCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WuSHRCCKHLSLCLLHTC23,
  author       = {Ping{-}Chun Wu and
                  Jian{-}Wei Su and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Chih{-}Han Chien and
                  Ho{-}Yu Chen and
                  Chao{-}En Ke and
                  Hsu{-}Ming Hsiao and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Shih{-}Chieh Chang and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 22nm 832Kb Hybrid-Domain Floating-Point {SRAM} In-Memory-Compute
                  Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
                  San Francisco, CA, USA, February 19-23, 2023},
  pages        = {126--127},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ISSCC42615.2023.10067527},
  doi          = {10.1109/ISSCC42615.2023.10067527},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WuSHRCCKHLSLCLLHTC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChangXDJLCLLKJG23,
  author       = {En{-}Jui Chang and
                  Cheng{-}Xin Xue and
                  Chetan Deshpande and
                  Gajanan Jedhe and
                  Jenwei Liang and
                  Chih{-}Chung Cheng and
                  Hung{-}Wei Lin and
                  Chia{-}Da Lee and
                  Sushil Kumar and
                  Kim Soon Jway and
                  Zijie Guo and
                  Ritesh Garg and
                  Allen{-}Cl Lu and
                  Chien{-}Hung Lin and
                  Meng{-}Han Hsieh and
                  Tsung{-}Yao Lin and
                  Chih{-}Cheng Chen},
  title        = {A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning
                  System for End-to-End Always-on Vision},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185296},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185296},
  timestamp    = {Fri, 28 Jul 2023 10:40:41 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChangXDJLCLLKJG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WenHHWCLCSKWLLH23,
  author       = {Tai{-}Hao Wen and
                  Je{-}Min Hung and
                  Hung{-}Hsi Hsu and
                  Yuan Wu and
                  Fu{-}Chun Chang and
                  Chung{-}Yuan Li and
                  Chih{-}Han Chien and
                  Chin{-}I Su and
                  Win{-}San Khwa and
                  Jui{-}Jen Wu and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Mon{-}Shu Ho and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A 28nm Nonvolatile {AI} Edge Processor using 4Mb Analog-Based Near-Memory-Compute
                  ReRAM with 27.2 {TOPS/W} for Tiny {AI} Edge Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185326},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185326},
  timestamp    = {Tue, 20 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/WenHHWCLCSKWLLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YuMH23,
  author       = {Hsin Yu and
                  John Carl Joel Salao Marquez and
                  Chih{-}Cheng Hsieh},
  title        = {A -20{\textdegree}C{\textasciitilde}+107{\textdegree}C 52mk-NETD Reference-cell-free
                  15-bits {ROIC} for 80{\texttimes}60 Micro-bolometer Thermal Imager},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185249},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185249},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YuMH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vr/LuisHNSMJM23,
  author       = {Andr{\'{e}} Lu{\'{\i}}s and
                  Chihcheng Hsieh and
                  Isabel Blanco Nobre and
                  Sandra Costa Sousa and
                  Anderson Maciel and
                  Joaquim Jorge and
                  Catarina Moreira},
  title        = {Integrating Eye-Gaze Data into {CXR} {DL} Approaches: {A} Preliminary
                  study},
  booktitle    = {{IEEE} Conference on Virtual Reality and 3D User Interfaces Abstracts
                  and Workshops, {VR} Workshops 2023, Shanghai, China, March 25-29,
                  2023},
  pages        = {196--199},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VRW58643.2023.00048},
  doi          = {10.1109/VRW58643.2023.00048},
  timestamp    = {Wed, 07 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vr/LuisHNSMJM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-02940,
  author       = {Andr{\'{e}} Lu{\'{\i}}s and
                  Chihcheng Hsieh and
                  Isabel Blanco Nobre and
                  Sandra Costa Sousa and
                  Anderson Maciel and
                  Catarina Moreira and
                  Joaquim Jorge},
  title        = {Integrating Eye-Gaze Data into {CXR} {DL} Approaches: {A} Preliminary
                  study},
  journal      = {CoRR},
  volume       = {abs/2302.02940},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2302.02940},
  doi          = {10.48550/ARXIV.2302.02940},
  eprinttype    = {arXiv},
  eprint       = {2302.02940},
  timestamp    = {Wed, 07 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2302-02940.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-13390,
  author       = {Chihcheng Hsieh and
                  Isabel Blanco Nobre and
                  Sandra Costa Sousa and
                  Chun Ouyang and
                  Margot Brereton and
                  Jacinto C. Nascimento and
                  Joaquim Jorge and
                  Catarina Moreira},
  title        = {MDF-Net: Multimodal Dual-Fusion Network for Abnormality Detection
                  using {CXR} Images and Clinical Data},
  journal      = {CoRR},
  volume       = {abs/2302.13390},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2302.13390},
  doi          = {10.48550/ARXIV.2302.13390},
  eprinttype    = {arXiv},
  eprint       = {2302.13390},
  timestamp    = {Wed, 07 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2302-13390.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SuSCCHTLLLWCRCW22,
  author       = {Jian{-}Wei Su and
                  Xin Si and
                  Yen{-}Chi Chou and
                  Ting{-}Wei Chang and
                  Wei{-}Hsing Huang and
                  Yung{-}Ning Tu and
                  Ruhui Liu and
                  Pei{-}Jung Lu and
                  Ta{-}Wei Liu and
                  Jing{-}Hong Wang and
                  Yen{-}Lin Chung and
                  Jin{-}Sheng Ren and
                  Fu{-}Chun Chang and
                  Yuan Wu and
                  Hongwu Jiang and
                  Shanshi Huang and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Chih{-}I Wu and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Shimeng Yu and
                  Meng{-}Fan Chang},
  title        = {Two-Way Transpose Multibit 6T {SRAM} Computing-in-Memory Macro for
                  Inference-Training {AI} Edge Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {57},
  number       = {2},
  pages        = {609--624},
  year         = {2022},
  url          = {https://doi.org/10.1109/JSSC.2021.3108344},
  doi          = {10.1109/JSSC.2021.3108344},
  timestamp    = {Tue, 20 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/SuSCCHTLLLWCRCW22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SieLCYLLHCT22,
  author       = {Syuan{-}Hao Sie and
                  Jye{-}Luen Lee and
                  Yi{-}Ren Chen and
                  Zuo{-}Wei Yeh and
                  Zhaofang Li and
                  Chih{-}Cheng Lu and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang},
  title        = {{MARS:} Multimacro Architecture {SRAM} CIM-Based Accelerator With
                  Co-Designed Compressed Neural Networks},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {41},
  number       = {5},
  pages        = {1550--1562},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCAD.2021.3082107},
  doi          = {10.1109/TCAD.2021.3082107},
  timestamp    = {Tue, 26 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/SieLCYLLHCT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/HsiehLLLCT22,
  author       = {Chia{-}Yu Hsieh and
                  Shih{-}Ting Lin and
                  Zhaofang Li and
                  Chih{-}Cheng Lu and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang},
  title        = {MARSv2: Multicore and Programmable Reconstruction Architecture {SRAM}
                  CIM-Based Accelerator with Lightweight Network},
  booktitle    = {4th {IEEE} International Conference on Artificial Intelligence Circuits
                  and Systems, {AICAS} 2022, Incheon, Republic of Korea, June 13-15,
                  2022},
  pages        = {383--386},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/AICAS54282.2022.9870005},
  doi          = {10.1109/AICAS54282.2022.9870005},
  timestamp    = {Fri, 16 Sep 2022 20:28:36 +0200},
  biburl       = {https://dblp.org/rec/conf/aicas/HsiehLLLCT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChiuYTHCWCHLLCP22,
  author       = {Yen{-}Cheng Chiu and
                  Chia{-}Sheng Yang and
                  Shih{-}Hsih Teng and
                  Hsiao{-}Yu Huang and
                  Fu{-}Chun Chang and
                  Yuan Wu and
                  Yu{-}An Chien and
                  Fang{-}Ling Hsieh and
                  Chung{-}Yuan Li and
                  Guan{-}Yi Lin and
                  Po{-}Jung Chen and
                  Tsen{-}Hsiang Pan and
                  Chung{-}Chuan Lo and
                  Win{-}San Khwa and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Chieh{-}Pu Lo and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A 22nm 4Mb {STT-MRAM} Data-Encrypted Near-Memory Computation Macro
                  with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b
                  {MAC} for {AI} Operations},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {178--180},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731621},
  doi          = {10.1109/ISSCC42614.2022.9731621},
  timestamp    = {Tue, 20 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/ChiuYTHCWCHLLCP22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HsuCCLLCTH22,
  author       = {Tzu{-}Hsiang Hsu and
                  Guan{-}Cheng Chen and
                  Yi{-}Ren Chen and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.8V Intelligent Vision Sensor with Tiny Convolutional Neural Network
                  and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique
                  for Image Classification},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731675},
  doi          = {10.1109/ISSCC42614.2022.9731675},
  timestamp    = {Mon, 21 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/HsuCCLLCTH22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HungHHCWSKLLHTC22,
  author       = {Je{-}Min Hung and
                  Yen{-}Hsiang Huang and
                  Sheng{-}Po Huang and
                  Fu{-}Chun Chang and
                  Tai{-}Hao Wen and
                  Chin{-}I Su and
                  Win{-}San Khwa and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory
                  Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI
                  Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731715},
  doi          = {10.1109/ISSCC42614.2022.9731715},
  timestamp    = {Mon, 21 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/HungHHCWSKLLHTC22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WuSCHRCWCLHLSCL22,
  author       = {Ping{-}Chun Wu and
                  Jian{-}Wei Su and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Fu{-}Chun Chang and
                  Yuan Wu and
                  Ho{-}Yu Chen and
                  Chen{-}Hsun Lin and
                  Hsu{-}Ming Hsiao and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Shih{-}Chieh Chang and
                  Wei{-}Chung Lo and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Chih{-}I Wu and
                  Meng{-}Fan Chang},
  title        = {A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns
                  Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI
                  Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731681},
  doi          = {10.1109/ISSCC42614.2022.9731681},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WuSCHRCWCLHLSCL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-02399,
  author       = {Yu{-}Liang Chou and
                  Chihcheng Hsieh and
                  Catarina Moreira and
                  Chun Ouyang and
                  Joaquim Jorge and
                  Jo{\~{a}}o Madeiras Pereira},
  title        = {Benchmark Evaluation of Counterfactual Algorithms for {XAI:} From
                  a White Box to a Black Box},
  journal      = {CoRR},
  volume       = {abs/2203.02399},
  year         = {2022},
  url          = {https://doi.org/10.48550/arXiv.2203.02399},
  doi          = {10.48550/ARXIV.2203.02399},
  eprinttype    = {arXiv},
  eprint       = {2203.02399},
  timestamp    = {Wed, 07 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2203-02399.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuCCCLLTCH21,
  author       = {Tzu{-}Hsiang Hsu and
                  Yen{-}Kai Chen and
                  Min{-}Yang Chiu and
                  Guan{-}Cheng Chen and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.8 {V} Multimode Vision Sensor for Motion and Saliency Detection
                  With Ping-Pong {PWM} Pixel},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {56},
  number       = {8},
  pages        = {2516--2524},
  year         = {2021},
  url          = {https://doi.org/10.1109/JSSC.2021.3075746},
  doi          = {10.1109/JSSC.2021.3075746},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsuCCCLLTCH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuCLLTCH21,
  author       = {Tzu{-}Hsiang Hsu and
                  Yi{-}Ren Chen and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5-V Real-Time Computational {CMOS} Image Sensor With Programmable
                  Kernel for Feature Extraction},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {56},
  number       = {5},
  pages        = {1588--1596},
  year         = {2021},
  url          = {https://doi.org/10.1109/JSSC.2020.3034192},
  doi          = {10.1109/JSSC.2020.3034192},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsuCLLTCH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SiTHSLWLWLCCSLL21,
  author       = {Xin Si and
                  Yung{-}Ning Tu and
                  Wei{-}Hsing Huang and
                  Jian{-}Wei Su and
                  Pei{-}Jung Lu and
                  Jing{-}Hong Wang and
                  Ta{-}Wei Liu and
                  Ssu{-}Yen Wu and
                  Ruhui Liu and
                  Yen{-}Chi Chou and
                  Yen{-}Lin Chung and
                  William Shih and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Nan{-}Chun Lien and
                  Wei{-}Chiang Shih and
                  Yajuan He and
                  Qiang Li and
                  Meng{-}Fan Chang},
  title        = {A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro
                  With 8-b {MAC} Operation for Edge {AI} Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {56},
  number       = {9},
  pages        = {2817--2831},
  year         = {2021},
  url          = {https://doi.org/10.1109/JSSC.2021.3073254},
  doi          = {10.1109/JSSC.2021.3073254},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SiTHSLWLWLCCSLL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/WuKKWHLTL21,
  author       = {Hsin{-}Yu Wu and
                  Wei{-}Tse Kao and
                  Harrison Hao{-}Yu Ku and
                  Cheng{-}Te Wang and
                  Chih{-}Cheng Hsieh and
                  Ren{-}Shuo Liu and
                  Kea{-}Tiong Tang and
                  Chung{-}Chuan Lo},
  title        = {A Bio-Inspired Motion Detection Circuit Model for the Computation
                  of Optical Flow: The Spatial-Temporal Filtering Reichardt Model},
  booktitle    = {3rd {IEEE} International Conference on Artificial Intelligence Circuits
                  and Systems, {AICAS} 2021, Washington, DC, USA, June 6-9, 2021},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/AICAS51828.2021.9458450},
  doi          = {10.1109/AICAS51828.2021.9458450},
  timestamp    = {Fri, 25 Jun 2021 11:56:02 +0200},
  biburl       = {https://dblp.org/rec/conf/aicas/WuKKWHLTL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/WuYWWYHLTL21,
  author       = {Wen{-}Chieh Wu and
                  Chen{-}Fu Yeh and
                  Alexander James White and
                  Cheng{-}Te Wang and
                  Zuo{-}Wei Yeh and
                  Chih{-}Cheng Hsieh and
                  Ren{-}Shuo Liu and
                  Kea{-}Tiong Tang and
                  Chung{-}Chuan Lo},
  title        = {Integer Quadratic Integrate-and-Fire {(IQIF):} {A} Neuron Model for
                  Digital Neuromorphic Systems},
  booktitle    = {3rd {IEEE} International Conference on Artificial Intelligence Circuits
                  and Systems, {AICAS} 2021, Washington, DC, USA, June 6-9, 2021},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/AICAS51828.2021.9458572},
  doi          = {10.1109/AICAS51828.2021.9458572},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aicas/WuYWWYHLTL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenH21,
  author       = {Chih{-}Cheng Chen and
                  Chih{-}Cheng Hsieh},
  title        = {A 12-ENOB Second-Order Noise Shaping {SAR} {ADC} with PVT-insensitive
                  Voltage-Time-Voltage Converter},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2021, Busan,
                  Korea, Republic of, November 7-10, 2021},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/A-SSCC53895.2021.9634791},
  doi          = {10.1109/A-SSCC53895.2021.9634791},
  timestamp    = {Tue, 21 Dec 2021 17:54:16 +0100},
  biburl       = {https://dblp.org/rec/conf/asscc/ChenH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpm/HsiehMO21,
  author       = {Chihcheng Hsieh and
                  Catarina Moreira and
                  Chun Ouyang},
  editor       = {Claudio Di Ciccio and
                  Chiara Di Francescomarino and
                  Pnina Soffer},
  title        = {DiCE4EL: Interpreting Process Predictions using a Milestone-Aware
                  Counterfactual Approach},
  booktitle    = {3rd International Conference on Process Mining, {ICPM} 2021, Eindhoven,
                  The Netherlands, October 31 - Nov. 4, 2021},
  pages        = {88--95},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICPM53251.2021.9576881},
  doi          = {10.1109/ICPM53251.2021.9576881},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icpm/HsiehMO21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icsse/LiuCLTHW21,
  author       = {Po{-}Yi Liu and
                  Chih{-}Cheng Chen and
                  Sze{-}Teng Liong and
                  Ming{-}Han Tsai and
                  Ping{-}Cheng Hsieh and
                  Kun{-}Ching Wang},
  title        = {Intelligent Fault Diagnosis Based on Multi-Resolution and One-Dimension
                  Convolutional Neural Networks},
  booktitle    = {International Conference on System Science and Engineering, {ICSSE}
                  2021, Ho Chi Minh City, Vietnam, August 26-28, 2021},
  pages        = {319--322},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICSSE52999.2021.9538454},
  doi          = {10.1109/ICSSE52999.2021.9538454},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icsse/LiuCLTHW21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LaiHCH21,
  author       = {Wei{-}Chih Lai and
                  Tzu{-}Hsiang Hsu and
                  Chih{-}Cheng Chen and
                  Chih{-}Cheng Hsieh},
  title        = {A 12-Bit {SAR} {ADC} with Reference Voltage Ripple Suppression},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
                  Daegu, South Korea, May 22-28, 2021},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISCAS51556.2021.9401764},
  doi          = {10.1109/ISCAS51556.2021.9401764},
  timestamp    = {Fri, 02 Jul 2021 12:26:54 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LaiHCH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KeaneHV21,
  author       = {John Keane and
                  Chih{-}Cheng Hsieh and
                  Bob Verbruggen},
  title        = {Session 27 Overview: Discrete-Time ADCs Data Converters Subcommittee},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {368--369},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9366055},
  doi          = {10.1109/ISSCC42613.2021.9366055},
  timestamp    = {Wed, 10 Mar 2021 15:02:58 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/KeaneHV21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SuCLLLWCHRPLCSL21,
  author       = {Jian{-}Wei Su and
                  Yen{-}Chi Chou and
                  Ruhui Liu and
                  Ta{-}Wei Liu and
                  Pei{-}Jung Lu and
                  Ping{-}Chun Wu and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hung and
                  Jin{-}Sheng Ren and
                  Tianlong Pan and
                  Sih{-}Han Li and
                  Shih{-}Chieh Chang and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Chih{-}I Wu and
                  Xin Si and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {16.3 {A} 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision
                  for {AI} Edge Chips},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {250--252},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9365984},
  doi          = {10.1109/ISSCC42613.2021.9365984},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SuCLLLWCHRPLCSL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/XueHKHHCCLJSKLL21,
  author       = {Cheng{-}Xin Xue and
                  Je{-}Min Hung and
                  Hui{-}Yao Kao and
                  Yen{-}Hsiang Huang and
                  Sheng{-}Po Huang and
                  Fu{-}Chun Chang and
                  Peng Chen and
                  Ta{-}Wei Liu and
                  Chuan{-}Jia Jhang and
                  Chin{-}I Su and
                  Win{-}San Khwa and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91
                  to 195.7TOPS/W for Tiny {AI} Edge Devices},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {245--247},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9365769},
  doi          = {10.1109/ISSCC42613.2021.9365769},
  timestamp    = {Wed, 10 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/XueHKHHCCLJSKLL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2107-08697,
  author       = {Chihcheng Hsieh and
                  Catarina Moreira and
                  Chun Ouyang},
  title        = {Interpreting Process Predictions using a Milestone-Aware Counterfactual
                  Approach},
  journal      = {CoRR},
  volume       = {abs/2107.08697},
  year         = {2021},
  url          = {https://arxiv.org/abs/2107.08697},
  eprinttype    = {arXiv},
  eprint       = {2107.08697},
  timestamp    = {Thu, 22 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2107-08697.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChiuZCSLTSHWWHS20,
  author       = {Yen{-}Cheng Chiu and
                  Zhixiao Zhang and
                  Jia{-}Jing Chen and
                  Xin Si and
                  Ruhui Liu and
                  Yung{-}Ning Tu and
                  Jian{-}Wei Su and
                  Wei{-}Hsing Huang and
                  Jing{-}Hong Wang and
                  Wei{-}Chen Wei and
                  Je{-}Min Hung and
                  Shyh{-}Shyuan Sheu and
                  Sih{-}Han Li and
                  Chih{-}I Wu and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory
                  Unit-Macro for CNN-Based {AI} Edge Processors},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {10},
  pages        = {2790--2801},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2020.3005754},
  doi          = {10.1109/JSSC.2020.3005754},
  timestamp    = {Tue, 06 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChiuZCSLTSHWWHS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SiLYLHTLCCTHWCW20,
  author       = {Xin Si and
                  Rui Liu and
                  Shimeng Yu and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Qiang Li and
                  Meng{-}Fan Chang and
                  Jia{-}Jing Chen and
                  Yung{-}Ning Tu and
                  Wei{-}Hsing Huang and
                  Jing{-}Hong Wang and
                  Yen{-}Cheng Chiu and
                  Wei{-}Chen Wei and
                  Ssu{-}Yen Wu and
                  Xiaoyu Sun},
  title        = {A Twin-8T {SRAM} Computation-in-Memory Unit-Macro for Multibit CNN-Based
                  {AI} Edge Processors},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {1},
  pages        = {189--202},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2019.2952773},
  doi          = {10.1109/JSSC.2019.2952773},
  timestamp    = {Wed, 26 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SiLYLHTLCCTHWCW20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/XueCCKCLKLLHTCC20,
  author       = {Cheng{-}Xin Xue and
                  Ting{-}Wei Chang and
                  Tung{-}Cheng Chang and
                  Hui{-}Yao Kao and
                  Yen{-}Cheng Chiu and
                  Chun{-}Ying Lee and
                  Ya{-}Chin King and
                  Chrong Jung Lin and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Wei{-}Hao Chen and
                  Meng{-}Fan Chang and
                  Je{-}Syu Liu and
                  Jia{-}Fang Li and
                  Wei{-}Yu Lin and
                  Wei{-}En Lin and
                  Jing{-}Hong Wang and
                  Wei{-}Chen Wei and
                  Tsung{-}Yuan Huang},
  title        = {Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit
                  Input and Weight for CNN-Based {AI} Edge Processors},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {1},
  pages        = {203--215},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2019.2951363},
  doi          = {10.1109/JSSC.2019.2951363},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/XueCCKCLKLLHTCC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/LinCCHCHHCLSC20,
  author       = {Chih{-}Lung Lin and
                  Wen{-}Ching Chiu and
                  Ting{-}Ching Chu and
                  Yuan{-}Hao Ho and
                  Fu{-}Hsing Chen and
                  Chih{-}Cheng Hsu and
                  Ping{-}Hsiao Hsieh and
                  Chien{-}Hsu Chen and
                  Chou{-}Ching K. Lin and
                  Pi{-}Shan Sung and
                  Peng{-}Ting Chen},
  title        = {Innovative Head-Mounted System Based on Inertial Sensors and Magnetometer
                  for Detecting Falling Movements},
  journal      = {Sensors},
  volume       = {20},
  number       = {20},
  pages        = {5774},
  year         = {2020},
  url          = {https://doi.org/10.3390/s20205774},
  doi          = {10.3390/S20205774},
  timestamp    = {Fri, 19 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/sensors/LinCCHCHHCLSC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenHCCH20,
  author       = {You{-}Shin Chen and
                  Tzu{-}Hsiang Hsu and
                  Guan{-}Cheng Chen and
                  Chien{-}Wen Chen and
                  Chih{-}Cheng Hsieh},
  title        = {A Monolithic Optical Encoder using {CMOS} Image Sensor with Background
                  Light Cancellation},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
                  Sevilla, Spain, October 10-21, 2020},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISCAS45731.2020.9181039},
  doi          = {10.1109/ISCAS45731.2020.9181039},
  timestamp    = {Mon, 18 Jan 2021 08:38:59 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenHCCH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HsuCWTWYSCLLTCH20,
  author       = {Tzu{-}Hsiang Hsu and
                  Yen{-}Kai Chen and
                  Jun{-}Shen Wu and
                  Wen{-}Chien Ting and
                  Cheng{-}Te Wang and
                  Chen{-}Fu Yeh and
                  Syuan{-}Hao Sie and
                  Yi{-}Ren Chen and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {5.9 {A} 0.8V Multimode Vision Sensor for Motion and Saliency Detection
                  with Ping-Pong {PWM} Pixel},
  booktitle    = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
                  2020, San Francisco, CA, USA, February 16-20, 2020},
  pages        = {110--112},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISSCC19947.2020.9062926},
  doi          = {10.1109/ISSCC19947.2020.9062926},
  timestamp    = {Sat, 18 Apr 2020 17:41:44 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/HsuCWTWYSCLLTCH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SiTHSLWLWLCZSWL20,
  author       = {Xin Si and
                  Yung{-}Ning Tu and
                  Wei{-}Hsing Huang and
                  Jian{-}Wei Su and
                  Pei{-}Jung Lu and
                  Jing{-}Hong Wang and
                  Ta{-}Wei Liu and
                  Ssu{-}Yen Wu and
                  Ruhui Liu and
                  Yen{-}Chi Chou and
                  Zhixiao Zhang and
                  Syuan{-}Hao Sie and
                  Wei{-}Chen Wei and
                  Yun{-}Chen Lo and
                  Tai{-}Hsing Wen and
                  Tzu{-}Hsiang Hsu and
                  Yen{-}Kai Chen and
                  William Shih and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Nan{-}Chun Lien and
                  Wei{-}Chiang Shih and
                  Yajuan He and
                  Qiang Li and
                  Meng{-}Fan Chang},
  title        = {15.5 {A} 28nm 64Kb 6T {SRAM} Computing-in-Memory Macro with 8b {MAC}
                  Operation for {AI} Edge Chips},
  booktitle    = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
                  2020, San Francisco, CA, USA, February 16-20, 2020},
  pages        = {246--248},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISSCC19947.2020.9062995},
  doi          = {10.1109/ISSCC19947.2020.9062995},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SiTHSLWLWLCZSWL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SuSCCHTLLLWZJHL20,
  author       = {Jian{-}Wei Su and
                  Xin Si and
                  Yen{-}Chi Chou and
                  Ting{-}Wei Chang and
                  Wei{-}Hsing Huang and
                  Yung{-}Ning Tu and
                  Ruhui Liu and
                  Pei{-}Jung Lu and
                  Ta{-}Wei Liu and
                  Jing{-}Hong Wang and
                  Zhixiao Zhang and
                  Hongwu Jiang and
                  Shanshi Huang and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Shyh{-}Shyuan Sheu and
                  Sih{-}Han Li and
                  Heng{-}Yuan Lee and
                  Shih{-}Chieh Chang and
                  Shimeng Yu and
                  Meng{-}Fan Chang},
  title        = {15.2 {A} 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T
                  {SRAM} Compute-in-Memory Macro for {AI} Edge Chips},
  booktitle    = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
                  2020, San Francisco, CA, USA, February 16-20, 2020},
  pages        = {240--242},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISSCC19947.2020.9062949},
  doi          = {10.1109/ISSCC19947.2020.9062949},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SuSCCHTLLLWZJHL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/XueHLCKWLWHWCHC20,
  author       = {Cheng{-}Xin Xue and
                  Tsung{-}Yuan Huang and
                  Je{-}Syu Liu and
                  Ting{-}Wei Chang and
                  Hui{-}Yao Kao and
                  Jing{-}Hong Wang and
                  Ta{-}Wei Liu and
                  Shih{-}Ying Wei and
                  Sheng{-}Po Huang and
                  Wei{-}Chen Wei and
                  Yi{-}Ren Chen and
                  Tzu{-}Hsiang Hsu and
                  Yen{-}Kai Chen and
                  Yun{-}Chen Lo and
                  Tai{-}Hsing Wen and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {15.4 {A} 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W
                  for Multibit {MAC} Computing for Tiny {AI} Edge Devices},
  booktitle    = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
                  2020, San Francisco, CA, USA, February 16-20, 2020},
  pages        = {244--246},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISSCC19947.2020.9063078},
  doi          = {10.1109/ISSCC19947.2020.9063078},
  timestamp    = {Sat, 18 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/XueHLCKWLWHWCHC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2010-12861,
  author       = {Syuan{-}Hao Sie and
                  Jye{-}Luen Lee and
                  Yi{-}Ren Chen and
                  Chih{-}Cheng Lu and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang},
  title        = {{MARS:} Multi-macro Architecture {SRAM} CIM-Based Accelerator with
                  Co-designed Compressed Neural Networks},
  journal      = {CoRR},
  volume       = {abs/2010.12861},
  year         = {2020},
  url          = {https://arxiv.org/abs/2010.12861},
  eprinttype    = {arXiv},
  eprint       = {2010.12861},
  timestamp    = {Mon, 02 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2010-12861.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChangH19,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A Calibration-Free 12-bit 50-MS/s Full-Analog {SAR} {ADC} With Feedback
                  Zero-Crossing Detectors},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {54},
  number       = {6},
  pages        = {1624--1635},
  year         = {2019},
  url          = {https://doi.org/10.1109/JSSC.2019.2899738},
  doi          = {10.1109/JSSC.2019.2899738},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChangH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChangH19a,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A Calibration-Free 13-Bit 10-MS/s Full-Analog {SAR} {ADC} With Continuous-Time
                  Feedforward Cascaded Op-Amps},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {54},
  number       = {10},
  pages        = {2691--2702},
  year         = {2019},
  url          = {https://doi.org/10.1109/JSSC.2019.2919161},
  doi          = {10.1109/JSSC.2019.2919161},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChangH19a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChiouH19,
  author       = {Albert Yen{-}Chih Chiou and
                  Chih{-}Cheng Hsieh},
  title        = {An {ULV} {PWM} {CMOS} Imager With Adaptive-Multiple-Sampling Linear
                  Response, {HDR} Imaging, and Energy Harvesting},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {54},
  number       = {1},
  pages        = {298--306},
  year         = {2019},
  url          = {https://doi.org/10.1109/JSSC.2018.2870559},
  doi          = {10.1109/JSSC.2018.2870559},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChiouH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsiehH19,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4-V 13-bit 270-kS/s {SAR-ISDM} {ADC} With Opamp-Less Time-Domain
                  Integrator},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {54},
  number       = {6},
  pages        = {1648--1656},
  year         = {2019},
  url          = {https://doi.org/10.1109/JSSC.2019.2894998},
  doi          = {10.1109/JSSC.2019.2894998},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsiehH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HsuCWWCCKCKLLTC19,
  author       = {Tzu{-}Hsiang Hsu and
                  Yen{-}Kai Chen and
                  Tai{-}Hsing Wen and
                  Wei{-}Chen Wei and
                  Yi{-}Ren Chen and
                  Fu{-}Chun Chang and
                  Ren{-}Shuo Liu and
                  Chung{-}Chuan Lo and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5V Real-Time Computational {CMOS} Image Sensor with Programmable
                  Kernel for Always-On Feature Extraction},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2019, Macau,
                  SAR, China, November 4-6, 2019},
  pages        = {33--34},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/A-SSCC47793.2019.9056945},
  doi          = {10.1109/A-SSCC47793.2019.9056945},
  timestamp    = {Wed, 06 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asscc/HsuCWWCCKCKLLTC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhangCSTSHWWCHS19,
  author       = {Zhixiao Zhang and
                  Jia{-}Jing Chen and
                  Xin Si and
                  Yung{-}Ning Tu and
                  Jian{-}Wei Su and
                  Wei{-}Hsing Huang and
                  Jing{-}Hong Wang and
                  Wei{-}Chen Wei and
                  Yen{-}Cheng Chiu and
                  Je{-}Min Hong and
                  Shyh{-}Shyuan Sheu and
                  Sih{-}Han Li and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 55nm 1-to-8 bit Configurable 6T {SRAM} based Computing-in-Memory
                  Unit-Macro for CNN-based {AI} Edge Processors},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2019, Macau,
                  SAR, China, November 4-6, 2019},
  pages        = {217--218},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/A-SSCC47793.2019.9056933},
  doi          = {10.1109/A-SSCC47793.2019.9056933},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ZhangCSTSHWWCHS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangWH19,
  author       = {Yung{-}Te Chang and
                  Min{-}Rui Wu and
                  Chih{-}Cheng Hsieh},
  title        = {A 40MS/s 12-bit Zero-Crossing Based SAR-Assisted Two-Stage Pipelined
                  {ADC} with Adaptive Level Shifting},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702449},
  doi          = {10.1109/ISCAS.2019.8702449},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChangWH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SiCTHWCWWSLYLHT19,
  author       = {Xin Si and
                  Jia{-}Jing Chen and
                  Yung{-}Ning Tu and
                  Wei{-}Hsing Huang and
                  Jing{-}Hong Wang and
                  Yen{-}Cheng Chiu and
                  Wei{-}Chen Wei and
                  Ssu{-}Yen Wu and
                  Xiaoyu Sun and
                  Rui Liu and
                  Shimeng Yu and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Qiang Li and
                  Meng{-}Fan Chang},
  title        = {A Twin-8T {SRAM} Computation-In-Memory Macro for Multiple-Bit CNN-Based
                  Machine Learning},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
                  San Francisco, CA, USA, February 17-21, 2019},
  pages        = {396--398},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISSCC.2019.8662392},
  doi          = {10.1109/ISSCC.2019.8662392},
  timestamp    = {Wed, 26 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SiCTHWCWWSLYLHT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/XueCLLLLWWCCHKW19,
  author       = {Cheng{-}Xin Xue and
                  Wei{-}Hao Chen and
                  Je{-}Syu Liu and
                  Jia{-}Fang Li and
                  Wei{-}Yu Lin and
                  Wei{-}En Lin and
                  Jing{-}Hong Wang and
                  Wei{-}Chen Wei and
                  Ting{-}Wei Chang and
                  Tung{-}Cheng Chang and
                  Tsung{-}Yuan Huang and
                  Hui{-}Yao Kao and
                  Shih{-}Ying Wei and
                  Yen{-}Cheng Chiu and
                  Chun{-}Ying Lee and
                  Chung{-}Chuan Lo and
                  Ya{-}Chin King and
                  Chorng{-}Jung Lin and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel
                  {MAC} Computing Time for {CNN} Based {AI} Edge Processors},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
                  San Francisco, CA, USA, February 17-21, 2019},
  pages        = {388--390},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISSCC.2019.8662395},
  doi          = {10.1109/ISSCC.2019.8662395},
  timestamp    = {Tue, 12 Mar 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/XueCLLLLWWCCHKW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/ChenHCH19,
  author       = {You{-}Shin Chen and
                  Tzu{-}Hsiang Hsu and
                  Chien{-}Wen Chen and
                  Chih{-}Cheng Hsieh},
  title        = {A Current-Mode Differential Sensing {CMOS} Imager for Optical Linear
                  Encoder},
  booktitle    = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT}
                  2019, Hsinchu, Taiwan, April 22-25, 2019},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-DAT.2019.8741649},
  doi          = {10.1109/VLSI-DAT.2019.8741649},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/ChenHCH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/TangWYHCXKWHLLH19,
  author       = {Kea{-}Tiong Tang and
                  Wei{-}Chen Wei and
                  Zuo{-}Wei Yeh and
                  Tzu{-}Hsiang Hsu and
                  Yen{-}Cheng Chiu and
                  Cheng{-}Xin Xue and
                  Yu{-}Chun Kuo and
                  Tai{-}Hsing Wen and
                  Mon{-}Shu Ho and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang},
  title        = {Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor
                  Into Convolutional Neural Network Accelerators For Low-Power Edge
                  Devices},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {166},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778074},
  doi          = {10.23919/VLSIC.2019.8778074},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/TangWYHCXKWHLLH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChangH18,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 12-bit 150-MS/s Sub-Radix-3 {SAR} {ADC} With Switching Miller Capacitance
                  Reduction},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {53},
  number       = {6},
  pages        = {1755--1764},
  year         = {2018},
  url          = {https://doi.org/10.1109/JSSC.2018.2819176},
  doi          = {10.1109/JSSC.2018.2819176},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChangH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsiehH18,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.44-fJ/Conversion-Step 11-Bit 600-kS/s {SAR} {ADC} With Semi-Resting
                  {DAC}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {53},
  number       = {9},
  pages        = {2595--2603},
  year         = {2018},
  url          = {https://doi.org/10.1109/JSSC.2018.2847306},
  doi          = {10.1109/JSSC.2018.2847306},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsiehH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsiehKH18,
  author       = {Sung{-}En Hsieh and
                  Chen{-}Che Kao and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5-V 12-bit {SAR} {ADC} Using Adaptive Time-Domain Comparator With
                  Noise Optimization},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {53},
  number       = {10},
  pages        = {2763--2771},
  year         = {2018},
  url          = {https://doi.org/10.1109/JSSC.2018.2862880},
  doi          = {10.1109/JSSC.2018.2862880},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsiehKH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuLLH18,
  author       = {Tzu{-}Hsiang Hsu and
                  Ting Liao and
                  Nien{-}An Lee and
                  Chih{-}Cheng Hsieh},
  title        = {A {CMOS} Time-of-Flight Depth Image Sensor With In-Pixel Background
                  Light Cancellation and Phase Shifting Readout Technique},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {53},
  number       = {10},
  pages        = {2898--2905},
  year         = {2018},
  url          = {https://doi.org/10.1109/JSSC.2018.2850931},
  doi          = {10.1109/JSSC.2018.2850931},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsuLLH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChouCJCWYCCHCT18,
  author       = {Ting{-}I Chou and
                  Kwuang{-}Han Chang and
                  Jia{-}Yin Jhang and
                  Shih{-}Wen Chiu and
                  Guoxing Wang and
                  Chia{-}Hsiang Yang and
                  Herming Chiueh and
                  Hsin Chen and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang},
  title        = {A 1-V 2.6-mW Environmental Compensated Fully Integrated Nose-on-a-Chip},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {65-II},
  number       = {10},
  pages        = {1365--1369},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCSII.2018.2854588},
  doi          = {10.1109/TCSII.2018.2854588},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/ChouCJCWYCCHCT18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChangH18,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A Calibration-Free 0.7-V 13-bit 10-MS/s Full-Analog {SAR} {ADC} with
                  Continuous-Time Feedforward Cascaded {(CTFC)} Op-Amps},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
                  Taiwan, November 5-7, 2018},
  pages        = {249--252},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ASSCC.2018.8579334},
  doi          = {10.1109/ASSCC.2018.8579334},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ChangH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChenHHH18,
  author       = {Hsiang{-}Lin Chen and
                  Sung{-}En Hsieh and
                  Tzu{-}Hsiang Hsu and
                  Chih{-}Cheng Hsieh},
  title        = {A {CMOS} Imager for Reflective Pulse Oximeter with Motion Artifact
                  and Ambient Interference Rejections},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
                  Taiwan, November 5-7, 2018},
  pages        = {25--26},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ASSCC.2018.8579309},
  doi          = {10.1109/ASSCC.2018.8579309},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ChenHHH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/biocas/LiYCHWLLHHLCT18,
  author       = {Pin{-}Yi Li and
                  Cheng{-}Han Yang and
                  Wei{-}Hao Chen and
                  Jian{-}Hao Huang and
                  Wei{-}Chen Wei and
                  Je{-}Syu Liu and
                  Wei{-}Yu Lin and
                  Tzu{-}Hsiang Hsu and
                  Chih{-}Cheng Hsieh and
                  Ren{-}Shuo Liu and
                  Meng{-}Fan Chang and
                  Kea{-}Tiong Tang},
  title        = {A Neuromorphic Computing System for Bitwise Neural Networks Based
                  on ReRAM Synaptic Array},
  booktitle    = {2018 {IEEE} Biomedical Circuits and Systems Conference, BioCAS 2018,
                  Cleveland, OH, USA, October 17-19, 2018},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/BIOCAS.2018.8584810},
  doi          = {10.1109/BIOCAS.2018.8584810},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/biocas/LiYCHWLLHHLCT18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChenLLHLYXYCCHK18,
  author       = {Wei{-}Hao Chen and
                  Kai{-}Xiang Li and
                  Wei{-}Yu Lin and
                  Kuo{-}Hsiang Hsu and
                  Pin{-}Yi Li and
                  Cheng{-}Han Yang and
                  Cheng{-}Xin Xue and
                  En{-}Yu Yang and
                  Yen{-}Kai Chen and
                  Yun{-}Sheng Chang and
                  Tzu{-}Hsiang Hsu and
                  Ya{-}Chin King and
                  Chorng{-}Jung Lin and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns
                  multiply-and-accumulate for binary {DNN} {AI} edge processors},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {494--496},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310400},
  doi          = {10.1109/ISSCC.2018.8310400},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChenLLHLYXYCCHK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HsiehH18,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4V 13b 270kS/S {SAR-ISDM} {ADC} with an opamp-less time-domain
                  integrator},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {240--242},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310273},
  doi          = {10.1109/ISSCC.2018.8310273},
  timestamp    = {Wed, 14 Mar 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/HsiehH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChangH17,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A Hybrid Analog-to-Digital Conversion Algorithm With Sub-Radix and
                  Multiple Quantization Thresholds},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {64-I},
  number       = {6},
  pages        = {1400--1408},
  year         = {2017},
  url          = {https://doi.org/10.1109/TCSI.2016.2561758},
  doi          = {10.1109/TCSI.2016.2561758},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/ChangH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LinH17,
  author       = {Jin{-}Yi Lin and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.3 {V} 10-bit {SAR} {ADC} With First 2-bit Guess in 90-nm {CMOS}},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {64-I},
  number       = {3},
  pages        = {562--572},
  year         = {2017},
  url          = {https://doi.org/10.1109/TCSI.2016.2613505},
  doi          = {10.1109/TCSI.2016.2613505},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LinH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KaoHH17,
  author       = {Chen{-}Che Kao and
                  Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5 {V} 12-bit {SAR} {ADC} using adaptive timedomain comparator
                  with noise optimization},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
                  Korea (South), November 6-8, 2017},
  pages        = {213--216},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ASSCC.2017.8240254},
  doi          = {10.1109/ASSCC.2017.8240254},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/KaoHH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiaoLH17,
  author       = {Ting Liao and
                  Nien{-}An Lee and
                  Chih{-}Cheng Hsieh},
  title        = {A {CMOS} time of flight {(TOF)} depth image sensor with in-pixel background
                  cancellation and sensitivity improvement using phase shifting readout
                  technique},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
                  Korea (South), November 6-8, 2017},
  pages        = {133--136},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ASSCC.2017.8240234},
  doi          = {10.1109/ASSCC.2017.8240234},
  timestamp    = {Fri, 05 Jan 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asscc/LiaoLH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesensors/HsuH17,
  author       = {Tzu{-}Hsiang Hsu and
                  Chih{-}Cheng Hsieh},
  title        = {A {CMOS} imaging platform using single photon avalanche diode array
                  in standard technology},
  booktitle    = {2017 {IEEE} SENSORS, Glasgow, United Kingdom, October 29 - November
                  1, 2017},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ICSENS.2017.8234040},
  doi          = {10.1109/ICSENS.2017.8234040},
  timestamp    = {Sun, 12 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ieeesensors/HsuH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChenCH16,
  author       = {Yan{-}Jiun Chen and
                  Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 2.02-5.16 fJ/Conversion Step 10 Bit Hybrid Coarse-Fine {SAR} {ADC}
                  With Time-Domain Quantizer in 90 nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {51},
  number       = {2},
  pages        = {357--364},
  year         = {2016},
  url          = {https://doi.org/10.1109/JSSC.2015.2492781},
  doi          = {10.1109/JSSC.2015.2492781},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChenCH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChiouH16,
  author       = {Albert Yen{-}Chih Chiou and
                  Chih{-}Cheng Hsieh},
  title        = {A 137 dB Dynamic Range and 0.32 {V} Self-Powered {CMOS} Imager With
                  Energy Harvesting Pixels},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {51},
  number       = {11},
  pages        = {2769--2776},
  year         = {2016},
  url          = {https://doi.org/10.1109/JSSC.2016.2596765},
  doi          = {10.1109/JSSC.2016.2596765},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChiouH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HsiehH16,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.3-V 0.705-fJ/Conversion-Step 10-bit {SAR} {ADC} With a Shifted
                  Monotonic Switching Procedure in 90-nm {CMOS}},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {63-II},
  number       = {12},
  pages        = {1171--1175},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSII.2016.2605139},
  doi          = {10.1109/TCSII.2016.2605139},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/HsiehH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LeeLH16,
  author       = {Pei{-}Chen Lee and
                  Jin{-}Yi Lin and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4 {V} 1.94 fJ/conversion-step 10 bit 750 kS/s {SAR} {ADC} with
                  Input-Range-Adaptive Switching},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {63-I},
  number       = {12},
  pages        = {2149--2157},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSI.2016.2617879},
  doi          = {10.1109/TCSI.2016.2617879},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LeeLH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChangH16,
  author       = {Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh},
  title        = {A 12 bit 150 MS/s 1.5 mW {SAR} {ADC} with adaptive radix {DAC} in
                  40 nm {CMOS}},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
                  Japan, November 7-9, 2016},
  pages        = {157--160},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASSCC.2016.7844159},
  doi          = {10.1109/ASSCC.2016.7844159},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ChangH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChiouHPKH16,
  author       = {Albert Yen{-}Chih Chiou and
                  Sung{-}En Hsieh and
                  Yan{-}Quan Pan and
                  Chia{-}Chi Kuo and
                  Chih{-}Cheng Hsieh},
  title        = {An integrated {CMOS} optical sensing chip for multiple bio-signal
                  detections},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
                  Japan, November 7-9, 2016},
  pages        = {197--200},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASSCC.2016.7844169},
  doi          = {10.1109/ASSCC.2016.7844169},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ChiouHPKH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LiuHLC16,
  author       = {Kuan{-}Lin Liu and
                  Chih{-}Cheng Hsieh and
                  Sheng{-}Yeh Lai and
                  Chin{-}Fong Chiu},
  title        = {A time delay multiple integration linear {CMOS} image sensor for multispectral
                  satellite telemetry},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
                  Japan, November 7-9, 2016},
  pages        = {37--40},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASSCC.2016.7844129},
  doi          = {10.1109/ASSCC.2016.7844129},
  timestamp    = {Wed, 24 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/LiuHLC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/biocas/ChouCCCTSHCYCT16,
  author       = {Ting{-}I Chou and
                  Shih{-}Wen Chiu and
                  Kwuang{-}Han Chang and
                  Yi{-}Ju Chen and
                  Chen{-}Ting Tang and
                  Chung{-}Hung Shih and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Chia{-}Hsiang Yang and
                  Herming Chiueh and
                  Kea{-}Tiong Tang},
  title        = {Design of a 0.5 {V} 1.68mW nose-on-a-chip for rapid screen of chronic
                  obstructive pulmonary disease},
  booktitle    = {{IEEE} Biomedical Circuits and Systems Conference, BioCAS 2016, Shanghai,
                  China, October 17-19, 2016},
  pages        = {592--595},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/BioCAS.2016.7833864},
  doi          = {10.1109/BIOCAS.2016.7833864},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/biocas/ChouCCCTSHCYCT16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csedu/LuHLHC16,
  author       = {Shih{-}yun Lu and
                  Wei{-}Her Hsieh and
                  Chih{-}Cheng Lo and
                  Yi{-}Zeng Hsieh and
                  Tsai{-}Cheng Chang},
  editor       = {James Onohuome Uhomoibhi and
                  Gennaro Costagliola and
                  Susan Zvacek and
                  Bruce M. McLaren},
  title        = {The Effectiveness of e-Portfolios for Enhancing College Freshmen's
                  Reflection and Aesthetic Literacy},
  booktitle    = {{CSEDU} 2016 - Proceedings of the 8th International Conference on
                  Computer Supported Education, Volume 1, Rome, Italy, April 21-23,
                  2016},
  pages        = {421--425},
  publisher    = {SciTePress},
  year         = {2016},
  url          = {https://doi.org/10.5220/0005860104210425},
  doi          = {10.5220/0005860104210425},
  timestamp    = {Tue, 11 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/csedu/LuHLHC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesensors/YenLYLCCCH16,
  author       = {Pei{-}Wen Yen and
                  Yan{-}Rung Lin and
                  Sheng{-}Min Yu and
                  Shiu{-}Cheng Lou and
                  Kai{-}Ping Chuang and
                  Bor{-}Nian Chuang and
                  Albert Yen{-}Chih Chiou and
                  Chih{-}Cheng Hsieh},
  title        = {A hybrid CMOS-imager with perovskites as photoactive layer},
  booktitle    = {2016 {IEEE} SENSORS, Orlando, FL, USA, October 30 - November 3, 2016},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ICSENS.2016.7808480},
  doi          = {10.1109/ICSENS.2016.7808480},
  timestamp    = {Wed, 28 Dec 2022 14:09:32 +0100},
  biburl       = {https://dblp.org/rec/conf/ieeesensors/YenLYLCCCH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiehH16,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.3V 0.705fJ/conversion-step 10-bit {SAR} {ADC} with shifted monotonie
                  switching scheme in 90nm {CMOS}},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
                  Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
  pages        = {2899},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISCAS.2016.7539202},
  doi          = {10.1109/ISCAS.2016.7539202},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiehH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeKH16,
  author       = {Pei{-}Chen Lee and
                  Chen{-}Che Kao and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4V 1.94fJ/conversion-step 10b 750kS/s {SAR} {ADC} with input-range-adaptive
                  switching},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
                  Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
  pages        = {1042--1045},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISCAS.2016.7527422},
  doi          = {10.1109/ISCAS.2016.7527422},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeKH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HsiehH16,
  author       = {Sung{-}En Hsieh and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.44fJ/conversion-step 11b 600KS/s {SAR} {ADC} with semi-resting
                  {DAC}},
  booktitle    = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
                  HI, USA, June 15-17, 2016},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/VLSIC.2016.7573519},
  doi          = {10.1109/VLSIC.2016.7573519},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/HsiehH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LinH15,
  author       = {Jin{-}Yi Lin and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.3 {V} 10-bit 1.17 f {SAR} {ADC} With Merge and Split Switching
                  in 90 nm {CMOS}},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {62-I},
  number       = {1},
  pages        = {70--79},
  year         = {2015},
  url          = {https://doi.org/10.1109/TCSI.2014.2349571},
  doi          = {10.1109/TCSI.2014.2349571},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/LinH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/KuoH15,
  author       = {Chia{-}Chi Kuo and
                  Chih{-}Cheng Hsieh},
  title        = {A 132dB {DR} readout {IC} with pulse width modulation for {IR} focal
                  plane arrays},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2015, Xia'men,
                  China, November 9-11, 2015},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ASSCC.2015.7387502},
  doi          = {10.1109/ASSCC.2015.7387502},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/KuoH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiehHH15,
  author       = {Sung{-}En Hsieh and
                  Cheng{-}Kang Ho and
                  Chih{-}Cheng Hsieh},
  title        = {A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid {SAR} {ADC} with
                  time-to-digital converter},
  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2015, Lisbon, Portugal, May 24-27, 2015},
  pages        = {2429--2432},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCAS.2015.7169175},
  doi          = {10.1109/ISCAS.2015.7169175},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiehHH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinCKLCLCYH15,
  author       = {Jin{-}Yi Lin and
                  Kwuang{-}Han Chang and
                  Chen{-}Che Kao and
                  Shih{-}Chin Lo and
                  Yan{-}Jiun Chen and
                  Pei{-}Chen Lee and
                  Chi{-}Hui Chen and
                  Chin Yin and
                  Chih{-}Cheng Hsieh},
  title        = {An 8-bit column-shared {SAR} {ADC} for {CMOS} image sensor applications},
  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2015, Lisbon, Portugal, May 24-27, 2015},
  pages        = {301--304},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCAS.2015.7168630},
  doi          = {10.1109/ISCAS.2015.7168630},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LinCKLCLCYH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/HuangCH15,
  author       = {Zheng{-}Wei Huang and
                  Chin{-}Fong Chiu and
                  Chih{-}Cheng Hsieh},
  title        = {An in-pixel equalizer with kTC noise cancellation and {FPN} reduction
                  for time-of-flight {CMOS} image sensor},
  booktitle    = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan,
                  April 27-29, 2015},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSI-DAT.2015.7114520},
  doi          = {10.1109/VLSI-DAT.2015.7114520},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/HuangCH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChiouH15,
  author       = {Albert Yen{-}Chih Chiou and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4V self-powered {CMOS} imager with 140dB dynamic range and energy
                  harvesting},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
                  2015},
  pages        = {86},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSIC.2015.7231333},
  doi          = {10.1109/VLSIC.2015.7231333},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/ChiouH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/ChiuWCCWCTCSKWCHCLCYCST14,
  author       = {Shih{-}Wen Chiu and
                  Jen{-}Huo Wang and
                  Kwuang{-}Han Chang and
                  Ting{-}Hau Chang and
                  Chia{-}Min Wang and
                  Chia{-}Lin Chang and
                  Chen{-}Ting Tang and
                  Chien{-}Fu Chen and
                  Chung{-}Hung Shih and
                  Han{-}Wen Kuo and
                  Li{-}Chun Wang and
                  Hsin Chen and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Yi{-}Wen Liu and
                  Tsan{-}Jieh Chen and
                  Chia{-}Hsiang Yang and
                  Herming Chiueh and
                  Jyuo{-}Min Shyu and
                  Kea{-}Tiong Tang},
  title        = {A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated
                  Pneumonia},
  journal      = {{IEEE} Trans. Biomed. Circuits Syst.},
  volume       = {8},
  number       = {6},
  pages        = {765--778},
  year         = {2014},
  url          = {https://doi.org/10.1109/TBCAS.2014.2377754},
  doi          = {10.1109/TBCAS.2014.2377754},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tbcas/ChiuWCCWCTCSKWCHCLCYCST14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TangCSCYYWHCCHC14,
  author       = {Kea{-}Tiong Tang and
                  Shih{-}Wen Chiu and
                  Chung{-}Hung Shih and
                  Chia{-}Ling Chang and
                  Chia{-}Min Yang and
                  Da{-}Jeng Yao and
                  Jen{-}Huo Wang and
                  Chien{-}Ming Huang and
                  Hsin Chen and
                  Kwuang{-}Han Chang and
                  Chih{-}Cheng Hsieh and
                  Ting{-}Hau Chang and
                  Meng{-}Fan Chang and
                  Chia{-}Min Wang and
                  Yi{-}Wen Liu and
                  Tsan{-}Jieh Chen and
                  Chia{-}Hsiang Yang and
                  Herming Chiueh and
                  Jyuo{-}Min Shyu},
  title        = {24.5 {A} 0.5V 1.27mW nose-on-a-chip for rapid diagnosis of ventilator-associated
                  pneumonia},
  booktitle    = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
                  {ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
                  February 9-13, 2014},
  pages        = {420--421},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISSCC.2014.6757496},
  doi          = {10.1109/ISSCC.2014.6757496},
  timestamp    = {Mon, 04 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/TangCSCYYWHCCHC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/ChiuWCWCHCWT14,
  author       = {Shih{-}Wen Chiu and
                  Jen{-}Huo Wang and
                  Kwuang{-}Han Chang and
                  Hsiang{-}Chiu Wu and
                  Hsin Chen and
                  Chih{-}Cheng Hsieh and
                  Meng{-}Fan Chang and
                  Guoxing Wang and
                  Kea{-}Tiong Tang},
  title        = {A signal acquisition and processing chip with built-in cluster for
                  chemiresistive gas sensor array},
  booktitle    = {{IEEE} 12th International New Circuits and Systems Conference, {NEWCAS}
                  2014, Trois-Rivieres, QC, Canada, June 22-25, 2014},
  pages        = {428--431},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/NEWCAS.2014.6934074},
  doi          = {10.1109/NEWCAS.2014.6934074},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/newcas/ChiuWCWCHCWT14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/LinHLC14,
  author       = {Chih{-}Hao Lin and
                  Chih{-}Cheng Hsieh and
                  Che{-}Chun Lin and
                  Ren{-}Jr Chen},
  title        = {A dual-mode {CMOS} image sensor for optical wireless communication},
  booktitle    = {Technical Papers of 2014 International Symposium on {VLSI} Design,
                  Automation and Test, {VLSI-DAT} 2014, Hsinchu, Taiwan, April 28-30,
                  2014},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSI-DAT.2014.6834892},
  doi          = {10.1109/VLSI-DAT.2014.6834892},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/LinHLC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ChenH14,
  author       = {Yan{-}Jiun Chen and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.4V 2.02fJ/conversion-step 10-bit hybrid {SAR} {ADC} with time-domain
                  quantizer in 90nm {CMOS}},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2014, Digest of Technical Papers,
                  Honolulu, HI, USA, June 10-13, 2014},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/VLSIC.2014.6858372},
  doi          = {10.1109/VLSIC.2014.6858372},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/ChenH14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChungLYH13,
  author       = {Meng{-}Ting Chung and
                  Chin{-}Lin Lee and
                  Chin Yin and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5 {V} {PWM} {CMOS} Imager With 82 dB Dynamic Range and 0.055{\%}
                  Fixed-Pattern-Noise},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {10},
  pages        = {2522--2530},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2013.2269857},
  doi          = {10.1109/JSSC.2013.2269857},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChungLYH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YehHY13,
  author       = {Shang{-}Fu Yeh and
                  Chih{-}Cheng Hsieh and
                  Ka{-}Yi Yeh},
  title        = {A 3 Megapixel 100 Fps 2.8 {\(\mathrm{\mu}\)}m Pixel Pitch {CMOS} Image
                  Sensor Layer With Built-in Self-Test for 3D Integrated Imagers},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {3},
  pages        = {839--849},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2012.2233331},
  doi          = {10.1109/JSSC.2012.2233331},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/YehHY13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeHB13,
  author       = {Chi{-}Ying Lee and
                  Chih{-}Cheng Hsieh and
                  Jenn{-}Chyou Bor},
  title        = {2.4-GHz 10-Mb/s {BFSK} Embedded Transmitter With a Stacked-LC {DCO}
                  for Wireless Testing Systems},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {21},
  number       = {9},
  pages        = {1727--1737},
  year         = {2013},
  url          = {https://doi.org/10.1109/TVLSI.2012.2217765},
  doi          = {10.1109/TVLSI.2012.2217765},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LeeHB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LiouH13,
  author       = {Chang{-}Yuan Liou and
                  Chih{-}Cheng Hsieh},
  title        = {A 2.4-to-5.2fJ/conversion-step 10b 0.5-to-4MS/s {SAR} {ADC} with charge-average
                  switching {DAC} in 90nm {CMOS}},
  booktitle    = {2013 {IEEE} International Solid-State Circuits Conference - Digest
                  of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
                  17-21, 2013},
  pages        = {280--281},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSCC.2013.6487735},
  doi          = {10.1109/ISSCC.2013.6487735},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/LiouH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/YinH13,
  author       = {Chin Yin and
                  Chih{-}Cheng Hsieh},
  title        = {A 1V 14kfps smart {CMOS} imager with tracking and edge-detection modes
                  for biomedical monitoring},
  booktitle    = {2013 International Symposium on {VLSI} Design, Automation, and Test,
                  {VLSI-DAT} 2013, Hsinchu, Taiwan, April 22-24, 2013},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/VLDI-DAT.2013.6533834},
  doi          = {10.1109/VLDI-DAT.2013.6533834},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/YinH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChenH12,
  author       = {Wei{-}Lin Chen and
                  Chih{-}Cheng Hsieh},
  title        = {Exploration of Second-Order Effects in High-Performance Continuous-Time
                  {\(\Sigma\)}{\(\Delta\)} Modulators Using Discrete-Time Models},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {59-I},
  number       = {12},
  pages        = {2890--2900},
  year         = {2012},
  url          = {https://doi.org/10.1109/TCSI.2012.2206436},
  doi          = {10.1109/TCSI.2012.2206436},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/ChenH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangLHCTC12,
  author       = {Hsin{-}Yuan Huang and
                  Jin{-}Yi Lin and
                  Chih{-}Cheng Hsieh and
                  Wen{-}Hsu Chang and
                  Hann{-}Huei Tsai and
                  Chin{-}Fong Chiu},
  title        = {A 9.2b 47fJ/conversion-step asynchronous {SAR} {ADC} with input range
                  prediction {DAC} switching},
  booktitle    = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2012, Seoul, Korea (South), May 20-23, 2012},
  pages        = {2353--2356},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISCAS.2012.6271768},
  doi          = {10.1109/ISCAS.2012.6271768},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangLHCTC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChungH12,
  author       = {Meng{-}Ting Chung and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.5V 4.95{\(\mu\)}W 11.8fps {PWM} {CMOS} imager with 82dB dynamic
                  range and 0.055{\%} fixed-pattern noise},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {114--116},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176942},
  doi          = {10.1109/ISSCC.2012.6176942},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChungH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/ChengYHCTC12,
  author       = {Kuo{-}Wei Cheng and
                  Chin Yin and
                  Chih{-}Cheng Hsieh and
                  Wen{-}Hsu Chang and
                  Hann{-}Huei Tsai and
                  Chin{-}Fong Chiu},
  title        = {Time-delay integration readout with adjacent pixel signal transfer
                  for {CMOS} image sensor},
  booktitle    = {Proceedings of Technical Program of 2012 {VLSI} Design, Automation
                  and Test, {VLSI-DAT} 2012, Hsinchu, Taiwan, April 23-25, 2012},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/VLSI-DAT.2012.6212600},
  doi          = {10.1109/VLSI-DAT.2012.6212600},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/ChengYHCTC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/TangCCHS11,
  author       = {Kea{-}Tiong Tang and
                  Shih{-}Wen Chiu and
                  Meng{-}Fan Chang and
                  Chih{-}Cheng Hsieh and
                  Jyuo{-}Min Shyu},
  title        = {A Low-Power Electronic Nose Signal-Processing Chip for a Portable
                  Artificial Olfaction System},
  journal      = {{IEEE} Trans. Biomed. Circuits Syst.},
  volume       = {5},
  number       = {4},
  pages        = {380--390},
  year         = {2011},
  url          = {https://doi.org/10.1109/TBCAS.2011.2116786},
  doi          = {10.1109/TBCAS.2011.2116786},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tbcas/TangCCHS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/LeeH11,
  author       = {Chin{-}Lin Lee and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.8V 64{\texttimes}64 {CMOS} imager with integrated sense-and-stimulus
                  pixel for artificial retina applications},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2011, Jeju,
                  South Korea, November 14-16, 2011},
  pages        = {193--196},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ASSCC.2011.6123635},
  doi          = {10.1109/ASSCC.2011.6123635},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/LeeH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/YehLHYL11,
  author       = {Shang{-}Fu Yeh and
                  Jin{-}Yi Lin and
                  Chih{-}Cheng Hsieh and
                  Ka{-}Yi Yeh and
                  Chung{-}Chi Jim Li},
  editor       = {Rakesh Patel and
                  Tom Andre and
                  Aurangzeb Khan},
  title        = {A new {CMOS} image sensor readout structure for 3D integrated imagers},
  booktitle    = {2011 {IEEE} Custom Integrated Circuits Conference, {CICC} 2011, San
                  Jose, CA, USA, Sept. 19-21, 2011},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/CICC.2011.6055381},
  doi          = {10.1109/CICC.2011.6055381},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/YehLHYL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenWCHYCJTC11,
  author       = {Tsan{-}Jieh Chen and
                  Chih{-}Hui Weng and
                  Herming Chiueh and
                  Chih{-}Cheng Hsieh and
                  Shang{-}Fu Yeh and
                  Wen{-}Hsu Chang and
                  Ying{-}Zong Juang and
                  Hann{-}Huei Tsai and
                  Chin{-}Fong Chiu},
  title        = {Live demonstration: The prototype of real-time image pre-processing
                  system for satellites' remote sensing},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
                  15-19 2011, Rio de Janeiro, Brazil},
  pages        = {1992--1996},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISCAS.2011.5937985},
  doi          = {10.1109/ISCAS.2011.5937985},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChenWCHYCJTC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeH11,
  author       = {Chin{-}Lin Lee and
                  Chih{-}Cheng Hsieh},
  title        = {A 0.6V {CMOS} Image Sensor with in-pixel biphasic current driver for
                  biomedical application},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
                  15-19 2011, Rio de Janeiro, Brazil},
  pages        = {1455--1458},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISCAS.2011.5937848},
  doi          = {10.1109/ISCAS.2011.5937848},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChinHCT10,
  author       = {Sung{-}Min Chin and
                  Chih{-}Cheng Hsieh and
                  Chin{-}Fong Chiu and
                  Hann{-}Huei Tsai},
  title        = {A new rail-to-rail comparator with adaptive power control for low
                  power {SAR} ADCs in biomedical application},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {1575--1578},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537421},
  doi          = {10.1109/ISCAS.2010.5537421},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChinHCT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiehCW09,
  author       = {Chih{-}Cheng Hsieh and
                  Wei{-}Yu Chen and
                  Chung{-}Yu Wu},
  title        = {A High Performance Linear Current Mode Image Sensor},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
                  May 2009, Taipei, Taiwan},
  pages        = {1273--1276},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISCAS.2009.5117995},
  doi          = {10.1109/ISCAS.2009.5117995},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HsiehCW09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/igarss/KuoHCH06,
  author       = {Bor{-}Chen Kuo and
                  Chih{-}Cheng Hung and
                  Ming{-}Hung Chi and
                  Tien{-}Yu Hsieh},
  title        = {A Comparison of Hierarchical Classification Processes Based on Hyperspectral
                  Image},
  booktitle    = {{IEEE} International Geoscience {\&} Remote Sensing Symposium,
                  {IGARSS} 2006, July 31 - August 4, 2006, Denver, Colorado, USA, Proceedings},
  pages        = {948--951},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/IGARSS.2006.244},
  doi          = {10.1109/IGARSS.2006.244},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/igarss/KuoHCH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsiehWSJC98,
  author       = {Chih{-}Cheng Hsieh and
                  Chung{-}Yu Wu and
                  Tai{-}Ping Sun and
                  Far{-}Wen Jih and
                  Ya{-}Tung Cherng},
  title        = {High-performance {CMOS} buffered gate modulation input {(BGMI)} readout
                  circuits for {IR} {FPA}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {33},
  number       = {8},
  pages        = {1188--1198},
  year         = {1998},
  url          = {https://doi.org/10.1109/4.705357},
  doi          = {10.1109/4.705357},
  timestamp    = {Tue, 05 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsiehWSJC98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsiehWS97,
  author       = {Chih{-}Cheng Hsieh and
                  Chung{-}Yu Wu and
                  Tai{-}Ping Sun},
  title        = {A new cryogenic {CMOS} readout structure for infrared focal plane
                  array},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {32},
  number       = {8},
  pages        = {1192--1199},
  year         = {1997},
  url          = {https://doi.org/10.1109/4.604075},
  doi          = {10.1109/4.604075},
  timestamp    = {Thu, 07 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HsiehWS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/HsiehWJS97,
  author       = {Chih{-}Cheng Hsieh and
                  Chung{-}Yu Wu and
                  Far{-}Wen Jih and
                  Tai{-}Ping Sun},
  title        = {Focal-plane-arrays and {CMOS} readout techniques of infrared imaging
                  systems},
  journal      = {{IEEE} Trans. Circuits Syst. Video Technol.},
  volume       = {7},
  number       = {4},
  pages        = {594--605},
  year         = {1997},
  url          = {https://doi.org/10.1109/76.611171},
  doi          = {10.1109/76.611171},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcsv/HsiehWJS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}