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@article{DBLP:journals/jssc/JakonisFDES05,
  author       = {Darius Jakonis and
                  Kalle Folkesson and
                  Jerzy J. D{\k{a}}browski and
                  Patrik Eriksson and
                  Christer Svensson},
  title        = {A 2.4-GHz {RF} sampling receiver front-end in 0.18-{\(\mu\)}m {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {40},
  number       = {6},
  pages        = {1265--1277},
  year         = {2005},
  url          = {https://doi.org/10.1109/JSSC.2005.848027},
  doi          = {10.1109/JSSC.2005.848027},
  timestamp    = {Mon, 14 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/JakonisFDES05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/FolkessonSKD05,
  author       = {Kalle Folkesson and
                  Christer Svensson and
                  B. Knuthammar and
                  A. Dreyfert},
  title        = {A high-level dynamic-error model of a pipelined analog-to-digital
                  converter},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {5625--5628},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465913},
  doi          = {10.1109/ISCAS.2005.1465913},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FolkessonSKD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/socc/FolkessonS04,
  author       = {Kalle Folkesson and
                  Christer Svensson},
  title        = {Robust multi-phase clock generation with reduced jitter},
  booktitle    = {Proceedings 2004 {IEEE} International {SOC} Conference, September
                  12-15, 2004, Hilton Santa Clara, CA, {USA}},
  pages        = {167--168},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/SOCC.2004.1362393},
  doi          = {10.1109/SOCC.2004.1362393},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/FolkessonS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/ElbornssonFE02,
  author       = {Jonas Elbornsson and
                  Kalle Folkesson and
                  Jan{-}Erik Eklund},
  title        = {Measurement verification of estimation method for time errors in a
                  time-interleaved {A/D} converter system},
  booktitle    = {Proceedings of the 2002 International Symposium on Circuits and Systems,
                  {ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
  pages        = {129--132},
  publisher    = {{IEEE}},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISCAS.2002.1010177},
  doi          = {10.1109/ISCAS.2002.1010177},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ElbornssonFE02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/FolkessonSE01,
  author       = {Kalle Folkesson and
                  Christer Svensson and
                  Jan{-}Erik Eklund},
  title        = {Modeling of dynamic errors in algorithmic {A/D} converters},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {455--458},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922083},
  doi          = {10.1109/ISCAS.2001.922083},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/FolkessonSE01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}