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export results for "Layout-Driven SOC Test Architecture Design for Test Time and Wire Length Minimization."

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@inproceedings{DBLP:conf/date/GoelM03,
  author       = {Sandeep Kumar Goel and
                  Erik Jan Marinissen},
  title        = {Layout-Driven {SOC} Test Architecture Design for Test Time and Wire
                  Length Minimization},
  booktitle    = {2003 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2003), 3-7 March 2003, Munich, Germany},
  pages        = {10738--10741},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10171},
  doi          = {10.1109/DATE.2003.10171},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/GoelM03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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