Search dblp for Publications

export results for "Low Power 16 x 16 Bit Multiplier Design Using PAL-2N Logic Family."

 download as .bib file

@article{DBLP:journals/jcsc/WongL02,
  author       = {H. H. Wong and
                  K. T. Lau},
  title        = {Low Power 16 x 16 Bit Multiplier Design Using {PAL-2N} Logic Family},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {11},
  number       = {2},
  pages        = {155--164},
  year         = {2002},
  url          = {https://doi.org/10.1142/S021812660200032X},
  doi          = {10.1142/S021812660200032X},
  timestamp    = {Tue, 25 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/WongL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.