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export results for "Performance and Timing Yield Enhancement using Highway-on-Chip Planning."

 download as .bib file

@inproceedings{DBLP:conf/dsd/JahanianZ08,
  author       = {Ali Jahanian and
                  Morteza Saheb Zamani},
  editor       = {Luca Fanucci},
  title        = {Performance and Timing Yield Enhancement using Highway-on-Chip Planning},
  booktitle    = {11th Euromicro Conference on Digital System Design: Architectures,
                  Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
  pages        = {165--172},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/DSD.2008.116},
  doi          = {10.1109/DSD.2008.116},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/JahanianZ08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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