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@article{DBLP:journals/ieicet/YoshimuraINYSN11,
  author       = {Kazuhiro Yoshimura and
                  Takuya Iwakami and
                  Takashi Nakada and
                  Jun Yao and
                  Hajime Shimada and
                  Yasuhiko Nakashima},
  title        = {An Instruction Mapping Scheme for {FU} Array Accelerator},
  journal      = {{IEICE} Trans. Inf. Syst.},
  volume       = {94-D},
  number       = {2},
  pages        = {286--297},
  year         = {2011},
  url          = {https://doi.org/10.1587/transinf.E94.D.286},
  doi          = {10.1587/TRANSINF.E94.D.286},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/YoshimuraINYSN11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/DevisettiIYNYN11,
  author       = {Naveen Devisetti and
                  Takuya Iwakami and
                  Kazuhiro Yoshimura and
                  Takashi Nakada and
                  Jun Yao and
                  Yasuhiko Nakashima},
  title        = {{LAPP:} {A} Low Power Array Accelerator with Binary Compatibility},
  booktitle    = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
                  {IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
  pages        = {854--862},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/IPDPS.2011.223},
  doi          = {10.1109/IPDPS.2011.223},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/DevisettiIYNYN11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}