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Publication search results
found 14 matches
- 2016
- Kazuaki Okamoto, Kazumasa Takami:
Routing Based on Information about the Routes of Fixed-Route Traveling Nodes and on Destination Areas Aimed at Reducing the Load on the DTN. Future Internet 8(2): 15 (2016) - Makoto Takamura, Hajime Okamoto, Kazuaki Furukawa, Hiroshi Yamaguchi, Hiroki Hibino:
Energy Dissipation in Graphene Mechanical Resonators with and without Free Edges. Micromachines 7(9): 158 (2016) - 2014
- Kazuaki Okamoto, Kazumasa Takami:
Configuration of an opportunistic network that incorporates traveling mobile nodes to achieve network delay-insensitive content delivery and location-dependent forwarding knowledge. ICTC 2014: 293-298 - 2009
- Tsuyoshi Ebuchi, Yoshihide Komatsu, Tatsuo Okamoto, Yukio Arima, Yuji Yamada, Kazuaki Sogawa, Kouji Okamoto, Takashi Morie, Takashi Hirata, Shiro Dosho, Takefumi Yoshikawa:
A 125-1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration. IEEE J. Solid State Circuits 44(3): 763-774 (2009) - 2006
- Shiro Dosho, Takashi Morie, Koji Okamoto, Yuji Yamada, Kazuaki Sogawa:
A -90 dBc@ 10 kHz Phase Noise Fractional-N Frequency Synthesizer with Accurate Loop Bandwidth Control Circuit. IEICE Trans. Electron. 89-C(6): 739-745 (2006) - 2000
- Tetsuo Yamada, Katsumi Ikeda, Yong-Gwan Kim, Hideki Wakoh, Tetsuo Toma, Tomohiro Sakamoto, Kazuaki Ogawa, Eiichi Okamoto, Kazuyuki Masukane, Kazuya Oda, Masafumi Inuiya:
A progressive scan CCD image sensor for DSC applications. IEEE J. Solid State Circuits 35(12): 2044-2054 (2000) - 1997
- Takashi Yokota, Hiroshi Matsuoka, Kazuaki Okamoto, Hideo Hirono, Shuichi Sakai:
Virtual control channel and its application to the massively parallel computer RWC-1. HiPC 1997: 443-448 - 1996
- Kazuaki Okamoto, Shuichi Sakai, Hiroshi Matsuoka, Takashi Yokota, Hideo Hirono:
Multithread execution mechanisms on RICA-1 for massively parallel computation. IEEE PACT 1996: 116-121 - 1995
- Shuichi Sakai, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hiroshi Matsuoka, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota:
Reduced Interprocessor-Communication Architecture and its Implementation on EM-4. Parallel Comput. 21(5): 753-769 (1995) - Takashi Yokota, Hiroshi Matsuoka, Kazuaki Okamoto, Hideo Hirono, Atsushi Hori, Shuichi Sakai:
A prototype router for the massively parallel computer RWC-1. ICCD 1995: 279-284 - Atsushi Hori, Takashi Yokota, Yutaka Ishikawa, Shuichi Sakai, Hiroki Konaka, Munenori Maeda, Takashi Tomokiyo, Jörg Nolte, Hiroshi Matsuoka, Kazuaki Okamoto, Hideo Hirono:
Time Space Sharing Scheduling and Architectural Support. JSSPP 1995: 92-105 - 1993
- Shuichi Sakai, Kazuaki Okamoto, Hiroshi Matsuoka, Hideo Hirono, Yuetsu Kodama, Mitsuhisa Sato:
Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation. International Conference on Supercomputing 1993: 251-260 - Shuichi Sakai, Hiroshi Matsuoka, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota:
RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms. SPDP 1993: 122-127 - 1992
- Kazuaki Okamoto, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Methodologies in development and testing of the dataflow machine EM-4. Parallel Comput. 18(8): 901-912 (1992)
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