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Publication search results
found 15 matches
- 2023
- Dongwon You, Xi Fu, Xiaolin Wang, Yuan Gao, Wenqian Wang, Jun Sakamaki, Hans Herdian, Sena Kato, Michihiro Ide, Yuncheng Zhang, Ashbir Aviat Fadila, Zheng Li, Chun Wang, Yun Wang, Jumpei Sudo, Makoto Higaki, Nahoka Kawaguchi, Masaya Nitta, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane:
A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler. ISSCC 2023: 298-299 - 2018
- Atsushi Nose, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Masatsugu Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Yoshikazu Nitta, Masatoshi Ishikawa:
Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs. Sensors 18(5): 1313 (2018) - 2015
- Kenichi Karatsu, Satoru Mima, Shugo Oguri, Jihoon Choi, R. M. Thushara Damayanthi, Agnes Dominjon, Noboru Furukawa, Hirokazu Ishino, Hikaru Ishitsuka, Atsuko Kibayashi, Yoshiaki Kibe, Hitoshi Kiuchi, Kensuke Koga, Masato Naruse, Tom Nitta, Takashi Noguchi, Takashi Okada, Chiko Otani, Shigeyuki Sekiguchi, Yutaro Sekimoto, Masakazu Sekine, Shibo Shu, Osamu Tajima, Kenta Takahashi, Nozomu Tomita, Hiroki Watanabe, Mitsuhiro Yoshida:
Development of Microwave Kinetic Inductance Detector for Cosmological Observations. IEICE Trans. Electron. 98-C(3): 207-218 (2015) - 2014
- Kenichi Hatasako, Tetsuya Nitta, Masami Hane, Shigeto Maegawa:
Past and Future Technology for Mixed Signal LSI. IEICE Trans. Electron. 97-C(4): 238-244 (2014) - 2013
- Takahiro Shioyama, Akane Suzuki, Kenichi Nomura, Naoki Shigaki, Hirotsugu Kubo, Sunako Takeda, Shinji Yamamori, Takashi Maruyama, Hiroshi Iseki, Takashi Komori, Masayuki Nitta, Takashi Sakayori, Yoshihiro Muragaki:
Fully automatic rapid DNA Ploidy Analyzer for intraoperative rapid diagnosis support. EMBC 2013: 906-909 - 2009
- Masayuki Ito, Kenichi Nitta, Koji Ohno, Masahito Saigusa, Masaki Nishida, Shinichi Yoshioka, Takahiro Irita, Takao Koike, Tatsuya Kamei, Teruyoshi Komuro, Toshihiro Hattori, Yasuhiro Arai, Yukio Kodama:
A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU. IEEE J. Solid State Circuits 44(1): 83-89 (2009) - Tatsuya Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Ito, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, Shinichi Yoshioka:
A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management. ASP-DAC 2009: 535-539 - 2008
- Norihiro Sugita, Makoto Yoshizawa, Akira Tanaka, Kenichi Abe, Shigeru Chiba, Tomoyuki Yambe, Shin-ichi Nitta:
Quantitative evaluation of effects of visually-induced motion sickness based on causal coherence functions between blood pressure and heart rate. Displays 29(2): 167-175 (2008) - Masao Naruse, Tatsuya Kamei, Toshihiro Hattori, Takahiro Irita, Kenichi Nitta, Takao Koike, Shinichi Yoshioka, Koji Ohno, Masahito Saigusa, Minoru Sakata, Yukio Kodama, Yuji Arai, Teruyoshi Komuro:
A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU. ISSCC 2008: 260-261 - 2007
- Makoto Saen, Kenichi Osada, Satoshi Misaka, Tetsuya Yamada, Yoshitaka Tsujimoto, Yuki Kondo, Tatsuya Kamei, Yutaka Yoshida, Ei Nagahama, Yusuke Nitta, Takayasu Ito, Tadashi Kameyama, Naohiko Irie:
Embedded SoC Resource Manager to Control Temperature and Data Bandwidth. ISSCC 2007: 296-604 - 2006
- Daisuke Ogawa, Akira Tanaka, Kenichi Abe, Paul Olegario, Koichiro Kasahara, Yasuyuki Shiraishi, Kazumitsu Sekine, Tomoyuki Yambe, Shin-ichi Nitta, Makoto Yoshizawa:
Evaluation of cardiac function based on ventricular pressure-volume relationships during assistance with a rotary blood pump. EMBC 2006: 5378-5381 - 1997
- Raminder Singh Bajwa, Mitsuru Hiraki, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Koichi Seki, Katsuro Sasaki:
Instruction buffering to reduce power in processors for signal processing. IEEE Trans. Very Large Scale Integr. Syst. 5(4): 417-424 (1997) - 1996
- Narumi Sakashita, Yasuhiko Nitta, Ken'ichi Shimomura, Fumihiro Okuda, Hiroki Shimano, Satoshi Yamakawa, Masaki Tsukude, Kazutami Arimoto, Shinji Baba, Shinji Komori, Kazuo Kyuma, Akihiko Yasuoka, Haruhiko Abe:
A 1.6-GB/s data-rate 1-Gb synchronous DRAM with hierarchical square-shaped memory block and distributed bank architecture. IEEE J. Solid State Circuits 31(11): 1645-1655 (1996) - Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Katsuro Sasaki, Koichi Seki:
Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer. ISLPED 1996: 353-358 - 1993
- Kazuo Nakamura, Narumi Sakashita, Yasuhiko Nitta, Ken'ichi Shimomura, Takeshi Tokuda:
Fuzzy inference and fuzzy inference processor. IEEE Micro 13(5): 37-48 (1993)
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retrieved on 2024-09-19 17:06 CEST from data curated by the dblp team
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