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- Khayrollah Hadidi
aka: Khairollah Hadidi, Kheyrollah Hadidi
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Publication search results
found 104 matches
- 2022
- Mehdi Ghasemzadeh, Khayrollah Hadidi:
A new background continuous-time offset cancelation and gain calibration strategy for open-loop residue amplifiers in high-speed and high-resolution ADC's. Int. J. Circuit Theory Appl. 50(12): 4202-4218 (2022) - 2021
- Mehdi Ghasemzadeh, Khayrollah Hadidi:
A New Low Power Mixed-Signal Digital Voltage Mode CMOS Fuzzy Logic Controller. Circuits Syst. Signal Process. 40(2): 738-755 (2021) - Neda Mohabbatian, Khayrollah Hadidi:
A 12-Gb/s serial link transceiver using dual-mode pulse amplitude modulation scheme in a 0.18-μm CMOS process. Int. J. Circuit Theory Appl. 49(2): 487-504 (2021) - 2020
- Amin Khalilzadegan, Mohammad Zarei, Khayrollah Hadidi:
A New Adaptive Prioritization and Fail-Over Mechanism for Ring Network Adapter. IEEE Access 8: 99070-99082 (2020) - Mohammad Zarei, Amin Khalilzadegan, Khayrollah Hadidi:
Design Analysis and Evaluation of a W-Element Model for a Twisted-Pair Cable. IEEE Access 8: 188981-188992 (2020) - Mehdi Ghasemzadeh, Khayrollah Hadidi:
A new mixed-signal CMOS fuzzy logic controller in current mode. J. Intell. Fuzzy Syst. 38(4): 5033-5044 (2020) - 2019
- Majid Mokarram, Abdollah Khoei, Khayrollah Hadidi:
A fuzzy Anti-lock braking system (ABS) controller using CMOS circuits. Microprocess. Microsystems 70: 47-52 (2019) - 2018
- Yousef Valizadeh Yaghmourali, Amir Fathi, Mina Hassanzadazar, Abdollah Khoei, Khayrollah Hadidi:
A low-power, fully programmable membership function generator using both transconductance and current modes. Fuzzy Sets Syst. 337: 128-142 (2018) - Shamim Sadrafshari, Razieh Eskandari, Khayrollah Hadidi, Abdollah Khoei:
Low-jitter spread spectrum clock generator using charge pump frequency detector in 0.18 μm CMOS for USB3.1 transceivers. IET Circuits Devices Syst. 12(1): 99-107 (2018) - Sarang Kazeminia, Khayrollah Hadidi:
A foreground-liked continuous-time offset cancellation strategy for open-loop inter-stage amplifiers in high-resolution ADCs. Integr. 61: 88-100 (2018) - Amin Chegeni, Khayrollah Hadidi, Abdollah Khoei:
A Histogram-Based Background Interstage Error Estimation and Implementation Method in Pipelined ADCs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1519-1523 (2018) - 2016
- Roozbeh Abdollahi, Khayrollah Hadidi, Abdollah Khoei:
A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1682-1689 (2016) - Seyed Pourya Hoseini Alinodehi, Sajjad Moshfe, Masoumeh Saber Zaeimian, Abdollah Khoei, Khairollah Hadidi:
High-Speed General Purpose Genetic Algorithm Processor. IEEE Trans. Cybern. 46(7): 1551-1565 (2016) - Mehdi Ghasemzadeh, Sina Mahdavi, Abolfazl Zokaei, Khayrollah Hadidi:
A new adaptive PLL to reduce the lock time in 0.18µm technology. MIXDES 2016: 140-142 - Mehdi Ghasemzadeh, Sina Mahdavi, Abolfazl Zokaei, Khayrollah Hadidi:
A new ultra high speed 5-2 compressor with a new structure. MIXDES 2016: 151-154 - Sarang Kazeminia, Sina Mahdavi, Khayrollah Hadidi:
Digitally-assisted offset cancellation technique for open loop residue amplifiers in high-resolution and high-speed ADCs. MIXDES 2016: 197-202 - Hamed Ashrafi, Morteza Mousazadeh, Khayrollah Hadidi:
An 8B/10B encoder with 2GHz operating frequency. MWSCAS 2016: 1-4 - 2015
- Majid Mokarram, Abdollah Khoei, Khayrollah Hadidi:
CMOS fuzzy logic controller supporting fractional polynomial membership functions. Fuzzy Sets Syst. 263: 112-126 (2015) - Alireza Mesri, Mahmoud Mahdipour Pirbazari, Khayrollah Hadidi, Abdollah Khoei:
High gain two-stage amplifier with positive capacitive feedback compensation. IET Circuits Devices Syst. 9(3): 181-190 (2015) - Mahmoud Mahdipour Pirbazari, Khayrollah Hadidi, Abdollah Khoei, Shamim Sadrafshari:
High speed, open loop residue amplifier with linearity improvement. IET Circuits Devices Syst. 9(4): 299-308 (2015) - Amir Fathi, Abdollah Khoei, Khayrollah Hadidi:
High Speed Min/Max Architecture Based on a Novel Comparator in 0.18-μm CMOS Process. J. Circuits Syst. Comput. 24(4): 1550048:1-1550048:17 (2015) - Sarang Kazeminia, Khayrollah Hadidi, Abdollah Khoei:
A Wide-Range Low-Jitter PLL Based on Fast-Response VCO and Simplified Straightforward Methodology of Loop Stabilization in Integer-N PLLs. J. Circuits Syst. Comput. 24(7): 1550104:1-1550104:24 (2015) - Sarang Kazeminia, Sobhan Sofimowloodi, Khayrollah Hadidi:
A 80-MHz-to-410-MHz 16-Phases DLL Based on Improved Dead-Zone Open-Loop Phase Detector and Reduced-Gain Charge Pump. J. Circuits Syst. Comput. 24(1): 1550001:1-1550001:18 (2015) - Tohid Moradi Khaneshan, Mojde Nematzade, Khayrollah Hadidi, Abdollah Khoei:
Analysis and Design of a Precise Voltage Buffer. J. Circuits Syst. Comput. 24(4): 1550058:1-1550058:26 (2015) - Alireza Mesri, Mahmoud Mahdipour Pirbazari, Abdollah Khoei, Khayrollah Hadidi:
CMOS implementation of a current-mode fully programmable interval type-2 fuzzifier. J. Intell. Fuzzy Syst. 29(4): 1289-1299 (2015) - Mahmoud Mahdipour Pirbazari, Alireza Mesri, Abdollah Khoei, Khayrollah Hadidi:
Power and area reduction in CMOS analog fuzzy logic controllers by using a new inference engine structure. J. Intell. Fuzzy Syst. 28(6): 2863-2874 (2015) - Mehdi Ghasemzadeh, Amin Akbari, Khayrollah Hadidi:
An ultra high speed booth encoder structure for fast arithmetic operations. MIXDES 2015: 278-281 - Mehdi Ghasemzadeh, Amin Akbari, Arefeh Soltani, Khayrollah Hadidi:
A new ultra high speed 7-2 compressor with a new structure. MIXDES 2015: 262-265 - Mehdi Ghasemzadeh, Arefeh Soltani, Amin Akbari, Khayrollah Hadidi:
A 6-bit 800MS/s flash ADC in 0.35μm CMOS. MIXDES 2015: 234-238 - Mehdi Ghasemzadeh, Arefeh Soltani, Amin Akbari, Khayrollah Hadidi:
Fast and accurate fractional frequency synthesizer in 0.18μm technology. MIXDES 2015: 330-333
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