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Publication search results
found 6 matches
- 2012
- Taavi Viilukas, Anton Karputkin, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Hideo Fujiwara:
Identifying Untestable Faults in Sequential Circuits Using Test Path Constraints. J. Electron. Test. 28(4): 511-521 (2012) - 2011
- Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara:
Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. ETS 2011: 147-152 - Taavi Viilukas, Maksim Jenihhin, Jaan Raik, Raimund Ubar, Samary Baranov:
Automated test bench generation for high-level synthesis flow ABELITE. EWDTS 2011: 13-16 - 2010
- Taavi Viilukas, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Anna Krivenko:
Constraint-based test pattern generation at the Register-Transfer Level. DDECS 2010: 352-357 - 2008
- Jaan Raik, Raimund Ubar, Taavi Viilukas, Maksim Jenihhin:
Mixed hierarchical-functional fault models for targeting sequential cores. J. Syst. Archit. 54(3-4): 465-477 (2008) - 2006
- Jaan Raik, Raimund Ubar, Taavi Viilukas:
High-Level Decision Diagram based Fault Models for Targeting FSMs. DSD 2006: 353-358
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