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Publication search results
found 12 matches
- 2022
- Jia-Rui Huang, Yong-Hwa Wen, Tzu-Hsien Yang, Jia-Jyun Lee, Guan-Ting Liu, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A 10 nA Ultra-Low Quiescent Current and 60 ns Fast Transient Response Low-Dropout Regulator for Internet-of-Things. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 139-147 (2022) - Yao-Hsin Chou, Shu-Yu Kuo, Yu-Chi Jiang, Ching-Hsuan Wu, Jyun-Yi Shen, Cheng-Yen Hua, Pei-Shin Huang, Yun-Ting Lai, Yong Feng Tong, Ming-He Chang:
A novel quantum-inspired evolutionary computation-based quantum circuit synthesis for various universal gate libraries. GECCO Companion 2022: 2182-2189 - 2016
- Chi-Ming Lee, Yong-Jyun Huang, Chih-Wei Liu, Yarsun Hsu:
DeAr: A framework for power-efficient and flexible embedded digital signal processor design. APCCAS 2016: 658-661 - Zhi-Yong Zhang, Kai Jyun Jhong, Chung-Wei Cheng, Po-Wei Huang, Mi-Ching Tsai, Wen-Hsi Lee:
Metal 3D printing of synchronous reluctance motor. ICIT 2016: 1125-1128 - 2014
- Chao-Kuei Chung, Chien-Yu Lu, Zhi-Hao Chang, Shyh-Jye Jou, Ching-Te Chuang, Ming-Hsien Tu, Yu-Hsian Chen, Yong-Jyun Hu, Paul-Sen Kan, Huan-Shun Huang, Kuen-Di Lee, Yung-Shin Kao:
A 40nm 256kb 6T SRAM with threshold power-gating, low-swing global read bit-line, and charge-sharing write with Vtrip-tracking and negative source-line write-assists. SoCC 2014: 455-462 - 2013
- Chi-Shin Chang, Hao-I Yang, Wei-Nan Liao, Yi-Wei Lin, Nan-Chun Lien, Chien-Hen Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Ming-Hsien Tu, Huan-Shun Huang, Yong-Jyun Hu, Paul-Sen Kan, Cheng-Yo Cheng, Wei-Chang Wang, Jian-Hao Wang, Kuen-Di Lee, Chia-Cheng Chen, Wei-Chiang Shih:
A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist. ISCAS 2013: 1468-1471 - Wei-Nan Liao, Nan-Chun Lien, Chi-Shin Chang, Li-Wei Chu, Hao-I Yang, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Ming-Hsien Tu, Huan-Shun Huang, Jian-Hao Wang, Paul-Sen Kan, Yong-Jyun Hu:
A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control. SoCC 2013: 110-115 - 2012
- Kuo-Liang Chung, Yong-Huai Huang, Jyun-Pin Wang, Ming-Shao Cheng:
Speedup of color palette indexing in self-organization of Kohonen feature map. Expert Syst. Appl. 39(3): 2427-2432 (2012) - 2010
- Kuo-Liang Chung, Yong-Huai Huang, Jyun-Pin Wang, Ting-Chin Chang, Hong-Yuan Mark Liao:
Fast randomized algorithm for center-detection. Pattern Recognit. 43(8): 2659-2665 (2010) - Jin-Fu Li, Yu-Jen Huang, Yong-Jyun Hu:
Testing Random Defect and Process Variation Induced Comparison Faults of TCAMs With Asymmetric Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(11): 1843-1847 (2010) - 2009
- Kuo-Liang Chung, Jyun-Pin Wang, Ming-Shao Cheng, Yong-Huai Huang:
Speedup of Color Palette Indexing in Self-Organization of Kohonen Feature Map. CAIP 2009: 402-409 - Yong-Jyun Hu, Yu-Jen Huang, Jin-Fu Li:
Modeling and Testing Comparison Faults of TCAMs with Asymmetric Cells. VTS 2009: 15-20
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