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Publication search results
found 195 matches
- 2004
- Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal:
Instruction buffering exploration for low energy VLIWs with instruction clusters. ASP-DAC 2004: 824-829 - Soroush Abbaspour, Massoud Pedram:
Gate delay calculation considering the crosstalk capacitances. ASP-DAC 2004: 852-857 - Samar Abdi, Daniel Gajski:
On deriving equivalent architecture model from system specification. ASP-DAC 2004: 322-327 - Kanak Agarwal, Dennis Sylvester, David T. Blaauw:
A simplified transmission-line based crosstalk noise model for on-chip RLC wiring. ASP-DAC 2004: 858-864 - Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah:
ShatterPB: symmetry-breaking for pseudo-Boolean formulas. ASP-DAC 2004: 883-886 - Jason Helge Anderson, Farid N. Najm:
Interconnect capacitance estimation for FPGAs. ASP-DAC 2004: 713-718 - Arunkumar Balasundaram, Angelo Pereira, Jun-Cheol Park, Vincent John Mooney III:
Golay and wavelet error control codes in VLSI. ASP-DAC 2004: 563-564 - Subhasis Banerjee, G. Surendra, S. K. Nandy:
Exploiting program execution phases to trade power and performance for media workload. ASP-DAC 2004: 387-389 - Subhasis Bhattacharjee, Dhiraj K. Pradhan:
LPRAM: a low power DRAM with testability. ASP-DAC 2004: 390-393 - Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi:
Hierarchical extraction and verification of symmetry constraints for analog layout automation. ASP-DAC 2004: 400-405 - Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya:
Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. ASP-DAC 2004: 469-474 - Lukai Cai, Haobo Yu, Daniel Gajski:
A novel memory size model for variable-mapping in system level design. ASP-DAC 2004: 812-817 - Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim:
Resource-constrained low-power bus encoding with crosstalk delay elimination. ASP-DAC 2004: 834-837 - Noureddine Chabini, Wayne H. Wolf:
An approach for reducing dynamic power consumption in synchronous sequential digital designs. ASP-DAC 2004: 198-204 - Srimat T. Chakradhar:
Open architecture test system: not why but when! ASP-DAC 2004: 337-340 - Deming Chen, Jason Cong:
Register binding and port assignment for multiplexer optimization. ASP-DAC 2004: 68-73 - Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Makoto Mori, Qinke Wang:
Optimal planning for mesh-based power distribution. ASP-DAC 2004: 444-449 - Jun Chen, Lei He:
Modeling of coplanar waveguide for buffered clock tree. ASP-DAC 2004: 367-372 - Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu:
A buffer planning algorithm with congestion optimization. ASP-DAC 2004: 615-620 - Yiran Chen, Kaushik Roy, Cheng-Kok Koh:
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor. ASP-DAC 2004: 893-898 - Yi-Hui Cheng, Yao-Wen Chang:
Integrating buffer planning with floorplanning for simultaneous multi-objective optimization. ASP-DAC 2004: 624-627 - Lerong Cheng, Xiaoyu Song, Guowu Yang, Zhiwei Tang:
A fast congestion estimator for routing with bounded detours. ASP-DAC 2004: 666-670 - Yoonseo Choi, Taewhan Kim:
Memory access driven storage assignment for variables in embedded system design. ASP-DAC 2004: 478-481 - Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y. Wong:
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO. ASP-DAC 2004: 169-174 - Martin Yeung-Kei Chui, Wing-Hung Ki, Chi-Ying Tsui:
A dual-band switching digital controller for a buck converter. ASP-DAC 2004: 561-562 - Robert Clarisó, Jordi Cortadella:
Verification of timed circuits with symbolic delays. ASP-DAC 2004: 628-633 - Robertas Damasevicius, Vytautas Stuikys:
Application of UML for hardware design based on design process model. ASP-DAC 2004: 244-249 - Sukanta Das, Debdas Dey, Subhayan Sen, Biplab K. Sikdar, Parimal Pal Chaudhuri:
An efficient design of non-linear CA based PRPG for VLSI circuit testing. ASP-DAC 2004: 110-112 - Batsayan Das, Dipankar Sarkar, Santanu Chattopadhyay:
Model checking on state transition diagram. ASP-DAC 2004: 412-417 - Debatosh Debnath, Tsutomu Sasao:
Efficient computation of canonical form for Boolean matching in large libraries. ASP-DAC 2004: 591-596
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