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Publication search results
found 145 matches
- 1999
- Jean-François Agaësse, Bernard Laurent:
Virtual Components Application and Customization. DATE 1999: 726-727 - Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami:
A DAG-Based Design Approach for Reconfigurable VLIW Processors. DATE 1999: 778-779 - Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman Adham:
Design For Testability Method for CML Digital Circuits. DATE 1999: 360-367 - Guido Arnout:
C for System Level Design. DATE 1999: 384-386 - Cristina Barna, Wolfgang Rosenstiel:
Object-Oriented Reuse Methodology for VHDL. DATE 1999: 689- - Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi:
Glitch Power Minimization by Gate Freezing. DATE 1999: 163-167 - Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick:
Single Chip or Hybrid System Integration. DATE 1999: 616- - Peter T. Breuer, Natividad Martínez Madrid, Jonathan P. Bowen, Robert B. France, Maria M. Larrondo-Petrie, Carlos Delgado Kloos:
Reasoning about VHDL and VHDL-AMS using Denotational Semantics. DATE 1999: 346-352 - Markus Bühler, Matthias Papesch, K. Kapp, Utz G. Baitinger:
Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach. DATE 1999: 459- - Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer:
Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE 1999: 8-12 - Joan Carletta, Mehrdad Nourani, Christos A. Papachristou:
Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. DATE 1999: 278-282 - Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder:
A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE 1999: 714- - Jui-Ming Chang, Massoud Pedram:
Codex-dp: Co-design of Communicating Systems Using Dynamic Programming. DATE 1999: 568- - Sasikumar Cherubal, Abhijit Chatterjee:
Parametric Fault Diagnosis for Analog Systems Using Functional Mapping. DATE 1999: 195- - Jung Hyun Choi, Sergio Bampi:
OTA Amplifiers Design on Digital Sea-of-Transistors Array. DATE 1999: 776-777 - Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli:
Dynamic Power Management for non-stationary service requests. DATE 1999: 77-81 - Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens:
A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE 1999: 271- - Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero:
Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms. DATE 1999: 754-755 - João Paulo Costa, L. Miguel Silveira, Mike Chou:
Efficient Techniques for Accurate Extraction and Modeling of Substrate Coupling in Mixed-Signal IC's. DATE 1999: 396-400 - Érika F. Cota, Luigi Carro, Marcelo Lubaszewski:
A Method to Diagnose Faults in Linear Analog Circuits using an Adaptive Tester. DATE 1999: 184-188 - Jerzy J. Dabrowski, Andrzej Pulka:
Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique. DATE 1999: 790-791 - Marcello Dalpasso, Alessandro Bogliolo, Luca Benini:
Specification and Validation of Distributed IP-Based Designs with JavaCAD. DATE 1999: 684-688 - Bharat P. Dave:
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems. DATE 1999: 97-104 - Patrick M. Dewilde:
Large European Programs in Microelectronic System and Circuit Design. DATE 1999: 734- - Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri:
Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis. DATE 1999: 328- - Robert P. Dick, Niraj K. Jha:
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis. DATE 1999: 263-270 - Alex Doboli, Ranga Vemuri:
A VHDL-AMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems. DATE 1999: 338-345 - Klaus Eckl, Christian Legl:
Retiming Sequential Circuits with Multiple Register Classes. DATE 1999: 650- - C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman, Adwin H. Timmer:
Identification and Exploitation of Symmetries in DSP Algorithms. DATE 1999: 602-608 - Hans Eveking, Holger Hinrichsen, Gerd Ritter:
Automatic Verification of Scheduling Results in High-Level Synthesis. DATE 1999: 59-64
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retrieved on 2024-04-23 16:26 CEST from data curated by the dblp team
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