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Publication search results
found 57 matches
- 2012
- Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe:
Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). FPGA 2012: 271 - Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings:
EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). FPGA 2012: 266 - Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Sadia Malik, Newton Petersen, Kaushik Ravindran, Trung N. Tran, Guoqiang Wang, Guang Yang:
Early timing estimation for system-level design using FPGAs (abstract only). FPGA 2012: 271 - Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, José A. Tierno:
A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation. FPGA 2012: 153-162 - Scott Bailie, Miriam Leeser:
Incremental clustering applied to radar deinterleaving: a parameterized FPGA implementation. FPGA 2012: 25-28 - Samuel Bayliss, George A. Constantinides:
Optimizing SDRAM bandwidth for custom FPGA loop accelerators. FPGA 2012: 195-204 - David Boland, George A. Constantinides:
A scalable approach for automated precision analysis. FPGA 2012: 185-194 - Assem A. M. Bsoul, Steven J. E. Wilton:
A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs. FPGA 2012: 245-254 - Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni:
A lean FPGA soft processor built using a DSP block. FPGA 2012: 237-240 - Jianwen Chen, Jason Cong, Ming Yan, Yi Zou:
FPGA-accelerated 3D reconstruction using compressive sensing. FPGA 2012: 163-166 - Yupeng Chen, Bertil Schmidt, Douglas L. Maskell:
Accelerating short read mapping on an FPGA (abstract only). FPGA 2012: 265 - S. Alexander Chin, Paul Chow:
OpenCL memory infrastructure for FPGAs (abstract only). FPGA 2012: 269-270 - Chih-Hsun Chou, Fong Pong, Nian-Feng Tzeng:
Speedy FPGA-based packet classifiers with low on-chip memory requirements. FPGA 2012: 11-20 - Gary Chun Tak Chow, Anson Hong Tak Tse, Qiwei Jin, Wayne Luk, Philip Heng Wai Leong, David B. Thomas:
A mixed precision Monte Carlo methodology for reconfigurable accelerator systems. FPGA 2012: 57-66 - Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai:
Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. FPGA 2012: 139-142 - Jason Cong, Bingjun Xiao:
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only). FPGA 2012: 268 - John Curreri, Greg Stitt, Alan D. George:
Communication visualization for bottleneck detection of high-level synthesis applications. FPGA 2012: 33-36 - Zefu Dai, Jianwen Zhu:
Saturating the transceiver bandwidth: switch fabric design on FPGAs. FPGA 2012: 67-76 - Kermin Elliott Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel S. Emer:
Leveraging latency-insensitivity to ease multiple FPGA design. FPGA 2012: 175-184 - Jeremy Fowers, Greg Brown, Patrick Cooke, Greg Stitt:
A performance and energy comparison of FPGAs, GPUs, and multicores for sliding-window applications. FPGA 2012: 47-56 - Yong Fu, Chi Wang, Liguang Chen, Jinmei Lai:
A novel full coverage test method for CLBs in FPGA (abstract only). FPGA 2012: 267 - Masahiro Fujita, Hiroaki Yoshida:
Post-silicon debugging targeting electrical errors with patchable controllers (abstract only). FPGA 2012: 271 - Lingkan Gong, Oliver Diessel:
Functionally verifying state saving and restoration in dynamically reconfigurable systems. FPGA 2012: 241-244 - Stefan Hadjis, Andrew Canis, Jason Helge Anderson, Jongsok Choi, Kevin Nam, Stephen Dean Brown, Tomasz S. Czajkowski:
Impact of FPGA architecture on resource sharing in high-level synthesis. FPGA 2012: 111-114 - Matthias Hinkfoth, Enrico Heinrich, Sebastian Vorköper, Volker Kühn, Ralf Salomon:
X-ORCA: FPGA-based wireless localization in the sub-millimeter range. FPGA 2012: 29-32 - Anh-Tuan Hoang, Takeshi Fujino:
Intra-masking dual-rail memory on LUT implementation for tamper-resistant AES on FPGA. FPGA 2012: 1-10 - Juinn-Dar Huang, Ya-Shih Huang, Mi-Yu Hsu, Han-Yuan Chang:
Thermal-aware logic block placement for 3D FPGAs considering lateral heat dissipation (abstract only). FPGA 2012: 268 - Minxi Jin, Tsutomu Maruyama:
A real-time stereo vision system using a tree-structured dynamic programming on FPGA. FPGA 2012: 21-24 - Robert Kirchgessner, Greg Stitt, Alan D. George, Herman Lam:
VirtualRC: a virtual FPGA platform for applications and tools portability. FPGA 2012: 205-208 - Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, J. Gregory Steffan:
Multi-ported memories for FPGAs via XOR. FPGA 2012: 209-218
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retrieved on 2024-04-25 00:13 CEST from data curated by the dblp team
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