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ORCIDITC-Asia 2020: Taipei, Taiwan
- IEEE International Test Conference in Asia, ITC-Asia 2020, Taipei, Taiwan, September 23-25, 2020. IEEE 2020, ISBN 978-1-7281-8944-4
- Mincent Lee, Cheng-Tse Lu, Chia-Heng Tsai, Hao Chen, Min-Jer Wang:
Site-aware Anomaly Detection with Machine Learning for Circuit Probing to Prevent Overkill. 1-6 - Heng-Yi Lin, Yen-Chun Fang, Shi-Tang Liu, Jia-Xian Chen, Chien-Mo James Li, Eric Jia-Wei Fang:
Automatic IR-Drop ECO Using Machine Learning. 7-12 - Chien-Hui Chuang, Kuan-Wei Hou, Cheng-Wen Wu
, Mincent Lee, Chia-Heng Tsai, Hao Chen, Min-Jer Wang:
A Deep Learning-Based Screening Method for Improving the Quality and Reliability of Integrated Passive Devices. 13-18 - Kevin Fan:
Test Challenges of Providing Low Phase Noise Reference Clock Signal with ATE Platform. 19-24 - Po-Ting Lai, Yu-Hao Chiu, Chieh-Wen Lu, Kuang-Hsiang Liu, Tung-Liang Chiu, Wendy Chen:
Development and Validation of a Novel Reliable Method for Wet Testing on Biochemical Chip. 25-30 - Chia-Heng Tsai, Chi-Chang Lai, Hao Chen, Min-Jer Wang:
Novel Circuit Probing for Tiny Inductor. 31-34 - Zhengda Dou, Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen:
Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors. 35-40 - Tsung-Fu Hsieh, Jin-Fu Li, Jenn-Shiang Lai, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou:
Refresh Power Reduction of DRAMs in DNN Systems Using Hybrid Voting and ECC Method. 41-46 - Shyue-Kung Lu, Zeng-Long Tsai, Chun-Lung Hsu, Chi-Tien Sun:
ECC Caching Techniques for Protecting NAND Flash Memories. 47-52 - Yan-Shen You, Chih-Yan Liu, Mu-Ting Wu, Po-Wei Chen, James Chien-Mo Li:
Diagnosis technique for Clustered Multiple Transition Delay Faults. 53-58 - Chenlei Fang, Qicheng Huang, R. D. Shawn Blanton:
Adaptive Test Pattern Reordering for Diagnosis using k-Nearest Neighbors. 59-64 - Qicheng Huang, Chenlei Fang, R. D. Shawn Blanton:
Diagnosis Outcome Prediction on Limited Data via Transferred Random Forest. 65-70 - Leonidas Lavdas, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani:
On Optical Attacks Making Logic Obfuscation Fragile. 71-76 - Ayush Jain, Ujjwal Guin:
A Novel Tampering Attack on AES Cores with Hardware Trojans. 77-82 - Ming-Ting Lee, Chen-Hung Wu, Shi-Tang Liu, Cheng-Yun Hsieh, James Chien-Mo Li:
High Efficiency and Low Overkill Testing for Probabilistic Circuits. 83-87 - Chung-Huang Yeh, Jwu E. Chen:
The Decision Mechanism Uses the Multiple-Tests Scheme to Improve Test Yield in IC Testing. 88-93 - Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang:
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction. 94-99 - Chia-Chuan Li, Soon-Jyh Chang:
Modified BER Test for SAR ADCs. 100-105 - Yu-Pang Hu, Shuo-Wen Chang, Kai-Chiang Wu, Chi Chun Wang, Fu-Sheng Huang, Yi-Lun Tang, Yung-Chen Chen, Ming-Chien Chen, Mango C.-T. Chao:
Test Methodology for Defect-based Bridge Faults. 106-111 - Yousuke Miyake, Takaaki Kato, Seiji Kajihara:
Path Delay Measurement with Correction for Temperature And Voltage Variations. 112-117 - Liyang Lai, Qiting Zhang, Kun-Han Hans Tsai, Wu-Tung Cheng:
GPU-based Hybrid Parallel Logic Simulation for Scan Patterns. 118-123 - Kuen-Wei Yeh, Jiun-Lang Huang:
DSSP-ATPG: A Deterministic Search-Space Parallel Test Pattern Generator. 124-129 - Fong-Jyun Tsai, Chong-Siao Ye, Yu Huang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Mark Kassab, Janusz Rajski, Shi-Xuan Zheng:
Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. 130-135 - Tong-Yu Hsieh, Chen-Chia Chung, Jun-Tsung Wu:
On Enhancing Error-Tolerability of Videos via Re-Encoding with Adaptive I-Frame Insertion. 136-141 - Tong-Yu Hsieh, Yu-Min Chung:
A Self-Detection and Self-Repair Methodology for Reliable Speech Recognition Considering AWGN Noises. 142-147 - Jian-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho:
Watermarking for Paper-Based Digital Microfluidic Biochips. 148-153
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