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24th MBMV 2021: Virtual Event, Germany
- Methods and Description Languages for Modelling and Verification of Circuits and Systems, MBMV 2021, 24th Workshop, Virtual Event, Germany, March 18-19, 2021. VDE/IEEE 2021, ISBN 978-3-8007-5500-4
- Lukas Mentel, Karsten Scheibler, Felix Winterer, Bernd Becker, Tino Teige:
Benchmarking SMT Solvers on Automotive Code. 1-10 - Max Brand, Albrecht Mayer, Frank Slomka:
A Matter of Overhead - Response Time Analysis of Hard Real-Time Systems in Theory and Practice. 1-7 - Lukas Steiner, Matthias Jung, Norbert Wehn:
Exploration of DDR5 with the Open-Source Simulator DRAMSys. 1-11 - Jie Hou, Martin Radetzki:
Comprehensive modeling and evaluation of Network-on-Chip performability. 1-12 - Martín Letras, Joachim Falk, Jürgen Teich:
Decision Tree-based Throughput Estimation to Accelerate Design Space Exploration for Multi-Core Applications. 1-11 - Felix Winterer, Tobias Seufert, Karsten Scheibler, Tino Teige, Chritsoph Scholl, Bernd Becker:
ICP and IC3 with Stronger Generalization. 1-12 - Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler:
Constrained Random Verification for RISC-V: Overview, Evaluation and Discussion. 1-8 - Peer Adelt, Bastian Koppelmann, Wolfgang Mueller, Christoph Scheytt:
Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. 1-8 - Christoph Grimm, Frank Wawrzik, Alexander Louis-Ferdinand Jung, Konstantin Lübeck, Sebastian Post, Johannes Koch, Oliver Bringmann:
APPEL - AGILA ProPErty and Dependency Description Language. 1-11 - Endri Kaja, Nicolas Ojeda Leon, Michael Werner, Bogdan-Andrei Tabacaru, Keerthikumara Devarajegowda, Wolfgang Ecker:
Extending Verilator to Enable Fault Simulation. 1-6 - Zhao Han, Shahzaib Qazi, Michael Werner, Keerthikumara Devarajegowda, Wolfgang Ecker:
On Self-Verifying DSL Generation for Embedded Systems Automation. 1-7
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