Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSAMOS Embedded Processor Design Challenges 2002
- Ed F. Deprettere, Jürgen Teich, Stamatis Vassiliadis:
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Lecture Notes in Computer Science 2268, Springer 2002, ISBN 3-540-43322-8
System-Level Design and Simulation
- Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya:
Consistency Analysis of Reconfigurable Dataflow Specifications. 1-17 - Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees A. Vissers:
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. 18-37 - Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst:
Flexibility/Cost-Tradeoffs of Platform-Based Systems. 38-56 - Andy D. Pimentel, Simon Polstra, Frank Terpstra, A. W. van Halderen, Joseph E. Coffland, Louis O. Hertzberger:
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems. 57-73 - Vladimir D. Zivkovic, Paul Lieverse:
An Overview of Methodologies and Tools in the Field of System-Level Design. 74-88
Compiler and Mapping Technology
- Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis:
Translating Imperative Affine Nested Loop Programs into Process Networks. 89-111 - Patrice Quinton, Tanguy Risset:
Structured Scheduling of Recurrence Equations: Theory and Practice. 112-134 - Jürgen Teich, Lothar Thiele:
Exact Partitioning of Affine Dependence Algorithms. 135-153 - Marcus Bednara, Frank Hannig
, Jürgen Teich:
Generation of Distributed Loop Control. 154-170 - Peter M. W. Knijnenburg, Toru Kisuki, Michael F. P. O'Boyle:
Iterative Compilation. 171-187
Embedded Processors and Architectures
- Peter Pirsch, Achim Freimann, C. Klar, Jens Peter Wittenburg:
Processor Architectures for Multimedia Applications. 188-206 - Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana:
Microcoded Reconfigurable Embedded Processors: Current Developments. 207-223 - Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers:
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. 224-241 - Henk L. Muller, Dan Page, James Irwin, David May:
Caches with Compositional Performance. 242-259 - Clark N. Taylor, Debashis Panigrahi, Sujit Dey:
Design of an Adaptive Architecture for Energy Efficient Wireless Image Communication. 260-273
Applications
- Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest:
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera. 274-290 - Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven:
A 2D Addressing Mode for Multimedia Applications. 291-306 - C. John Glossner, Michael J. Schulte, Stamatis Vassiliadis:
A Java-Enabled DSP. 307-326
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-07-11 19:17 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
