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ORCIDRolf Ernst
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- affiliation: Braunschweig University of Technology, Germany
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2020 – today
- 2024
[j76]Alex Bendrick
, Jonas Peeck, Rolf Ernst:
An Error Protection Protocol for the Multicast Transmission of Data Samples in V2X Applications. ACM Trans. Cyber Phys. Syst. 8(3): 32:1-32:25 (2024)- [j75]Alex Bendrick, Daniel Tappe, Dominik Stöhrmann, Rolf Ernst:
Synchronized Lossfree Reconfiguration of Safety-Critical V2X Streaming Applications. IEEE Trans. Veh. Technol. 73(10): 15636-15652 (2024) - [c285]Robin Hapka, Rolf Ernst:
Conservative Design with High-Performance COTS Architectures - Beyond Traditional Approaches. ETFA 2024: 1-8 - [c284]Dominik Stöhrmann, Rolf Ernst:
Fast Vehicular TSN Network Reconfiguration with Application Aware Network Synchronization. ETFA 2024: 1-8 - [c283]Daniel Tappe, Alex Bendrick, Rolf Ernst:
Continuous multi-access communication for high-resolution low-latency V2X sensor streaming. IV 2024: 1814-1821 - [c282]Alex Bendrick, Daniel Tappe, Rolf Ernst:
Ultra Reliable Hard Real-Time V2X Streaming with Shared Slack Budgeting. IV 2024: 2289-2296 - [c281]Nora Sperling, Rolf Ernst:
Reducing Communication Cost and Latency in Autonomous Vehicles with Subscriber-centric Selective Data Distribution. VTC Spring 2024: 1-7 - 2023
- [j74]Rolf Ernst, Dominik Stöhrmann, Alex Bendrick, Adam Kostrzewa:
Application-centric Network Management - Addressing Safety and Real-time in V2X Applications. ACM Trans. Embed. Comput. Syst. 22(2): 20:1-20:25 (2023) - [j73]Leonie Köhler, Phil Hertha, Matthias Beckert, Alex Bendrick, Rolf Ernst:
Robust Cause-Effect Chains with Bounded Execution Time and System-Level Logical Execution Time. ACM Trans. Embed. Comput. Syst. 22(3): 50:1-50:28 (2023) - [j72]Jonas Peeck, Rolf Ernst:
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization. ACM Trans. Embed. Comput. Syst. 22(5s): 139:1-139:25 (2023) - [j71]Jonas Peeck, Mischa Möstl, Tasuku Ishigooka, Rolf Ernst:
A Protocol for Reliable Real-Time Wireless Communication of Large Data Samples. IEEE Trans. Veh. Technol. 72(10): 13146-13161 (2023) - [c280]Jonas Peeck, Robin Hapka, Rolf Ernst:
Efficient hard real-time implementation of CNNs on multi-core architectures. COMPSAC 2023: 79-90 - [c279]Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst:
Invited: Caching in Automated Data Centric Vehicles for Edge Computing Scenarios. DAC 2023: 1-4 - [c278]Anika Christmann, Robin Hapka, Rolf Ernst:
Formal Analysis of Timing Diversity for Autonomous Systems. DATE 2023: 1-6 - [c277]Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst, Bryan Donyanavard, Florian Maurer, Oliver Lenke, Anmol Surhonne, Andreas Herkersdorf, Walaa Amer, Caio Batista de Melo, Ping-Xiang Chen, Quang Anh Hoang, Rachid Karami, Biswadip Maity, Paul Nikolian, Mariam Rakka, Dongjoo Seo, Saehanseul Yi, Minjun Seo, Nikil D. Dutt, Fadi J. Kurdahi:
Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE 2023: 1-6 - [c276]Alex Bendrick, Rolf Ernst:
Hard Real-Time Streaming of Large Data Objects with Overlapping Backward Error Correction. IECON 2023: 1-8 - [c275]Jonas Peeck, Rolf Ernst:
Enabling multi-link data transmission for collaborative sensing in open road scenarios. RTNS 2023: 76-86 - 2022
- [j70]Selma Saidi, Dirk Ziegenbein, Jyotirmoy V. Deshmukh, Rolf Ernst:
Guest Editors' Introduction: Special Issue on Autonomous Systems Design. IEEE Des. Test 39(1): 5-7 (2022) - [j69]Selma Saidi, Dirk Ziegenbein, Jyotirmoy V. Deshmukh, Rolf Ernst:
Autonomous Systems Design: Charting a New Discipline. IEEE Des. Test 39(1): 8-23 (2022) - [j68]Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst:
The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Trans. Emerg. Top. Comput. 10(1): 250-266 (2022) - [c274]Kai-Björn Gemlau, Hermann von Hasseln, Rolf Ernst:
Industry-track: System-Level Logical Execution Time for Automotive Software Development. EMSOFT 2022: 21-23 - [c273]Kai-Björn Gemlau, Nora Sperling, Rolf Ernst:
Efficient Timing Isolation for Mixed-Criticality Communication Stacks in Performance Architectures. ETFA 2022: 1-8 - [c272]Robin Hapka, Anika Christmann, Rolf Ernst:
Controlling High-Performance Platform Uncertainties with Timing Diversity. RTCSA 2022: 212-219 - 2021
- [j67]Rolf Ernst, Xiaobo Sharon Hu:
Autonomous Systems Design - A Virtual Roundtable. Computer 54(11): 17-25 (2021) - [j66]Johannes Schlatow, Edgard Schmidt, Rolf Ernst:
Automating integration under emergent constraints for embedded systems. SICS Softw.-Intensive Cyber Phys. Syst. 35(3-4): 185-199 (2021) - [j65]Adam Kostrzewa, Rolf Ernst:
Achieving safety and performance with reconfiguration protocol for ethernet TSN in automotive systems. J. Syst. Archit. 118: 102208 (2021) - [j64]Kai-Björn Gemlau, Leonie Köhler, Rolf Ernst:
A Platform Programming Paradigm for Heterogeneous Systems Integration. Proc. IEEE 109(4): 582-603 (2021) - [j63]Kai-Björn Gemlau, Leonie Köhler, Rolf Ernst, Sophie Quinton:
System-level Logical Execution Time: Augmenting the Logical Execution Time Paradigm for Distributed Real-time Automotive Software. ACM Trans. Cyber Phys. Syst. 5(2): 14:1-14:27 (2021) - [c271]Jonas Peeck, Johannes Schlatow, Rolf Ernst:
Online latency monitoring of time-sensitive event chains in safety-critical applications. DATE 2021: 539-542 - [c270]Kai-Björn Gemlau, Leonie Köhler, Rolf Ernst:
Efficient Run-Time Environments for System-Level LET Programming. DATE 2021: 749-754 - [c269]Mischa Möstl, Robin Hapka, Anika Christmann, Rolf Ernst:
Timing diversity as a protective mechanism: work-in-progress. EMSOFT 2021: 29-30 - [c268]Jonas Peeck, Mischa Möstl, Tasuku Ishigooka, Rolf Ernst:
A Middleware Protocol for Time-Critical Wireless Communication of Large Data Samples. RTSS 2021: 1-13 - [c267]Dominik Stöhrmann, Adam Kostrzewa, Rolf Ernst, Helmut Kellermann:
Towards OFDMA-based Ethernet for future in-vehicle communication. SA 2021: 1-8 - 2020
- [j62]Robin Hofmann, Borislav Nikolic, Rolf Ernst:
Challenges and Limitations of IEEE 802.1CB-2017. IEEE Embed. Syst. Lett. 12(4): 105-108 (2020) - [j61]Zain Alabedin Haj Hammadeh, Sophie Quinton, Rolf Ernst:
Weakly-hard Real-time Guarantees for Earliest Deadline First Scheduling of Independent Tasks. ACM Trans. Embed. Comput. Syst. 18(6): 121:1-121:25 (2020) - [j60]Eberle A. Rambo, Christoph Seitz, Selma Saidi, Rolf Ernst:
Bridging the Gap between Resilient Networks-on-Chip and Real-Time Systems. IEEE Trans. Emerg. Top. Comput. 8(2): 418-430 (2020) - [c266]Selma Saidi, Dirk Ziegenbein, Jyotirmoy V. Deshmukh, Rolf Ernst:
EDA for Autonomous Behavior Assurance. ICCAD 2020: 81:1-81:3 - [c265]Adam Kostrzewa, Rolf Ernst:
Fast Failover in Ethernet-Based Automotive Networks. ISORC 2020: 134-139 - [c264]Thawra Kadeed, Borislav Nikolic, Rolf Ernst:
Safe Online Reconfiguration of Mixed-Criticality Real-Time Systems. PRDC 2020: 140-149 - [c263]Adam Kostrzewa, Dominik Stöhrmann, Rolf Ernst:
Towards Safety in Automotive Ethernet-based Networks with Dynamic Workloads. WF-IoT 2020: 1-6
2010 – 2019
- 2019
- [j59]Thawra Kadeed, Sebastian Tobuschat, Adam Kostrzewa, Rolf Ernst:
Safe and efficient power management of hard real-time networks-on-chip. Integr. 65: 1-17 (2019) - [j58]Sebastian Tobuschat, Adam Kostrzewa, Rolf Ernst:
Selective congestion control for mixed-critical networks-on-chip. Integr. 65: 404-416 (2019) - [j57]Borislav Nikolic, Sebastian Tobuschat, Leandro Soares Indrusiak, Rolf Ernst, Alan Burns:
Real-time analysis of priority-preemptive NoCs with arbitrary buffer sizes and router delays. Real Time Syst. 55(1): 63-105 (2019) - [j56]Eberle A. Rambo, Yunsheng Shang, Rolf Ernst:
Providing Integrity in Real-Time Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1907-1920 (2019) - [c262]Mischa Möstl, Alexander Dörflinger, Mark Albers, Harald Michalik, Rolf Ernst:
Self-Adaptation for Availability in CPU-FPGA Systems Under Soft Errors. AHS 2019: 9-16 - [c261]Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik, Mischa Möstl, Johannes Schlatow, Rolf Ernst:
Demonstrating Controlled Change for Autonomous Space Vehicles. AHS 2019: 95-102 - [c260]Eberle A. Rambo, Thawra Kadeed, Rolf Ernst, Minjun Seo, Fadi J. Kurdahi, Bryan Donyanavard, Caio Batista de Melo, Biswadip Maity, Kasra Moazzemi, Kenneth Michael Stewart, Saehanseul Yi, Amir M. Rahmani, Nikil D. Dutt, Florian Maurer, Nguyen Anh Vu Doan, Anmol Surhonne, Thomas Wild, Andreas Herkersdorf:
The information processing factory: a paradigm for life cycle management of dependable systems. CODES+ISSS 2019: 20:1-20:2 - [c259]Mischa Möstl, Marcus Nolte, Johannes Schlatow, Rolf Ernst:
Controlling Concurrent Change - A Multiview Approach Toward Updatable Vehicle Automation Systems. ASD@DATE 2019: 4:1-4:15 - [c258]Leonie Köhler, Borislav Nikolic, Rolf Ernst, Marc Boyer:
Increasing Accuracy of Timing Models: From CPA to CPA+. DATE 2019: 1210-1215 - [c257]Borislav Nikolic, Robin Hofmann, Rolf Ernst:
Slot-Based Transmission Protocol for Real-Time NoCs - SBT-NoC. ECRTS 2019: 26:1-26:22 - [c256]Kai-Björn Gemlau, Jonas Peeck, Nora Sperling, Phil Hertha, Rolf Ernst:
A new design for data-centric Ethernet communication with tight synchronization requirements for automated vehicles. IECON 2019: 4489-4494 - [c255]Leonie Köhler, Rolf Ernst:
Improving a Compositional Timing Analysis Framework for Weakly-Hard Real-Time Systems. RTAS 2019: 228-240 - [c254]Johannes Schlatow, Mischa Möstl, Rolf Ernst:
Self-Aware Scheduling for Mixed-Criticality Component-Based Systems. RTAS 2019: 267-278 - [c253]Robin Hofmann, Borislav Nikolic, Rolf Ernst:
Slack-based Traffic Shaping for Real-time Ethernet Networks. RTCSA 2019: 1-11 - [c252]Thawra Kadeed, Sebastian Tobuschat, Rolf Ernst:
Integrated Energy Control for Hard Real-Time Networks-on-Chip. RTSS 2019: 4-16 - [e4]Selma Saidi, Rolf Ernst, Dirk Ziegenbein:
Workshop on Autonomous Systems Design, ASD 2019, March 29, 2019, Florence, Italy. OASIcs 68, Schloss Dagstuhl - Leibniz-Zentrum für Informatik 2019, ISBN 978-3-95977-102-3 [contents] - [i4]Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst:
The Information Processing Factory: Organization, Terminology, and Definitions. CoRR abs/1907.01578 (2019) - 2018
- [j55]Rolf Ernst:
Automated Driving: The Cyber-Physical Perspective. Computer 51(9): 76-79 (2018) - [j54]Leonie Ahrendts, Rolf Ernst, Sophie Quinton:
Exploiting Execution Dynamics in Timing Analysis Using Job Sequences. IEEE Des. Test 35(4): 16-22 (2018) - [j53]Adam Kostrzewa, Sebastian Tobuschat, Rolf Ernst:
Self-Aware Network-on-Chip Control in Real-Time Systems. IEEE Des. Test 35(5): 19-27 (2018) - [j52]Xiaobo Sharon Hu, Rolf Ernst, Petru Eles, Gernot Heiser, Kurt Keutzer, Daehyun Kim, Tetsuya Tohdo:
Roundtable: Machine Learning for Embedded Systems: Hype or Lasting Impact? IEEE Des. Test 35(6): 86-93 (2018) - [j51]Mischa Möstl, Johannes Schlatow, Rolf Ernst, Nikil D. Dutt, Ahmed Nassar, Amir-Mohammad Rahmani, Fadi J. Kurdahi, Thomas Wild, Armin Sadighi, Andreas Herkersdorf:
Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS. Proc. IEEE 106(9): 1543-1567 (2018) - [j50]Mischa Möstl, Johannes Schlatow, Rolf Ernst:
Synthesis of Monitors for Networked Systems With Heterogeneous Safety Requirements. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2824-2834 (2018) - [c251]Mischa Möstl, Rolf Ernst:
Cross-layer dependency analysis with timing dependence graphs. DAC 2018: 99:1-99:6 - [c250]Armin Sadighi, Bryan Donyanavard, Thawra Kadeed, Kasra Moazzemi, Tiago Mück, Ahmed Nassar, Amir M. Rahmani, Thomas Wild, Nikil D. Dutt, Rolf Ernst, Andreas Herkersdorf, Fadi J. Kurdahi:
Design methodologies for enabling self-awareness in autonomous systems. DATE 2018: 1532-1537 - [c249]Leonie Ahrendts, Sophie Quinton, Thomas Boroske, Rolf Ernst:
Verifying Weakly-Hard Real-Time Properties of Traffic Streams in Switched Networks. ECRTS 2018: 15:1-15:22 - [c248]Zain Alabedin Haj Hammadeh, Rolf Ernst:
Weakly-Hard Real-Time Guarantees for Weighted Round-Robin Scheduling of Real-Time Messages. ETFA 2018: 384-391 - [c247]Mischa Möstl, Johannes Schlatow, Jonas Peeck, Rolf Ernst, Marcus Nolte, Inga Jatzkowski, Markus Maurer, Anna Jankowski:
Controlling Concurrent Change: Managing In-Field Change in Critical Embedded Systems. EWME 2018: 107-112 - [c246]Rolf Ernst, Leonie Ahrendts, Kai Bjorn Gemlau:
System Level LET: Mastering Cause-Effect Chains in Distributed Systems. IECON 2018: 4084-4089 - [c245]Adam Kostrzewa, Thawra Kadeed, Borislav Nikolic, Rolf Ernst:
Supporting Dynamic Voltage and Frequency Scaling in Networks-On-Chip for Hard Real-Time Systems. RTCSA 2018: 125-135 - [c244]Mohammad Hamad, Zain Alabedin Haj Hammadeh, Selma Saidi, Vassilis Prevelakis, Rolf Ernst:
Prediction of abnormal temporal behavior in real-time systems. SAC 2018: 359-367 - [c243]Johannes Schlatow, Mischa Möstl, Sebastian Tobuschat, Tasuku Ishigooka, Rolf Ernst:
Data-Age Analysis and Optimisation for Cause-Effect Chains in Automotive Control Systems. SIES 2018: 1-9 - [i3]Rolf Ernst, Stefan Kuntz, Sophie Quinton, Martin Simons:
The Logical Execution Time Paradigm: New Perspectives for Multicore Systems (Dagstuhl Seminar 18092). Dagstuhl Reports 8(2): 122-149 (2018) - 2017
- [j49]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Ensuring safety and efficiency in networks-on-chip. Integr. 58: 571-582 (2017) - [j48]Henning Sahlbach, Daniel Thiele, Rolf Ernst:
A system-level FPGA design methodology for video applications with weakly-programmable hardware components. J. Real Time Image Process. 13(2): 291-309 (2017) - [j47]Mischa Möstl, Rolf Ernst:
Contracting challenges for system design and integration. SIGBED Rev. 14(3): 45-48 (2017) - [j46]Leonardo Ecco, Rolf Ernst:
Tackling the Bus Turnaround Overhead in Real-Time SDRAM Controllers. IEEE Trans. Computers 66(11): 1961-1974 (2017) - [j45]Matthias Beckert, Rolf Ernst:
Response Time Analysis for Sporadic Server Based Budget Scheduling in Real Time Virtualization Environments. ACM Trans. Embed. Comput. Syst. 16(5s): 161:1-161:19 (2017) - [j44]Johannes Schlatow, Rolf Ernst:
Response-Time Analysis for Task Chains with Complex Precedence and Blocking Relations. ACM Trans. Embed. Comput. Syst. 16(5s): 172:1-172:19 (2017) - [c242]Adam Kostrzewa, Sebastian Tobuschat, Leonardo Ecco, Rolf Ernst:
Adaptive load distribution in mixed-critical Networks-on-Chip. ASP-DAC 2017: 732-737 - [c241]Zain Alabedin Haj Hammadeh, Rolf Ernst, Sophie Quinton, Rafik Henia, Laurent Rioux:
Bounding deadline misses in weakly-hard real-time systems with task dependencies. DATE 2017: 584-589 - [c240]Sebastian Tobuschat, Rolf Ernst:
Real-time communication analysis for Networks-on-Chip with backpressure. DATE 2017: 590-595 - [c239]Leonardo Ecco, Rolf Ernst:
Architecting high-speed command schedulers for open-row real-time SDRAM controllers. DATE 2017: 626-629 - [c238]Matthias Beckert, Kai Bjorn Gemlau, Rolf Ernst:
Exploiting sporadic servers to provide budget scheduling for ARINC653 based real-time virtualization environments. DATE 2017: 870-875 - [c237]Johannes Schlatow, Mischa Möstl, Rolf Ernst, Marcus Nolte, Inga Jatzkowski, Markus Maurer, Christian Herber, Andreas Herkersdorf:
Self-awareness in autonomous automotive systems. DATE 2017: 1050-1055 - [c236]Tobias Sehnke, Matthias Schultalbers, Rolf Ernst:
Contract-based integration of automotive control software. DATE 2017: 1611-1614 - [c235]Zain Alabedin Haj Hammadeh, Sophie Quinton, Marco Panunzio, Rafik Henia, Laurent Rioux, Rolf Ernst:
Budgeting Under-Specified Tasks for Weakly-Hard Real-Time Systems. ECRTS 2017: 17:1-17:22 - [c234]Eberle A. Rambo, Rolf Ernst:
Replica-Aware Co-Scheduling for Mixed-Criticality. ECRTS 2017: 20:1-20:20 - [c233]Johannes Schlatow, Mischa Möstl, Rolf Ernst, Marcus Nolte, Inga Jatzkowski, Markus Maurer:
Towards model-based integration of component-based automotive software systems. IECON 2017: 8425-8432 - [c232]Eberle A. Rambo, Christoph Seitz, Selma Saidi, Rolf Ernst:
Designing Networks-on-Chip for High Assurance Real-Time Systems. PRDC 2017: 185-194 - [c231]Sebastian Tobuschat, Rolf Ernst:
Efficient Latency Guarantees for Mixed-Criticality Networks-on-Chip. RTAS 2017: 113-122 - [c230]Rafik Henia, Lisa Roux, Nicolas Sordon, Zain Alabedin Haj Hammadeh, Rolf Ernst, Sophie Quinton:
Demo Abstract: Bounding Deadline Misses for Weakly-Hard Real-Time Systems Designed in CAPELLA. RTAS 2017: 155-156 - [c229]Leonie Ahrendts, Sophie Quinton, Rolf Ernst:
Finite ready queues as a mean for overload reduction in weakly-hard real-time systems. RTNS 2017: 88-97 - [c228]Tobias Sehnke, Dieter Schwarzmann, Matthias Schultalbers, Rolf Ernst:
Temporal properties in automotive control software. RTNS 2017: 98-107 - [c227]Thawra Kadeed, Eberle A. Rambo, Rolf Ernst:
Power and area evaluation of a fault-tolerant network-on-chip. SoCC 2017: 190-195 - [c226]Sebastian Tobuschat, Rolf Ernst:
Providing throughput guarantees in mixed-criticality networks-on-chip. SoCC 2017: 292-297 - [p6]Robin Hofmann, Leonie Ahrendts, Rolf Ernst:
CPA: Compositional Performance Analysis. Handbook of Hardware/Software Codesign 2017: 721-751 - [p5]Haibo Zeng, Prachi Joshi, Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Petru Eles:
Networked Real-Time Embedded Systems. Handbook of Hardware/Software Codesign 2017: 753-792 - [i2]Tobias Sehnke, Matthias Schultalbers, Rolf Ernst:
Temporal Properties in Component-Based Cyber Physical Systems - Appendix. CoRR abs/1711.09130 (2017) - 2016
- [j43]Rolf Ernst:
Report of the 2015 Embedded Systems Week (ESWEEK). IEEE Des. Test 33(2): 97-98 (2016) - [j42]Rolf Ernst, Marco Di Natale:
Mixed Criticality Systems - A History of Misconceptions? IEEE Des. Test 33(5): 65-74 (2016) - [j41]Daniel Thiele, Johannes Schlatow, Philip Axer, Rolf Ernst:
Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networks. Real Time Syst. 52(1): 88-112 (2016) - [j40]Rolf Ernst:
Special issue of the Euromicro Conference on Real-Time Systems (ECRTS). Real Time Syst. 52(5): 563-565 (2016) - [j39]Petru Eles, Rolf Ernst:
Guest Editorial for Special Issue of ESWEEK 2015. ACM Trans. Embed. Comput. Syst. 15(4): 63:1-63:2 (2016) - [c225]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Dynamic admission control for real-time networks-on-chips. ASP-DAC 2016: 719-724 - [c224]Mischa Möstl, Johannes Schlatow, Rolf Ernst, Henry Hoffmann, Arif Merchant, Alexander Shraer:
Self-aware systems for the internet-of-things. CODES+ISSS 2016: 21:1-21:9 - [c223]Nikil D. Dutt, Fadi J. Kurdahi, Rolf Ernst, Andreas Herkersdorf:
Conquering MPSoC complexity with principles of a self-aware information processing factory. CODES+ISSS 2016: 37:1-37:4 - [c222]Mischa Möstl, Daniel Thiele, Rolf Ernst:
Invited - Towards fail-operational ethernet based in-vehicle networks. DAC 2016: 53:1-53:6 - [c221]Daniel Thiele, Rolf Ernst:
Formal analysis based evaluation of software defined networking for time-sensitive Ethernet. DATE 2016: 31-36 - [c220]Eberle A. Rambo, Selma Saidi, Rolf Ernst:
Providing formal latency guarantees for ARQ-based protocols in Networks-on-Chip. DATE 2016: 103-108 - [c219]Daniel Thiele, Rolf Ernst:
Formal worst-case timing analysis of Ethernet TSN's burst-limiting shaper. DATE 2016: 187-192 - [c218]Adam Kostrzewa, Selma Saidi, Rolf Ernst:
Slack-based resource arbitration for real-time Networks-on-Chip. DATE 2016: 1012-1017 - [c217]Mischa Moestl, Rolf Ernst:
Handling complex dependencies in system design. DATE 2016: 1120-1123 - [c216]Leonie Ahrendts, Zain Alabedin Haj Hammadeh, Rolf Ernst:
Guarantees for runnable entities with heterogeneous real-time requirements. DATE 2016: 1646-1651 - [c215]Werner Weber, Alfred Hoess, Jan van Deventer, Frank Oppenheimer, Rolf Ernst, Adam Kostrzewa, Philippe Dore, Thierry Goubier, Haris Isakovic, Norbert Druml, Egon Wuchner, Daniel Schneider, Erwin Schoitsch, Eric Armengaud, Thomas Soderqvist, Massimo Traversone, Sascha Uhrig, Juan-Carlos Perez-Cortes, Sergio Sáez, Juha Kuusela, Mark van Helvoort, Xing Cai, Bjørn Nordmoen, Geir Yngve Paulsen, Hans Petter Dahle, Michael Geissel, Jürgen Salecker, Peter Tummeltshammer:
The EMC2 Project on Embedded Microcontrollers: Technical Progress after Two Years. DSD 2016: 524-531 - [c214]Leonardo Ecco, Adam Kostrzewa, Rolf Ernst:
Minimizing DRAM Rank Switching Overhead for Improved Timing Bounds and Performance. ECRTS 2016: 3-13 - [c213]Adam Kostrzewa, Rolf Ernst, Selma Saidi:
Multi-Path Scheduling for Multimedia Traffic in Safety Critical On-chip Network. ESTIMedia 2016: 37-46 - [c212]Matthias Beckert, Mischa Möstl, Rolf Ernst:
Zero-time communication for automotive multi-core systems under SPP scheduling. ETFA 2016: 1-9 - [c211]Daniel Thiele, Rolf Ernst:
Formal worst-case performance analysis of time-sensitive Ethernet with frame preemption. ETFA 2016: 1-9 - [c210]Adam Kostrzewa, Sebastian Tobuschat, Rolf Ernst, Selma Saidi:
Safe and dynamic traffic rate control for networks-on-chips. NOCS 2016: 1-8 - [c209]Johannes Schlatow, Jonas Peeck, Rolf Ernst:
Demo Abstract: Response-Time Analysis for Task Chains in Communicating Threads with pyCPA. RTAS 2016: 66 - [c208]Johannes Schlatow, Rolf Ernst:
Response-Time Analysis for Task Chains in Communicating Threads. RTAS 2016: 245-254 - [c207]Adam Kostrzewa, Sebastian Tobuschat, Selma Saidi, Rolf Ernst:
Supporting Suspension-based Locking Mechanisms for Real-Time Networks-on-chip. RTNS 2016: 215-224 - [c206]Sebastian Tobuschat, Rolf Ernst, Arne Hamann, Dirk Ziegenbein:
System-level timing feasibility test for cyber-physical automotive systems. SIES 2016: 121-130 - 2015
- [j38]Muhammad Shafique, Philip Axer, Christoph Borchert, Jian-Jia Chen, Kuan-Hsun Chen, Björn Döbel, Rolf Ernst, Hermann Härtig, Andreas Heinig, Rüdiger Kapitza, Florian Kriebel, Daniel Lohmann, Peter Marwedel, Semeen Rehman, Florian Schmoll, Olaf Spinczyk:
Multi-layer software reliability for unreliable hardware. it Inf. Technol. 57(3): 170-180 (2015) - [c205]Selma Saidi, Rolf Ernst, Sascha Uhrig, Henrik Theiling, Benoît Dupont de Dinechin:
The shift to multicores in real-time and safety-critical systems. CODES+ISSS 2015: 220-229 - [c204]Daniel Thiele, Philip Axer, Rolf Ernst:
Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling. DAC 2015: 41:1-41:6 - [c203]Matthias Beckert, Rolf Ernst:
Designing time partitions for real-time hypervisor with sufficient temporal independence. DAC 2015: 182:1-182:6 - [c202]Eberle A. Rambo, Rolf Ernst:
Worst-case communication time analysis of networks-on-chip with shared virtual channels. DATE 2015: 537-542 - [c201]Wenbo Xu, Zain Alabedin Haj Hammadeh, Alexander Kröller, Rolf Ernst, Sophie Quinton:
Improved Deadline Miss Models for Real-Time Systems Using Typical Worst-Case Analysis. ECRTS 2015: 247-256 - [c200]Stefan Wonneberger, Peter Mühlfellner, Pedro Ceriotti, Thorsten Graf, Rolf Ernst:
Parallel feature extraction and heterogeneous object-detection for multi-camera driver assistance systems. FPL 2015: 1-4 - [c199]Johannes Schlatow, Mischa Moestl, Rolf Ernst:
An Extensible Autonomous Reconfiguration Framework for Complex Component-Based Embedded Systems. ICAC 2015: 239-242 - [c198]Yidi Zeng, Harald Schrom, Rolf Ernst:
An approach for physical topology exploration in wired bus networks. ISCAS 2015: 205-208 - [c197]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Flexible TDM-based resource management in on-chip networks. RTNS 2015: 151-160 - [c196]Leonardo Ecco, Rolf Ernst:
Improved DRAM Timing Bounds for Real-Time DRAM Controllers with Read/Write Bundling. RTSS 2015: 53-64 - [c195]Adam Kostrzewa, Selma Saidi, Rolf Ernst:
Dynamic Control for Mixed-Critical Networks-on-Chip. RTSS 2015: 317-326 - [c194]Leonardo Ecco, Selma Saidi, Adam Kostrzewa, Rolf Ernst:
Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs. SIES 2015: 29-38 - [c193]Daniel Thiele, Rolf Ernst, Jonas Diemer:
Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers. VNC 2015: 251-258 - 2014
- [j37]Philip Axer, Rolf Ernst, Heiko Falk, Alain Girault, Daniel Grund, Nan Guan, Bengt Jonsson, Peter Marwedel, Jan Reineke, Christine Rochange, Maurice Sebastian, Reinhard von Hanxleden, Reinhard Wilhelm, Wang Yi:
Building timing predictable embedded systems. ACM Trans. Embed. Comput. Syst. 13(4): 82:1-82:37 (2014) - [c192]Daniel Thiele, Philip Axer, Rolf Ernst, Jan R. Seyler:
Improving formal timing analysis of switched ethernet by exploiting traffic stream correlations. CODES+ISSS 2014: 15:1-15:10 - [c191]Sebastian Tobuschat, Moritz Neukirchner, Leonardo Ecco, Rolf Ernst:
Workload-aware shaping of shared resource accesses in mixed-criticality systems. CODES+ISSS 2014: 35:1-35:10 - [c190]Philip Axer, Daniel Thiele, Rolf Ernst, Jonas Diemer:
Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks. DAC 2014: 18:1-18:6 - [c189]Sophie Quinton, Torsten T. Bone, Julien Hennig, Moritz Neukirchner, Mircea Negrean, Rolf Ernst:
Typical Worst Case Response-Time Analysis and its Use in Automotive Network Design. DAC 2014: 44:1-44:6 - [c188]Matthias Beckert, Moritz Neukirchner, Rolf Ernst, Stefan M. Petters:
Sufficient Temporal Independence and Improved Interrupt Latencies in a Real-Time Hypervisor. DAC 2014: 86:1-86:6 - [c187]Eberle A. Rambo, Alexander Tschiene, Jonas Diemer, Leonie Ahrendts, Rolf Ernst:
Failure analysis of a network-on-chip for real-time mixed-critical systems. DATE 2014: 1-4 - [c186]Zain Alabedin Haj Hammadeh, Sophie Quinton, Rolf Ernst:
Extending typical worst-case analysis using response-time dependencies to bound deadline misses. EMSOFT 2014: 10:1-10:10 - [c185]Stefan Wonneberger, Max Kohler, Wojciech Derendarz, Thorsten Graf, Rolf Ernst:
Efficient 3D triangulation in hardware for dense structure-from-motion in low-speed automotive scenarios. FPL 2014: 1-6 - [c184]Andreas Reschka, Marcus Nolte, Torben Stolte, Johannes Schlatow, Rolf Ernst, Markus Maurer:
Specifying a middleware for distributed embedded vehicle control systems. ICVES 2014: 117-122 - [c183]Eberle A. Rambo, Alexander Tschiene, Jonas Diemer, Leonie Ahrendts, Rolf Ernst:
FMEA-based analysis of a Network-on-Chip for mixed-critical systems. NOCS 2014: 33-40 - [c182]Leonardo Ecco, Sebastian Tobuschat, Selma Saidi, Rolf Ernst:
A mixed critical memory controller using bank privatization and fixed priority scheduling. RTCSA 2014: 1-10 - [c181]Philip Axer, Daniel Thiele, Rolf Ernst:
Formal timing analysis of automatic repeat request for switched real-time networks. SIES 2014: 78-87 - [c180]Adam Kostrzewa, Sebastian Tobuschat, Philip Axer, Rolf Ernst:
Supervised sharing of virtual channels in Networks -on-Chip. SIES 2014: 133-140 - [p4]Moritz Neukirchner, Steffen Stein, Rolf Ernst:
Distributed Priority Assignment in Real-Time Systems. Embedded Systems Development, From Functional Models to Implementations 2014: 173-187 - [e3]Karam S. Chatha, Rolf Ernst, Anand Raghunathan, Ravishankar R. Iyer:
2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014, Uttar Pradesh, India, October 12-17, 2014. ACM 2014, ISBN 978-1-4503-3050-3 [contents] - 2013
- [j36]Jonas Rox, Rolf Ernst:
Compositional performance analysis with improved analysis techniques for obtaining viable end-to-end latencies in distributed embedded systems. Int. J. Softw. Tools Technol. Transf. 15(3): 171-187 (2013) - [j35]Nikolaos S. Voros, Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma, Arnaud Grasset, Paul Brelet, Philippe Bonnot, Fabio Campi, Eberhard Schüler, Henning Sahlbach, Sean Whitty, Rolf Ernst, Enrico Billich, Claudia Tischendorf, Ulrich Heinkel, Frank Ieromnimon, Dimitrios Kritharidis, Axel Schneider, Joachim Knäblein, Wolfram Putzke-Röming:
MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems. ACM Trans. Embed. Comput. Syst. 12(3): 70:1-70:33 (2013) - [j34]Davide Rossi, Claudio Mucci, Fabio Campi, Simone Spolzino, Luca Vanzolini, Henning Sahlbach, Sean Whitty, Rolf Ernst, Wolfram Putzke-Röming, Roberto Guerrieri:
Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor. IEEE Trans. Very Large Scale Integr. Syst. 21(2): 193-205 (2013) - [c179]Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Jan R. Seyler:
Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet. CODES+ISSS 2013: 25:1-25:10 - [c178]Moritz Neukirchner, Kai Lampka, Sophie Quinton, Rolf Ernst:
Multi-mode monitoring for mixed-criticality real-time systems. CODES+ISSS 2013: 34:1-34:10 - [c177]Philip Axer, Rolf Ernst:
Stochastic response-time guarantee for non-preemptive, fixed-priority scheduling under errors. DAC 2013: 172:1-172:7 - [c176]Moritz Neukirchner, Sophie Quinton, Tobias Michaels, Philip Axer, Rolf Ernst:
Sensitivity analysis for arbitrary activation patterns in real-time systems. DATE 2013: 135-140 - [c175]Mircea Negrean, Sebastian Klawitter, Rolf Ernst:
Timing analysis of multi-mode applications on AUTOSAR conform multi-core systems. DATE 2013: 302-307 - [c174]Sophie Quinton, Mircea Negrean, Rolf Ernst:
Formal analysis of sporadic bursts in real-time systems. DATE 2013: 767-772 - [c173]Philip Axer, Sophie Quinton, Moritz Neukirchner, Rolf Ernst, Björn Döbel, Hermann Härtig:
Response-Time Analysis of Parallel Fork-Join Workloads with Real-Time Constraints. ECRTS 2013: 215-224 - [c172]Rolf Ernst, Oleg Sokolsky:
Message from the program co-chairs. EMSOFT 2013 - [c171]Henning Sahlbach, Rolf Ernst, Stefan Wonneberger, Thorsten Graf:
Exploration of FPGA-based dense block matching for motion estimation and stereo vision on a single chip. Intelligent Vehicles Symposium 2013: 823-828 - [c170]Henning Sahlbach, Rolf Ernst:
Towards a Certifiable Integration of SRAM-Based FPGAs in Safety-Critical Automotive Systems. PRDC 2013: 303-311 - [c169]Sebastian Tobuschat, Philip Axer, Rolf Ernst, Jonas Diemer:
IDAMC: A NoC for mixed criticality systems. RTCSA 2013: 149-156 - [c168]Moritz Neukirchner, Philip Axer, Tobias Michaels, Rolf Ernst:
Monitoring of Workload Arrival Functions for Mixed-Criticality Systems. RTSS 2013: 88-96 - [e2]Rolf Ernst, Oleg Sokolsky:
Proceedings of the International Conference on Embedded Software, EMSOFT 2013, Montreal, QC, Canada, September 29 - Oct. 4, 2013. IEEE 2013, ISBN 978-1-4799-1443-2 [contents] - 2012
- [c167]Rolf Ernst, Harald Michalik, Peter Rüffer:
Institut für Datentechnik und Kommunikationsnetze - Mitgestaltung der Informatik in Braunschweig. 40 Jahre Informatik @ Braunschweig 2012: 44-53 - [c166]Jonas Rox, Mircea Negrean, Simon Schliecker, Rolf Ernst:
System Level Performance Analysis for Real-Time Multi-Core and Network Architectures. Advances in Real-Time Systems 2012: 171-189 - [c165]Randolf Mock, Moritz Neukirchner, Rolf Ernst, Ruud Wijtvliet, Michael Huetwohl, Pascal Urard, Ovidiu Vermesan:
Internet-of-energy: combining embedded computing and communication for the smart grid. CODES+ISSS 2012: 7-8 - [c164]Dan Gunnarsson, Stefan Kuntz, Glenn Farrall, Akihito Iwai, Rolf Ernst:
Trends in automotive embedded systems. CODES+ISSS 2012: 9-10 - [c163]Jonas Rox, Rolf Ernst, Paolo Giusto:
Using timing analysis for the design of future switched based Ethernet automotive networks. DATE 2012: 57-62 - [c162]Henning Sahlbach, Sean Whitty, Rolf Ernst:
A high-performance dense block matching solution for automotive 6D-vision. DATE 2012: 268-271 - [c161]Sophie Quinton, Matthias Hanke, Rolf Ernst:
Formal analysis of sporadic overload in real-time systems. DATE 2012: 515-520 - [c160]Daniel Thiele, Rolf Ernst:
Optimizing performance analysis for synchronous dataflow graphs with shared resources. DATE 2012: 635-640 - [c159]Sophie Quinton, Rolf Ernst, Dominique Bertrand, Patrick Meumeu Yomsi:
Challenges and new trends in probabilistic timing analysis. DATE 2012: 810-815 - [c158]Philip Axer, Maurice Sebastian, Rolf Ernst:
Probabilistic response time bound for CAN messages with arbitrary deadlines. DATE 2012: 1114-1117 - [c157]Moritz Neukirchner, Steffen Stein, Rolf Ernst:
Deriving Monitoring Bounds for Distributed Real-Time Systems. ECRTS 2012: 57-67 - [c156]Rolf Ernst, Alan Burns, Lothar Thiele, Jimmy Le Rhun:
Mixed critical system design and analysis. EMSOFT 2012: 247-248 - [c155]Philip Axer, Rolf Ernst:
Designing an Analyzable and Resilient Embedded Operating System. GI-Jahrestagung 2012: 506-520 - [c154]Boris Motruk, Jonas Diemer, Rainer Buchty, Rolf Ernst, Mladen Berekovic:
IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality. HASE 2012: 24-31 - [c153]Jonas Diemer, Jonas Rox, Rolf Ernst, Feng Chen, Karl-Theo Kremer, Kai Richter:
Exploring the worst-case timing of Ethernet AVB for industrial applications. IECON 2012: 3182-3187 - [c152]Sophie Quinton, Rolf Ernst:
Generalized Weakly-Hard Constraints. ISoLA (2) 2012: 96-110 - [c151]Moritz Neukirchner, Tobias Michaels, Philip Axer, Sophie Quinton, Rolf Ernst:
Monitoring Arbitrary Activation Patterns in Real-Time Systems. RTSS 2012: 293-302 - [c150]Jonas Diemer, Daniel Thiele, Rolf Ernst:
Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching. SIES 2012: 1-10 - [c149]Moritz Neukirchner, Mircea Negrean, Rolf Ernst, Torsten T. Bone:
Response-time analysis of the flexray dynamic segment under consideration of slot-multiplexing. SIES 2012: 21-30 - [c148]Mircea Negrean, Rolf Ernst:
Response-time analysis for non-preemptive scheduling in multi-core systems with shared resources. SIES 2012: 191-200 - 2011
- [j33]Arnaud Grasset, Philippe Millet, Philippe Bonnot, Sami Yehia, Wolfram Putzke-Röming, Fabio Campi, Alberto Rosti, Michael Hübner, Nikolaos S. Voros, Davide Rossi, Henning Sahlbach, Rolf Ernst:
The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform. Int. J. Parallel Program. 39(3): 328-356 (2011) - [j32]Philip Axer, Jonas Diemer, Mircea Negrean, Maurice Sebastian, Simon Schliecker, Rolf Ernst:
Mastering MPSoCs for Mixed-critical Applications. Inf. Media Technol. 6(4): 1027-1052 (2011) - [j31]Philip Axer, Jonas Diemer, Mircea Negrean, Maurice Sebastian, Simon Schliecker, Rolf Ernst:
Mastering MPSoCs for Mixed-critical Applications. IPSJ Trans. Syst. LSI Des. Methodol. 4: 91-116 (2011) - [c147]Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich:
Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78 - [c146]Philip Axer, Maurice Sebastian, Rolf Ernst:
Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints. CODES+ISSS 2011: 149-158 - [c145]Jonas Diemer, Jonas Rox, Mircea Negrean, Steffen Stein, Rolf Ernst:
Real-time communication analysis for networks with two-stage arbitration. EMSOFT 2011: 243-252 - [c144]Mircea Negrean, Moritz Neukirchner, Steffen Stein, Simon Schliecker, Rolf Ernst:
Bounding mode change transition latencies for multi-mode real-time distributed applications. ETFA 2011: 1-10 - [c143]Moritz Neukirchner, Steffen Stein, Rolf Ernst:
A Lazy Algorithm for Distributed Priority Assignment in Real-Time Systems. ISORC Workshops 2011: 126-132 - [c142]Maurice Sebastian, Philip Axer, Rolf Ernst:
Utilizing Hidden Markov Models for Formal Reliability Analysis of Real-Time Communication Systems with Errors. PRDC 2011: 79-88 - [c141]Steffen Stein, Moritz Neukirchner, Rolf Ernst:
Admission control and self-configuration in the EPOC framework. ICSAMOS 2011: 364-371 - [c140]Moritz Neukirchner, Steffen Stein, Harald Schrom, Johannes Schlatow, Rolf Ernst:
Contract-based dynamic task management for mixed-criticality systems. SIES 2011: 18-27 - [p3]Moritz Neukirchner, Steffen Stein, Rolf Ernst:
The EPOC Architecture - Enabling Evolution Under Hard Constraints. Organic Computing 2011: 399-412 - 2010
- [j30]Jonas Rox, Kerstin Schmidt, A. Winter, Thomas Spengler, Rolf Ernst:
Estimating and Mitigating Design Risk in a Flexible Distributed Design Process. IEEE Embed. Syst. Lett. 2(2): 35-38 (2010) - [j29]Twan Basten, Rolf Ernst:
Editorial: Model-driven embedded-system design. ACM Trans. Embed. Comput. Syst. 10(2): 15:1-15:4 (2010) - [j28]Simon Schliecker, Rolf Ernst:
Real-time performance analysis of multiprocessor systems with shared memory. ACM Trans. Embed. Comput. Syst. 10(2): 22:1-22:27 (2010) - [c139]Jonas Diemer, Rolf Ernst, Michael Kauschke:
Efficient throughput-guarantees for latency-sensitive networks-on-chip. ASP-DAC 2010: 529-534 - [c138]Jonas Rox, Rolf Ernst:
Exploiting inter-event stream correlations between output event streams of non-preemptively scheduled tasks. DATE 2010: 226-231 - [c137]Sean Whitty, Henning Sahlbach, Brady Hurlburt, Rolf Ernst, Wolfram Putzke-Röming:
Application-specific memory performance of a heterogeneous reconfigurable architecture. DATE 2010: 387-392 - [c136]Simon Schliecker, Mircea Negrean, Rolf Ernst:
Bounding the shared resource load for the performance analysis of multiprocessor systems. DATE 2010: 759-764 - [c135]Moritz Neukirchner, Steffen Stein, Harald Schrom, Rolf Ernst:
A software update service with self-protection capabilities. DATE 2010: 903-908 - [c134]Steffen Stein, Matthias Ivers, Jonas Diemer, Rolf Ernst:
A Polynomial-Time Algorithm for Computing Response Time Bounds in Static Priority Scheduling Employing Multi-linear Workload Bounds. ECRTS 2010: 261-270 - [c133]Henning Sahlbach, Sean Whitty, Oliver Bende, Rolf Ernst:
A Scalable, High-Performance Motion Estimation Application for a Weakly-Programmable FPGA Architecture. FPL 2010: 15-18 - [c132]Rolf Ernst:
Safety, Efficiency and Autonomy - Mastering Conflicting Trends in Embedded Systems Design. DIPES/BICC 2010: 5-6 - [c131]Steffen Stein, Moritz Neukirchner, Harald Schrom, Rolf Ernst:
Consistency Challenges in Self-Organizing Distributed Hard Real-Time Systems. ISORC Workshops 2010: 39-48 - [c130]Jonas Diemer, Rolf Ernst:
Back Suction: Service Guarantees for Latency-Sensitive On-chip Networks. NOCS 2010: 155-162
2000 – 2009
- 2009
- [j27]Simon Perathoner, Ernesto Wandeler, Lothar Thiele, Arne Hamann, Simon Schliecker, Rafik Henia, Razvan Racu, Rolf Ernst, Michael González Harbour:
Influence of different abstractions on the performance analysis of distributed hard real-time systems. Des. Autom. Embed. Syst. 13(1-2): 27-49 (2009) - [j26]Simon Schliecker, Jonas Rox, Mircea Negrean, Kai Richter, Marek Jersak, Rolf Ernst:
System Level Performance Analysis for Real-Time Automotive Multicore and Network Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7): 979-992 (2009) - [j25]Amilcar do Carmo Lucas, Henning Sahlbach, Sean Whitty, Sven Heithecker, Rolf Ernst:
Application development with the FlexWAFE real-time stream processing architecture for FPGAs. ACM Trans. Embed. Comput. Syst. 9(1): 4:1-4:23 (2009) - [j24]Simon Schliecker, Mircea Negrean, Rolf Ernst:
Response Time Analysis in Multicore ECUs with Shared Resources. IEEE Trans. Ind. Informatics 5(4): 402-413 (2009) - [c129]Simon Schliecker, Rolf Ernst:
A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems. CODES+ISSS 2009: 433-442 - [c128]Sean Whitty, Henning Sahlbach, Rolf Ernst, Wolfram Putzke-Röming:
Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architecture. DATE 2009: 27-32 - [c127]Mircea Negrean, Simon Schliecker, Rolf Ernst:
Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources. DATE 2009: 524-529 - [c126]Jonas Diemer, Rolf Ernst:
A link arbitration scheme for quality of service in a latency-optimized network-on-chip. DATE 2009: 574-577 - [c125]Kai Richter, Marek Jersak, Rolf Ernst:
Learning early-stage platform dimensioning from late-stage timing verification. DATE 2009: 851-857 - [c124]Ahmed Amine Jerraya, Rolf Ernst:
Panel session - Multicore, will Startups drive innovation? DATE 2009: 1403 - [c123]Mladen Berekovic, Matthias Hanke, Thomas Schuster, Tim Kranich, Rolf Ernst:
ESL design in the context of embedded systems education. WESE@ESWEEK 2009: 13-18 - [c122]Davide Rossi, Fabio Campi, Antonio Deledda, Claudio Mucci, Stefano Pucillo, Sean Whitty, Rolf Ernst, Stéphane Chevobbe, Stéphane Guyetant, Matthias Kühnle, Michael Hübner, Jürgen Becker, Wolfram Putzke-Röming:
A multi-core signal processor for heterogeneous reconfigurable computing. SoC 2009: 106-109 - [c121]Maurice Sebastian, Rolf Ernst:
Reliability Analysis of Single Bus Communication with Real-Time Requirements. PRDC 2009: 3-10 - [c120]Matthias Ivers, Rolf Ernst:
Probabilistic Network Loads with Dependencies and the Effect on Queue Sojourn Times. QSHINE 2009: 280-296 - [c119]Matthias Ivers, Rolf Ernst:
Dependency-aware stochastic analysis of chained execution times. SIES 2009: 70-73 - 2008
- [j23]Razvan Racu, Arne Hamann, Rolf Ernst:
Sensitivity analysis of complex embedded real-time systems. Real Time Syst. 39(1-3): 31-72 (2008) - [c118]Steffen Stein, Rolf Ernst:
Distributed Performance Control in Organic Embedded Systems. ATC 2008: 331-342 - [c117]Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre G. Paulin, Rolf Ernst:
Reliable performance analysis of a multicore multithreaded system-on-chip. CODES+ISSS 2008: 161-166 - [c116]Simon Schliecker, Jonas Rox, Matthias Ivers, Rolf Ernst:
Providing accurate event models for the analysis of heterogeneous multiprocessor systems. CODES+ISSS 2008: 185-190 - [c115]Rolf Ernst, Marek Jersak, Hans Sarnowski, Marco Bekooij, Samarjit Chakraborty:
Formal Methods in System and MpSoC Performance Analysis and Optimisation. DATE 2008 - [c114]Jonas Rox, Rolf Ernst:
Modeling Event Stream Hierarchies with Hierarchical Event Models. DATE 2008: 492-497 - [c113]E. Frank, Reinhard Wilhelm, Rolf Ernst, Alberto L. Sangiovanni-Vincentelli, Marco Di Natale:
Methods, Tools and Standards for the Analysis, Evaluation and Design of Modern Automotive Architectures. DATE 2008: 659-663 - [c112]Jonas Rox, Rolf Ernst:
Construction and Deconstruction of Hierarchical Event Streams with Multiple Hierarchical Layers. ECRTS 2008: 201-210 - [c111]Maurice Sebastian, Rolf Ernst:
Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements. ETFA 2008: 1465-1472 - [c110]Sean Whitty, Rolf Ernst:
A bandwidth optimized SDRAM controller for the MORPHEUS reconfigurable architecture. IPDPS 2008: 1-8 - 2007
- [j22]Sven Heithecker, Amilcar do Carmo Lucas, Rolf Ernst:
A High-End Real-Time Digital Film Processing Reconfigurable Platform. EURASIP J. Embed. Syst. 2007 (2007) - [j21]Jan Staschulat, Rolf Ernst:
Scalable precision cache analysis for real-time software. ACM Trans. Embed. Comput. Syst. 6(4): 25 (2007) - [c109]Simon Künzli, Arne Hamann, Rolf Ernst, Lothar Thiele:
Combined approach to system level performance analysis of embedded systems. CODES+ISSS 2007: 63-68 - [c108]Razvan Racu, Li Li, Rafik Henia, Arne Hamann, Rolf Ernst:
Improved response time analysis of tasks scheduled under preemptive Round-Robin. CODES+ISSS 2007: 179-184 - [c107]Rolf Ernst, Gernot Spiegelberg, Thomas Weber, Hermann Kopetz, Alberto L. Sangiovanni-Vincentelli, Marek Jersak:
Automotive networks: are new busses and gateways the answer or just another challenge? CODES+ISSS 2007: 263 - [c106]Razvan Racu, Arne Hamann, Rolf Ernst, Kai Richter:
Automotive Software Integration. DAC 2007: 545-550 - [c105]Amilcar do Carmo Lucas, Sven Heithecker, Rolf Ernst:
FlexWAFE - A High-end Real-Time Stream Processing Library for FPGAs. DAC 2007: 916-921 - [c104]Simon Schliecker, Steffen Stein, Rolf Ernst:
Performance analysis of complex systems by integration of dataflow graphs and compositional performance analysis. DATE 2007: 273-278 - [c103]Arne Hamann, Razvan Racu, Rolf Ernst:
Methods for multi-dimensional robustness optimization in complex embedded systems. EMSOFT 2007: 104-113 - [c102]Simon Perathoner, Ernesto Wandeler, Lothar Thiele, Arne Hamann, Simon Schliecker, Rafik Henia, Razvan Racu, Rolf Ernst, Michael González Harbour:
Influence of different system abstractions on the performance analysis of distributed real-time systems. EMSOFT 2007: 193-202 - [c101]Arne Hamann, Rolf Ernst:
Efficient priority optimization in complex distributed embedded systems through search space adaptation. GECCO 2007: 1517 - [c100]Razvan Racu, Arne Hamann, Rolf Ernst:
Automotive System Optimization using Sensitivity Analysis. IESS 2007: 57-70 - [c99]Rafik Henia, Razvan Racu, Rolf Ernst:
Improved Output Jitter Calculation for Compositional Performance Analysis of Distributed Systems. IPDPS 2007: 1-8 - [c98]Arne Hamann, Razvan Racu, Rolf Ernst:
Multi-dimensional Robustness Optimization in Heterogeneous Distributed Embedded Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 269-280 - [c97]Rafik Henia, Rolf Ernst:
Scenario Aware Analysis for Complex Event Models and Distributed Systems. RTSS 2007: 171-180 - 2006
- [j20]Arne Hamann, Marek Jersak, Kai Richter, Rolf Ernst:
A framework for modular analysis and exploration of heterogeneous embedded systems. Real Time Syst. 33(1-3): 101-137 (2006) - [c96]Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki, Xiaobo Sharon Hu:
Methods for power optimization in distributed embedded systems with real-time requirements. CASES 2006: 379-388 - [c95]Arne Hamann, Razvan Racu, Rolf Ernst:
A formal approach to robustness maximization of complex heterogeneous embedded systems. CODES+ISSS 2006: 40-45 - [c94]Simon Schliecker, Matthias Ivers, Rolf Ernst:
Integrated analysis of communicating tasks in MPSoCs. CODES+ISSS 2006: 288-293 - [c93]Kai Richter, Rolf Ernst:
How OEMs and suppliers can face the network integration challenges. DATE Designers' Forum 2006: 183-188 - [c92]Amilcar do Carmo Lucas, Sven Heithecker, Peter Rüffer, Rolf Ernst, Holger Rückert, Gerhard Wischermann, Karin Gebel, Reinhard Fach, Wolfgang Huther, Stefan Eichner, Gunter Scheller:
A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications. DATE 2006: 194-199 - [c91]Rafik Henia, Rolf Ernst:
Improved offset-analysis using multiple timing-references. DATE 2006: 450-455 - [c90]Razvan Racu, Arne Hamann, Rolf Ernst:
A Formal Approach to Multi-Dimensional Sensitivity Analysis of Embedded Real-Time Systems. ECRTS 2006: 3-12 - [c89]Jan Staschulat, Rolf Ernst:
Worst case timing analysis of input dependent data cache behavior. ECRTS 2006: 227-236 - [c88]Steffen Stein, Arne Hamann, Rolf Ernst:
Real-time Management in Emergent Systems. GI Jahrestagung (1) 2006: 104-111 - [c87]Steffen Stein, Arne Hamann, Rolf Ernst:
Real-Time Property Verification in Organic Computing Systems. ISoLA 2006: 192-197 - [c86]Jan Staschulat, Jörn-Christian Braam, Rolf Ernst, Thomas Rambow, Rainer Schlör, Rainer Busch:
Cost-Efficient Worst-Case Execution Time Analysis in Industrial Practice. ISoLA 2006: 204-211 - [c85]Wael Adi, Rolf Ernst, Bassel Soudan, Abdulrahman Hanoun:
VLSI Design Exchange with Intellectual Property Protection in FPGA Environment Using both Secret and Public-Key Cryptography. ISVLSI 2006: 24-32 - [c84]Razvan Racu, Rolf Ernst:
Scheduling Anomaly Detection and Optimization for Distributed Systems with Preemptive Task-Sets. IEEE Real Time Technology and Applications Symposium 2006: 325-334 - [c83]Simon Schliecker, Matthias Ivers, Jan Staschulat, Rolf Ernst:
A Framework for the Busy Time Calculation of Multiple Correlated Events. WCET 2006 - [i1]Sven Heithecker, Amilcar do Carmo Lucas, Rolf Ernst:
FlexFilm - an Image Processor for Digital Film Processing. Dynamically Reconfigurable Architectures 2006 - 2005
- [j19]Marek Jersak, Kai Richter, Rolf Ernst:
Performance analysis for complex embedded applications. Int. J. Embed. Syst. 1(1/2): 33-49 (2005) - [c82]Amilcar do Carmo Lucas, Rolf Ernst:
An Image Processor for Digital Film. ASAP 2005: 219-224 - [c81]Sven Heithecker, Rolf Ernst:
Traffic shaping for an FPGA based SDRAM controller with complex QoS requirements. DAC 2005: 575-578 - [c80]Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabian Wolf:
Context Sensitive Performance Analysis of Automotive Applications. DATE 2005: 165-170 - [c79]Arne Hamann, Rolf Ernst:
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques. DATE 2005: 312-317 - [c78]Rafik Henia, Rolf Ernst:
Context-Aware Scheduling Analysis of Distributed Systems with Tree-Shaped Task-Dependencies. DATE 2005: 480-485 - [c77]Judita Kruse, Clive Thomsen, Rolf Ernst, Thomas Volling, Thomas Spengler:
Introducing Flexible Quantity Contracts into Distributed SoC and Embedded System Design Processes. DATE 2005: 938-943 - [c76]Jan Staschulat, Simon Schliecker, Rolf Ernst:
Scheduling Analysis of Real-Time Systems with Precise Modeling of Cache Related Preemption Delay. ECRTS 2005: 41-48 - [c75]Sven Heithecker, Rolf Ernst:
An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping (abstract only). FPGA 2005: 277 - [c74]Christian Haubelt, Marek Jersak, Kai Richter, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich, Lothar Thiele:
SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme. GI Jahrestagung (2) 2005: 693-697 - [c73]Bren Mochocki, Razvan Racu, Rolf Ernst:
Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems. ICCAD 2005: 446-449 - [c72]Clive Thomsen, Judita Kruse, Rolf Ernst:
From Model to Requirements: Pattern-Based Analysis in Distributed Development of Embedded Systems. IESS 2005: 35-44 - [c71]Jan Staschulat, Rolf Ernst:
Scalable precision cache analysis for preemptive scheduling. LCTES 2005: 157-165 - [c70]Kai Richter, Marek Jersak, Rolf Ernst:
Early Architecture Exploration with SymTA/S. MBEES 2005: 125-134 - [c69]Razvan Racu, Marek Jersak, Rolf Ernst:
Applying Sensitivity Analysis in Real-Time Distributed Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 160-169 - [c68]Jan Staschulat, Simon Schliecker, Matthias Ivers, Rolf Ernst:
Analysis of Memory Latencies in Multi-Processor Systems. WCET 2005 - 2004
- [j18]Marek Jersak, Kai Richter, Rolf Ernst:
Interval-based analysis in embedded system design. Math. Comput. Simul. 66(2-3): 231-242 (2004) - [c67]Marek Jersak, Rafik Henia, Rolf Ernst:
Context-Aware Performance Analysis for Efficient Embedded System Design. DATE 2004: 1046-1051 - [c66]Jan Staschulat, Rolf Ernst:
Multiple process execution in cache related preemption delay analysis. EMSOFT 2004: 278-286 - [c65]Razvan Racu, Kai Richter, Rolf Ernst:
Calculating Task Output Event Models to Reduce Distributed System Cost. MBMV 2004: 1-10 - [c64]Arne Hamann, Marek Jersak, Kai Richter, Rolf Ernst:
Design Space Exploration and System Optimization with SymTA/S-Symbolic Timing Analysis for Systems. RTSS 2004: 469-478 - 2003
- [j17]Kai Richter, Marek Jersak, Rolf Ernst:
A Formal Approach to MpSoC Performance Verification. Computer 36(4): 60-67 (2003) - [j16]Rolf Ernst:
Putting It All Together. ACM Queue 1(2): 50-54 (2003) - [c63]Reinaldo A. Bergamaschi, Grant Martin, Wayne H. Wolf, Rolf Ernst, Kees A. Vissers, Jack Kouloheris:
The future of system-level design: can we find the right solutions to the right problems at the right time? CODES+ISSS 2003: 231 - [c62]Marek Jersak, Rolf Ernst:
Enabling scheduling analysis of heterogeneous systems with multi-rate data dependencies and rate intervals. DAC 2003: 454-459 - [c61]Ken Tindell, Hermann Kopetz, Fabian Wolf, Rolf Ernst:
Safe Automotive Software Development. DATE 2003: 10616-10623 - [c60]Marek Jersak, Kai Richter, Rolf Ernst, Jörn-Christian Braam, Zheng-Yu Jiang, Fabian Wolf:
Formal Methods for Integration of Automotive Software. DATE 2003: 20045-20050 - [c59]Marek Jersak, Kai Richter, Rolf Ernst, Jörn-Christian Braam, Zheng-Yu Jiang, Fabian Wolf:
Certifiable Software-Integration for Engine Electronics. MBMV 2003: 102-111 - [c58]Kai Richter, Razvan Racu, Rolf Ernst:
Scheduling Analysis Integration for Heterogeneous Multiprocessor SoC. RTSS 2003: 236-245 - [p2]Marek Jersak, Kai Richter, Razvan Racu, Jan Staschulat, Rolf Ernst, Jörn-Christian Braam, Fabian Wolf:
Formal Methods for Integration of Automotive Software. Embedded Software for SoC 2003: 11-24 - [p1]Ken Tindell, Hermann Kopetz, Fabian Wolf, Rolf Ernst:
Safe Automotive Software Development. Embedded Software for SoC 2003: 333-342 - 2002
- [b2]Giovanni De Micheli, Rolf Ernst, Wayne H. Wolf:
Readings in hardware / software co-design. Morgan Kaufmann 2002, ISBN 978-1-55860-702-6, pp. I-XIV, 1-697 - [j15]Fabian Wolf, Jan Staschulat, Rolf Ernst:
Hybrid Cache Analysis in Running Time Verification of Embedded Software. Des. Autom. Embed. Syst. 7(3): 271-295 (2002) - [j14]Dirk Ziegenbein, Kai Richter, Rolf Ernst, Lothar Thiele, Jürgen Teich:
SPI - a system model for heterogeneously specified embedded systems. IEEE Trans. Very Large Scale Integr. Syst. 10(4): 379-389 (2002) - [c57]Marek Jersak, Kai Richter, Rafik Henia, Rolf Ernst, Frank Slomka:
Transformation of SDL specifications for system-level timing analysis. CODES 2002: 121-126 - [c56]Kai Richter, Dirk Ziegenbein, Marek Jersak, Rolf Ernst:
Model composition for scheduling analysis in platform design. DAC 2002: 287-292 - [c55]Fabian Wolf, Jan Staschulat, Rolf Ernst:
Associative caches in formal software timing analysis. DAC 2002: 622-627 - [c54]Kai Richter, Rolf Ernst:
Event Model Interfaces for Heterogeneous System Analysis. DATE 2002: 506-513 - [c53]Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst:
System Design for Flexibility. DATE 2002: 854-861 - [c52]Kai Richter, Dirk Ziegenbein, Marek Jersak, Rolf Ernst:
Bottom-Up Performance Analysis of HW/SW Platforms. DIPES 2002: 173-183 - [c51]Kai Richter, Rolf Ernst, Wayne H. Wolf:
Local Constraint Derivation for Platform-Based Design. MBMV 2002: 26-35 - [c50]Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst:
Modellierung rekonfigurierbarer Systemarchitekturen. MBMV 2002: 163-171 - [c49]Marek Jersak, Kai Richter, Dirk Ziegenbein, Rolf Ernst, Christian Haubelt, Frank Slomka, Jürgen Teich:
SPI - Workbench für die Analyse Eingebetteter Systeme. Modelle, Werkzeuge und Infrastrukturen zur Unterstützung von Entwicklungsprozessen 2002: 367-368 - [c48]Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst:
Flexibility/Cost-Tradeoffs of Platform-Based Systems. Embedded Processor Design Challenges 2002: 38-56 - 2001
- [j13]Fabian Wolf, Rolf Ernst:
Execution cost interval refinement in static software analysis. J. Syst. Archit. 47(3-4): 339-356 (2001) - [j12]Jörg Henkel, Rolf Ernst:
An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Trans. Very Large Scale Integr. Syst. 9(2): 273-289 (2001) - [j11]Karsten Strehl, Lothar Thiele, Matthias Gries, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich:
FunState-an internal design representation for codesign. IEEE Trans. Very Large Scale Integr. Syst. 9(4): 524-544 (2001) - [j10]Fabian Wolf, Rolf Ernst, Wei Ye:
Path clustering in software timing analysis. IEEE Trans. Very Large Scale Integr. Syst. 9(6): 773-782 (2001) - [c47]Rolf Ernst:
Combining Languages in Embedded System Design. DSD 2001: 62 - [c46]Marek Jersak, Kai Richter, Rolf Ernst:
Combining complex event models and timing constraints. HLDVT 2001: 89-94 - [c45]Dirk Ziegenbein, Fabian Wolf, Kai Richter, Marek Jersak, Rolf Ernst:
Interval-Based Analysis of Software Processes. LCTES/OM 2001: 94-101 - [c44]Dirk Ziegenbein, Fabian Wolf, Kai Richter, Marek Jersak, Rolf Ernst:
Interval-Based Analysis of Software Processes. OM@PLDI 2001: 94-101 - [e1]Rolf Ernst:
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001. IEEE Computer Society 2001, ISBN 0-7803-7249-2 [contents] - 2000
- [j9]Rolf Ernst:
Rapid Prototyping von integrierten Steuerungssystemen. Informationstechnik Tech. Inform. 42(2): 5-7 (2000) - [j8]Rolf Ernst:
Das DFG-Schwerpunktprogramm 1020 (Research Priority Program 1020 of the German "Deutsche Forschungsgemeinschaft"). Informationstechnik Tech. Inform. 42(2): 16-19 (2000) - [c43]Rolf Ernst, Ahmed Amine Jerraya:
embedded system design with multiple languages: embedded tutorial. ASP-DAC 2000: 391-396 - [c42]Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers:
The Future of Flexible HW Platform Architectures Panel Discussion. DATE 2000: 634 - [c41]K. Henriss, Peter Rüffer, Rolf Ernst, Sieghard Hasenzahl:
A Reconfigurable Hardware Platform for Digital Real-Time Signal Processing in Television Studios. FCCM 2000: 285-286 - [c40]Fabian Wolf, Rolf Ernst:
Data flow based cache prediction using local simulation. HLDVT 2000: 155-160 - [c39]Fabian Wolf, Rolf Ernst:
Intervals in Software Execution Cost Analysis. ISSS 2000: 130-136 - [c38]Marek Jersak, Ying Cai, Dirk Ziegenbein, Rolf Ernst:
A Transformational Approach to Constraint Relaxation of a Time-driven Simulation Model. ISSS 2000: 137-142
1990 – 1999
- 1999
- [c37]Stefan Stille, Rolf Ernst:
Using Adaptive Layout Calculation to Handle the Visual Chaos in GUIs. CADUI 1999: 185-198 - [c36]Karsten Strehl, Lothar Thiele, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich:
Scheduling hardware/software systems using symbolic techniques. CODES 1999: 173-177 - [c35]Kai Richter, Dirk Ziegenbein, Rolf Ernst, Lothar Thiele, Jürgen Teich:
Representation of Function Variants for Embedded System Optimization and Synthesis. DAC 1999: 517-522 - [c34]Ahmed Amine Jerraya, Rolf Ernst:
Multi-Language System Design. DATE 1999: 696- - [c33]Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar:
System level design and debug of high-performance embedded media systems (tutorial). ICCAD 1999: 461 - [c32]Dirk Herrmann, Rolf Ernst:
Improved interconnect sharing by identity operation insertion. ICCAD 1999: 489-493 - [c31]Lothar Thiele, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich:
FunState - an internal design representation for codesign. ICCAD 1999: 558-565 - [c30]Dirk Ziegenbein, Kai Richter, Rolf Ernst, Lothar Thiele, Jürgen Teich:
SPI -- An Internal Representation for Heterogeneously Specified Embedded Systems. MBMV 1999: 160-169 - [c29]Achim Österling, Rolf Ernst:
Process Versions in Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping 1999: 94-99 - 1998
- [j7]Rolf Ernst:
Codesign of Embedded Systems: Status and Trends. IEEE Des. Test Comput. 15(2): 45-54 (1998) - [c28]Jörg Henkel, Rolf Ernst:
High-Level Estimation Techniques for Usage in Hardware/Software Co-Design. ASP-DAC 1998: 353-360 - [c27]Dirk Ziegenbein, Rolf Ernst, Kai Richter, Jürgen Teich, Lothar Thiele:
Combining multiple models of computation for scheduling and allocation. CODES 1998: 9-13 - [c26]Dirk Ziegenbein, Kai Richter, Rolf Ernst, Jürgen Teich, Lothar Thiele:
Representation of process mode correlation for scheduling. ICCAD 1998: 54-61 - 1997
- [c25]Thomas Benner, Rolf Ernst:
An Approach to Mixed Systems Co-Synthesis. CODES 1997: 9-14 - [c24]Reinhard Gerndt, Rolf Ernst:
An Event-Driven Multi-Threading Architecture for Embedded Systems. CODES 1997: 29-33 - [c23]Jörg Henkel, Rolf Ernst:
A Hardware/Software Partitioner Using a Dynamically Determined Granularity. DAC 1997: 691-696 - [c22]Dirk Herrmann, Rolf Ernst:
Register synthesis for speculative computation. ED&TC 1997: 463-467 - [c21]Rolf Ernst:
Rapid Prototyping für integrierte Steuerungssysteme mit harten Zeitbedingungen. GI Jahrestagung 1997: 121-122 - [c20]Elmar Maas, Dirk Herrmann, Rolf Ernst, Peter Rüffer, Sieghard Hasenzahl, Martin Seitz:
A processor-coprocessor architecture for high end video applications. ICASSP 1997: 595-598 - [c19]Rolf Ernst, Wei Ye:
Embedded program timing analysis based on path clustering and architecture classification. ICCAD 1997: 598-604 - [c18]Stefan Stille, Shailey Minocha, Rolf Ernst:
An Adaptive Window Management System. INTERACT 1997: 67-68 - 1996
- [j6]Rolf Ernst, Jörg Henkel, Thomas Benner, Wei Ye, Ulrich Holtmann, Dirk Herrmann, Michael Trawny:
The COSYMA environment for hardware/software cosynthesis of small embedded systems. Microprocess. Microsystems 20(3): 159-166 (1996) - [c17]Jörg Henkel, Rolf Ernst:
The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning. CODES 1996: 52-61 - 1995
- [j5]Peter Lüders, Rolf Ernst:
Das Automatisierte Bildschirmlayout. Inform. Forsch. Entwickl. 10(1): 1-13 (1995) - [j4]Peter Lüders, Rolf Ernst, Stefan Stille:
An Approach to Automatic Display Layout Using Combinatorial Optimization Algorithms. Softw. Pract. Exp. 25(11): 1183-1202 (1995) - [c16]Ulrich Holtmann, Rolf Ernst:
Combining MBP-speculative computation and loop pipelining in high-level synthesis. ED&TC 1995: 550-556 - [c15]Thomas Benner, Rolf Ernst, Achim Österling:
Scalable performance scheduling for hardware-software cosynthesis. EURO-DAC 1995: 164-169 - [c14]Peter Lüders, Rolf Ernst:
Research report: improving browsing in information by the automatic display layout. INFOVIS 1995: 26-33 - [c13]Jörg Henkel, Rolf Ernst:
A path-based technique for estimating hardware runtime in HW/SW-cosynthesis. ISSS 1995: 116-121 - [c12]Thomas Benner, Rolf Ernst, Ingo Könenkamp, P. Schüler, H.-C. Schaub:
A prototyping system for verification and evaluation in hardware-software cosynthesis. RSP 1995: 54-61 - 1994
- [c11]Dirk Herrmann, Jörg Henkel, Rolf Ernst:
An approach to the adaptation of estimated cost parameters in the COSYMA system. CODES 1994: 100-107 - [c10]Thomas Benner, Rolf Ernst, Ingo Könenkamp, Ulrich Holtmann, P. Schüler, H.-C. Schaub, N. Serafimov:
FPGA Based Prototyping for Verification and Evaluation in Hardware-Software Cosynthesis. FPL 1994: 251-258 - [c9]Jörg Henkel, Rolf Ernst, Ulrich Holtmann, Thomas Benner:
Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis. ICCAD 1994: 96-100 - [c8]Peter Lüders, Rolf Ernst:
The Dynamic Screen - Beyond the Limits of Traditional Graphic User Interfaces. IFIP Congress (1) 1994: 109-114 - 1993
- [j3]Rolf Ernst, Jörg Henkel, Thomas Benner:
Hardware-Software Cosynthesis for Microcontrollers. IEEE Des. Test Comput. 10(4): 64-75 (1993) - [j2]Ulrich Holtmann, Rolf Ernst:
Experiments with low-level speculative computation based on multiple branch prediction. IEEE Trans. Very Large Scale Integr. Syst. 1(3): 262-267 (1993) - [c7]Ulrich Holtmann, Rolf Ernst:
Speculative Computation for Coprocessor Synthesis. ICCD 1993: 126-131 - [c6]Wei Ye, Rolf Ernst, Thomas Benner, Jörg Henkel:
Fast Timing Analysis for Hardware-Software Co-Synthesis. ICCD 1993: 452-457 - [c5]Peter Lüders, Rolf Ernst:
Automatic Display Layout in Window Oriented User Interfaces. Interfaces in Industrial Systems for Production Engineering 1993: 27-41 - 1992
- [c4]Peter Lüders, Rolf Ernst:
Verbesserung der Benutzeroberfläche von CAD-Systemen durch automatisches Bildschirmlayout. Rechnerunterstütztes Entwerfen und Konstruieren (CAD) 1992: 77-92 - 1991
- [j1]Rolf Ernst, Jayaram Bhasker:
Simulation-Based Verification for High-Level Synthesis. IEEE Des. Test Comput. 8(1): 14-20 (1991) - [c3]Rolf Ernst, P. Nowottnick:
Fault Tolerant VLSI Design with Functional Block Redundancy. ICCD 1991: 432-436 - 1990
- [c2]Rolf Ernst, S. Sutarwala, J.-Y. Jou, M. Tong:
Simulation based verification of register-transfer level behavioral synthesis tools. EURO-DAC 1990: 396-400
1980 – 1989
- 1989
- [c1]Rolf Ernst, S. Sutarwala, J.-Y. Jou:
TSG: A Test System Generator for Debugging and Regression Test of High-Level Behavioral Synthesis Tools. ITC 1989: 937 - 1988
- [b1]Rolf Ernst:
Ein neuartiges Steuerflusskonzept für vielstufige Pipelines in integrierten Signalprozessoren und das Modell eines Signalprozessors als Beispiel für seinen Einsatz. University of Erlangen-Nuremberg, Germany, 1988, pp. 1-240
Coauthor Index
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